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Vector processor, the Glossary

In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently and effectively on large one-dimensional arrays of data called vectors.^[1]

120 relations: AArch64, Address decoder, Advanced Vector Extensions, Algorithm, AltiVec, Andes Technology, Arithmetic logic unit, Array (data structure), Assembly line, Automatic vectorization, AVX-512, Barrel processor, Binary-coded decimal, Bit manipulation, C (programming language), CDC 7600, CDC STAR-100, Cell (processor), Central processing unit, Chaining (vector processing), Computational fluid dynamics, Compute kernel, Computer for operations with functions, Computer simulation, Computing, Control Data Corporation, Convex Computer, Coprocessor, Cray, Cray X-MP, Cray Y-MP, Cray-1, Cray-2, CUDA, Data set, Data structure, Data structure alignment, Embedded system, ETA10, Execution unit, Explicitly parallel instruction computing, Finite field, Floating Point Systems, FLOPS, Flynn's taxonomy, FR-V (microprocessor), Fujitsu, Gather/scatter (vector addressing), General-purpose computing on graphics processing units, GitHub, ... Expand index (70 more) »
Coprocessors
Vector supercomputers

AArch64

AArch64 or ARM64 is the 64-bit Execution state of the ARM architecture family.

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Address decoder

In digital electronics, an address decoder is a binary decoder that has two or more inputs for address bits and one or more outputs for device selection signals.

See Vector processor and Address decoder

Advanced Vector Extensions

Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD).

See Vector processor and Advanced Vector Extensions

Algorithm

In mathematics and computer science, an algorithm is a finite sequence of mathematically rigorous instructions, typically used to solve a class of specific problems or to perform a computation.

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AltiVec

AltiVec is a single-precision floating point and integer SIMD instruction set designed and owned by Apple, IBM, and Freescale Semiconductor (formerly Motorola's Semiconductor Products Sector) — the AIM alliance.

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Andes Technology

Andes Technology Corporation is a Taiwanese supplier of 32/64-bit embedded CPU cores and a founding Premier member of RISC-V International.

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Arithmetic logic unit

In computing, an arithmetic logic unit (ALU) is a combinational digital circuit that performs arithmetic and bitwise operations on integer binary numbers. Vector processor and arithmetic logic unit are central processing unit.

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Array (data structure)

In computer science, an array is a data structure consisting of a collection of elements (values or variables), of same memory size, each identified by at least one array index or key.

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Assembly line

An assembly line is a manufacturing process (often called a progressive assembly) in which parts (usually interchangeable parts) are added as the semi-finished assembly moves from workstation to workstation where the parts are added in sequence until the final assembly is produced.

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Automatic vectorization

Automatic vectorization, in parallel computing, is a special case of automatic parallelization, where a computer program is converted from a scalar implementation, which processes a single pair of operands at a time, to a vector implementation, which processes one operation on multiple pairs of operands at once. Vector processor and automatic vectorization are parallel computing.

See Vector processor and Automatic vectorization

AVX-512

AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then later in a number of AMD and other Intel CPUs (see list below).

See Vector processor and AVX-512

Barrel processor

A barrel processor is a CPU that switches between threads of execution on every cycle. Vector processor and barrel processor are central processing unit.

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Binary-coded decimal

In computing and electronic systems, binary-coded decimal (BCD) is a class of binary encodings of decimal numbers where each digit is represented by a fixed number of bits, usually four or eight.

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Bit manipulation

Bit manipulation is the act of algorithmically manipulating bits or other pieces of data shorter than a word.

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C (programming language)

C (pronounced – like the letter c) is a general-purpose programming language.

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CDC 7600

The CDC 7600 was designed by Seymour Cray to be the successor to the CDC 6600, extending Control Data's dominance of the supercomputer field into the 1970s.

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CDC STAR-100

The CDC STAR-100 is a vector supercomputer that was designed, manufactured, and marketed by Control Data Corporation (CDC). Vector processor and CDC STAR-100 are vector supercomputers.

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Cell (processor)

Cell is a 64-bit multi-core microprocessor microarchitecture that combines a general-purpose PowerPC core of modest performance with streamlined coprocessing elements which greatly accelerate multimedia and vector processing applications, as well as many other forms of dedicated computation.

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Central processing unit

A central processing unit (CPU), also called a central processor, main processor, or just processor, is the most important processor in a given computer.

See Vector processor and Central processing unit

Chaining (vector processing)

In computing, chaining is a technique used in computer architecture in which scalar and vector registers generate interim results which can be used immediately, without additional memory references which reduce computational speed. Vector processor and chaining (vector processing) are parallel computing and vector supercomputers.

See Vector processor and Chaining (vector processing)

Computational fluid dynamics

Computational fluid dynamics (CFD) is a branch of fluid mechanics that uses numerical analysis and data structures to analyze and solve problems that involve fluid flows.

See Vector processor and Computational fluid dynamics

Compute kernel

In computing, a compute kernel is a routine compiled for high throughput accelerators (such as graphics processing units (GPUs), digital signal processors (DSPs) or field-programmable gate arrays (FPGAs)), separate from but used by a main program (typically running on a central processing unit). Vector processor and compute kernel are parallel computing.

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Computer for operations with functions

Within computer engineering and computer science, a computer for operations with (mathematical) functions (unlike the usual computer) operates with functions at the hardware level (i.e. without programming these operations). Vector processor and computer for operations with functions are central processing unit.

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Computer simulation

Computer simulation is the process of mathematical modelling, performed on a computer, which is designed to predict the behaviour of, or the outcome of, a real-world or physical system.

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Computing

Computing is any goal-oriented activity requiring, benefiting from, or creating computing machinery.

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Control Data Corporation

Control Data Corporation (CDC) was a mainframe and supercomputer company that in the 1960s was one of the nine major U.S. computer companies, which group included IBM, the Burroughs Corporation, and the Digital Equipment Corporation (DEC), the NCR Corporation (NCR), General Electric, and Honeywell, RCA and UNIVAC.

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Convex Computer

Convex Computer Corporation was a company that developed, manufactured and marketed vector minisupercomputers and supercomputers for small-to-medium-sized businesses. Vector processor and Convex Computer are vector supercomputers.

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Coprocessor

A coprocessor is a computer processor used to supplement the functions of the primary processor (the CPU). Vector processor and coprocessor are central processing unit and coprocessors.

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Cray

Cray Inc., a subsidiary of Hewlett Packard Enterprise, is an American supercomputer manufacturer headquartered in Seattle, Washington.

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Cray X-MP

The Cray X-MP was a supercomputer designed, built and sold by Cray Research. Vector processor and Cray X-MP are vector supercomputers.

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Cray Y-MP

The Cray Y-MP was a supercomputer sold by Cray Research from 1988, and the successor to the company's X-MP. Vector processor and Cray Y-MP are vector supercomputers.

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Cray-1

The Cray-1 was a supercomputer designed, manufactured and marketed by Cray Research. Vector processor and Cray-1 are vector supercomputers.

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Cray-2

The Cray-2 is a supercomputer with four vector processors made by Cray Research starting in 1985. Vector processor and Cray-2 are vector supercomputers.

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CUDA

In computing, CUDA (originally Compute Unified Device Architecture) is a proprietary parallel computing platform and application programming interface (API) that allows software to use certain types of graphics processing units (GPUs) for accelerated general-purpose processing, an approach called general-purpose computing on GPUs (GPGPU). Vector processor and CUDA are parallel computing.

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Data set

A data set (or dataset) is a collection of data.

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Data structure

In computer science, a data structure is a data organization, and storage format that is usually chosen for efficient access to data.

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Data structure alignment

Data structure alignment is the way data is arranged and accessed in computer memory.

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Embedded system

An embedded system is a computer system—a combination of a computer processor, computer memory, and input/output peripheral devices—that has a dedicated function within a larger mechanical or electronic system.

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ETA10

The ETA10 is a vector supercomputer designed, manufactured, and marketed by ETA Systems, a spin-off division of Control Data Corporation (CDC). Vector processor and ETA10 are vector supercomputers.

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Execution unit

In computer engineering, an execution unit (E-unit or EU) is a part of a processing unit that performs the operations and calculations forwarded from the instruction unit. Vector processor and execution unit are central processing unit.

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Explicitly parallel instruction computing

Explicitly parallel instruction computing (EPIC) is a term coined in 1997 by the HP–Intel alliance to describe a computing paradigm that researchers had been investigating since the early 1980s.

See Vector processor and Explicitly parallel instruction computing

Finite field

In mathematics, a finite field or Galois field (so-named in honor of Évariste Galois) is a field that contains a finite number of elements.

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Floating Point Systems

Floating Point Systems, Inc. (FPS), was a Beaverton, Oregon vendor of attached array processors and minisupercomputers.

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FLOPS

Floating point operations per second (FLOPS, flops or flop/s) is a measure of computer performance in computing, useful in fields of scientific computations that require floating-point calculations.

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Flynn's taxonomy

Flynn's taxonomy is a classification of computer architectures, proposed by Michael J. Flynn in 1966 and extended in 1972. Vector processor and Flynn's taxonomy are parallel computing.

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FR-V (microprocessor)

The Fujitsu FR-V (Fujitsu RISC-VLIW) is one of the very few processors ever able to process both a very long instruction word (VLIW) and vector processor instructions at the same time, increasing throughput with high parallel computing while increasing performance per watt and hardware efficiency. Vector processor and fR-V (microprocessor) are parallel computing.

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Fujitsu

is a Japanese multinational information and communications technology equipment and services corporation, established in 1935 and headquartered in Kawasaki, Kanagawa.

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Gather/scatter (vector addressing)

Gather/scatter is a type of memory addressing that at once collects (gathers) from, or stores (scatters) data to, multiple, arbitrary indices. Vector processor and Gather/scatter (vector addressing) are parallel computing and vector supercomputers.

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General-purpose computing on graphics processing units

General-purpose computing on graphics processing units (GPGPU, or less often GPGP) is the use of a graphics processing unit (GPU), which typically handles computation only for computer graphics, to perform computation in applications traditionally handled by the central processing unit (CPU). Vector processor and General-purpose computing on graphics processing units are parallel computing.

See Vector processor and General-purpose computing on graphics processing units

GitHub

GitHub is a developer platform that allows developers to create, store, manage and share their code.

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GNU Compiler Collection

The GNU Compiler Collection (GCC) is a collection of compilers from the GNU Project that support various programming languages, hardware architectures and operating systems.

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Graphics processing unit

A graphics processing unit (GPU) is a specialized electronic circuit initially designed for digital image processing and to accelerate computer graphics, being present either as a discrete video card or embedded on motherboards, mobile phones, personal computers, workstations, and game consoles.

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High Bandwidth Memory

High Bandwidth Memory (HBM) is a computer memory interface for 3D-stacked synchronous dynamic random-access memory (SDRAM) initially from Samsung, AMD and SK Hynix.

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High-performance computing

High-performance computing (HPC) uses supercomputers and computer clusters to solve advanced computation problems. Vector processor and High-performance computing are parallel computing.

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History of supercomputing

The history of supercomputing goes back to the 1960s when a series of computers at Control Data Corporation (CDC) were designed by Seymour Cray to use innovative designs and parallelism to achieve superior computational peak performance.

See Vector processor and History of supercomputing

Hitachi

() is a Japanese multinational conglomerate founded in 1910 and headquartered in Chiyoda, Tokyo.

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IBM

International Business Machines Corporation (using the trademark IBM), nicknamed Big Blue, is an American multinational technology company headquartered in Armonk, New York and present in over 175 countries.

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IBM ViVA

ViVA (Virtual Vector Architecture) is a technology from IBM for coupling together multiple scalar floating point units to act as a single vector processor.

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ICL Distributed Array Processor

The Distributed Array Processor (DAP) produced by International Computers Limited (ICL) was the world's first commercial massively parallel computer.

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ILLIAC IV

The ILLIAC IV was the first massively parallel computer. Vector processor and ILLIAC IV are parallel computing.

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Instruction pipelining

In computer engineering, instruction pipelining is a technique for implementing instruction-level parallelism within a single processor.

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Instruction set architecture

In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. Vector processor and instruction set architecture are central processing unit.

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International Computers Limited

International Computers Limited (ICL) was a British computer hardware, computer software and computer services company that operated from 1968 until 2002.

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Latency (engineering)

Latency, from a general point of view, is a time delay between the cause and the effect of some physical change in the system being observed.

See Vector processor and Latency (engineering)

Libre-SOC

Libre-SOC is a libre soft processor core originally written by Luke Leighton and other contributors, announced at the OpenPOWER Summit NA 2020.

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Logarithm

In mathematics, the logarithm is the inverse function to exponentiation.

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MapReduce

MapReduce is a programming model and an associated implementation for processing and generating big data sets with a parallel, distributed algorithm on a cluster. Vector processor and MapReduce are parallel computing.

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Massively parallel

Massively parallel is the term for using a large number of computer processors (or separate computers) to simultaneously perform a set of coordinated computations in parallel. Vector processor and Massively parallel are parallel computing.

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Memory latency

Memory latency is the time (the latency) between initiating a request for a byte or word in memory until it is retrieved by a processor.

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Microprocessor

A microprocessor is a computer processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs.

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Minicomputer

A minicomputer, or colloquially mini, is a type of smaller general-purpose computer developed in the mid-1960s and sold at a much lower price than mainframe and mid-size computers from IBM and its direct competitors.

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Minisupercomputer

Minisupercomputers constituted a short-lived class of computers that emerged in the mid-1980s, characterized by the combination of vector processing and small-scale multiprocessing. Vector processor and Minisupercomputer are vector supercomputers.

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MIPS-3D

MIPS-3D is an extension to the MIPS V instruction set architecture (ISA) that added 13 new instructions for improving the performance of 3D graphics applications.

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MMX (instruction set)

MMX is a single instruction, multiple data (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology".

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Multiple instruction, multiple data

In computing, multiple instruction, multiple data (MIMD) is a technique employed to achieve parallelism. Vector processor and multiple instruction, multiple data are parallel computing.

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NEC

is a Japanese multinational information technology and electronics corporation, headquartered at the NEC Supertower in Minato, Tokyo, Japan.

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NEC SX

NEC SX describes a series of vector supercomputers designed, manufactured, and marketed by NEC. Vector processor and NEC SX are vector supercomputers.

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NEC SX-Aurora TSUBASA

The NEC SX-Aurora TSUBASA is a vector processor of the NEC SX architecture family. Vector processor and NEC SX-Aurora TSUBASA are coprocessors, parallel computing and vector supercomputers.

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NOP (code)

In computer science, a NOP, no-op, or NOOP (pronounced "no op"; short for no operation) is a machine language instruction and its assembly language mnemonic, programming language statement, or computer protocol command that does nothing.

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Open source

Open source is source code that is made freely available for possible modification and redistribution.

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Oregon

Oregon is a state in the Pacific Northwest region of the United States.

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Permute instruction

Permute (and Shuffle) instructions, part of bit manipulation as well as vector processing, copy unaltered contents from a source array to a destination array, where the indices are specified by a second source array.

See Vector processor and Permute instruction

Pipeline (computing)

In computing, a pipeline, also known as a data pipeline, is a set of data processing elements connected in series, where the output of one element is the input of the next one.

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Power of two

A power of two is a number of the form where is an integer, that is, the result of exponentiation with number two as the base and integer as the exponent.

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PowerPC

PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple–IBM–Motorola alliance, known as AIM.

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Predication (computer architecture)

In computer architecture, predication is a feature that provides an alternative to conditional transfer of control, as implemented by conditional branch machine instructions.

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Price–performance ratio

In economics, engineering, business management and marketing the price–performance ratio is often written as cost–performance, cost–benefit or capability/price (C/P), refers to a product's ability to deliver performance, of any sort, for its price.

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Processor register

A processor register is a quickly accessible location available to a computer's processor. Vector processor and processor register are central processing unit.

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Reduced instruction set computer

In electronics and computer science, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks.

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RISC-V

RISC-V (pronounced "risk-five") is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles.

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Scalar processor

Scalar processors are a class of computer processors that process only one data item at a time. Vector processor and Scalar processor are central processing unit.

See Vector processor and Scalar processor

Shader

In computer graphics, a shader is a computer program that calculates the appropriate levels of light, darkness, and color during the rendering of a 3D scene—a process known as shading.

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Sine and cosine

In mathematics, sine and cosine are trigonometric functions of an angle.

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Single instruction, multiple data

Single instruction, multiple data (SIMD) is a type of parallel processing in Flynn's taxonomy. Vector processor and Single instruction, multiple data are parallel computing.

See Vector processor and Single instruction, multiple data

Single instruction, multiple threads

Single instruction, multiple threads (SIMT) is an execution model used in parallel computing where single instruction, multiple data (SIMD) is combined with multithreading. Vector processor and single instruction, multiple threads are parallel computing.

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Sony

, formerly known as and, commonly known as Sony, is a Japanese multinational conglomerate corporation headquartered in Minato, Tokyo, Japan.

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Standard Portable Intermediate Representation (SPIR) is an intermediate language for parallel computing and graphics by Khronos Group.

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Stream processing

In computer science, stream processing (also known as event stream processing, data stream processing, or distributed stream processing) is a programming paradigm which views streams, or sequences of events in time, as the central input and output objects of computation.

See Vector processor and Stream processing

Streaming SIMD Extensions

In computing, Streaming SIMD Extensions (SSE) is a single instruction, multiple data (SIMD) instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of central processing units (CPUs) shortly after the appearance of Advanced Micro Devices (AMD's) 3DNow!.

See Vector processor and Streaming SIMD Extensions

References

[1] https://en.wikipedia.org/wiki/Vector_processor

Also known as Array processor, Vector computer, Vector facility, Vector processing, Vector processing unit, Vector processors, Vector supercomputer.

, GNU Compiler Collection, Graphics processing unit, High Bandwidth Memory, High-performance computing, History of supercomputing, Hitachi, IBM, IBM ViVA, ICL Distributed Array Processor, ILLIAC IV, Instruction pipelining, Instruction set architecture, International Computers Limited, Latency (engineering), Libre-SOC, Logarithm, MapReduce, Massively parallel, Memory latency, Microprocessor, Minicomputer, Minisupercomputer, MIPS-3D, MMX (instruction set), Multiple instruction, multiple data, NEC, NEC SX, NEC SX-Aurora TSUBASA, NOP (code), Open source, Oregon, Permute instruction, Pipeline (computing), Power of two, PowerPC, Predication (computer architecture), Price–performance ratio, Processor register, Reduced instruction set computer, RISC-V, Scalar processor, Shader, Sine and cosine, Single instruction, multiple data, Single instruction, multiple threads, Sony, Standard Portable Intermediate Representation, Stream processing, Streaming SIMD Extensions, Supercomputer, Supercomputer architecture, Superscalar processor, SWAR, Swizzling (computer graphics), Tensor Processing Unit, Texas Instruments, TI Advanced Scientific Computer, Toshiba, Trigonometry, University of Illinois Urbana-Champaign, Very long instruction word, Video game console, VideoCore, Visual Instruction Set, Vulkan, Westinghouse Electric Corporation, X86, X86 Bit manipulation instruction set, YouTube, 3DNow!.

Vector processor, the Glossary

Table of Contents

See also

Coprocessors

Vector supercomputers

References