CN101335488A - System for modulating working frequency of switch power source converter - Google Patents

The Switching Power Supply loss comprises three kinds: (1) conduction loss: during the switch power break-over of device because itself the caused loss of internal resistance; (2) switching loss, the caused loss of on-off controller power device switch state, the loss of (3) control circuit.Wherein conduction loss and switching loss are all directly related with the switching frequency of power supply, and switching frequency is high more, and these two kinds of losses are just big more.The conventional power source power supply is fixed owing to operating frequency, these two kinds of losses are in underloading with bigger when not having load, make whole Switching Power Supply be difficult to satisfy the requirement of these energy conservation standards, and reduce whole Switching Power Supply in underloading or the switching frequency when not having load be the efficient ways that addresses this problem.Fig. 1 is the change-over circuit of a traditional switch mode power, alternating current in the input of alternating current input (AC Input), obtain a collimation stream voltage at

electric capacity

102 places through full-

wave rectifying circuit

101, this voltage is by 104 chargings of 103 pairs of electric capacity of starting resistance, after the voltage on the electric capacity 104 surpasses certain preset value,

PWM controller

100 is started working, send square-wave signal

driving power transistor

109 in the controller on the driver A, after power supply is started working, the operating current of

controller

100 is mainly provided by

diode

105 by the auxilliary limit of

transformer

106, and the output voltage of power supply is exactly the secondary by the voltage of

diode

107 in

electric capacity

108 accumulations of transformer 106.This transducer works in peak-current mode, the output voltage of transducer can produce the Fb input that a feedback voltage V Fb delivers to controller 100 after by output sampling and

loop compensation circuit

111, can send the grid that high level is given

transistor

109 at each on-off

cycle controller

100, make

transistor

109 conductings, the electric current that flows through on the

sampling resistor

110 begins to increase, voltage on

sampling resistor

110 also increases, when the voltage of inductor B input equates with the voltage of Fb input,

transistor

109 is by beginning up to next switch periods, obtains a galvanic current at the output of power supply like this and presses.

Fig. 2 is an oscillator structure common in the PWM controller, and it mainly contains

current source

201 and

charging control switch

202,

current source

204 and

discharge control switch

203,

electric capacity

211, comparator 206,207 and the rest-set flip-flop of being made up of

NAND gate

208 and NAND gate 209.By by

current source

201 and

charging control switch

202, the charge-discharge circuit control A point voltage that

current source

204 and

discharge control switch

203 and

electric capacity

211 are formed, export a sawtooth signal, referring to Ramp signal among Fig. 3, export S1 signal and S2 signal more respectively through

comparator

207 and

comparator

206, these two signals again by

inverter

210, are exported the CLK signal behind rest-set flip-flop; Meanwhile, the CLK signal is received

charging control switch

202 and

charging control switch

203, to control the operating state of these two switches.

Below in conjunction with Fig. 3 this course of work is described in detail: as a point voltage VA during less than VL,

charging control switch

202 conductings,

current source

201 gives

electric capacity

211 chargings, this moment, the output S2 of

comparator

206 was a high level and the output S1 of

comparator

207 is a high level, this moment, CLK was a low level, and promptly the b point is in low level.During greater than VH, S2 becomes low level up to a point voltage VA, and S1 still is a high level, and signal CLK is a high level, and promptly the B point is in high level, make

charging control switch

202 by, and

discharge control switch

203 conductings make

electric capacity

211 discharges; Because

electric capacity

211 discharge process, make A point voltage VA once more less than VH during greater than VL, S2 reverts to high level, and S1 still is a high level, so CLK still is a high level.When

electric capacity

211 continuous discharges make a point voltage VA less than VL, S2 still is a high level, and S1 becomes low level, so CLK is a low level, this moment, the b point was in low level, made

discharge control switch

203 by,

charging control switch

202 conductings,

current source

201 to

electric capacity

211 chargings, begins next charge and discharge cycles again.From above-mentioned analysis as can be known, the voltage VH of this circuit and VL are two fixing reference voltages, so the frequency of oscillator is also fixed.Less or when not having load when load, because that switching frequency is the switching loss of bringing transducer of fixing is bigger all the time, be difficult to satisfy the requirement of various energy conservation standards.

Fig. 4 is a specific embodiment of the system of modulating working frequency of switch power source converter of the present invention.The FB signal is the feedback signal that output obtains behind over-sampling and loop compensation among the figure, behind this signal process electric voltage displacement and the amplifying

circuit

301, one the tunnel deliver to

PWM comparator

303 and current sample voltage CS relatively control flows cross the electric current of primary, the input of one of them comparator in the

oscillator

302 is delivered on another road, this

oscillator

302 is provided with charge-discharge circuit and

comparator array

307 and the waveform

synthetic control circuit

308 outputs one square-wave signal CLK CLK end to d

type flip flop

304, the reset terminal R of

trigger

304 links to each other with the output of

PWM comparator

303, the output Q of trigger sends into

driving stage

305, removes

driving power transistor

306 after driving

stage

305 level shifts.

VL is a fixed value, is used for being provided with the minimum value of first output signal that C is ordered on the

electric capacity

407, and this first output signal is accurate sawtooth waveforms (Ramp);

CLKA is a pulse signal, and the low duration of this signal is TR1, may command charging circuit I1, and when this value is low level,

charging control switch

402 conductings,

current source

401 is with 407 chargings of 1 pair of electric capacity of electric current I;

CLKB is a pulse signal, and the low duration of this signal is TR2, in order to control charging circuit I2, and when this value is low level,

charging control switch

404 conductings,

current source

403 is with 407 chargings of 2 pairs of electric capacity of electric current I;

CLKC is a pulse signal, and the high level lasting time of this signal is TF, and in order to control discharge circuit I3, when this value during for high level,

discharge control switch

405 conductings,

current source

406 is with release electric charge on the

electric capacity

407 of electric current I 3.

Can see that by Fig. 5 the C point voltage changes first output signal that is oscillator, promptly accurate sawtooth signal on the electric capacity 407.The oscillator course of work shown in Figure 5 is: the voltage of ordering as C on the

electric capacity

407 is during less than VL,

charging control switch

402 conductings, and

charging control switch

404 and

discharge control switch

405 by, the C point voltage increases on the

electric capacity

407, when the C point voltage reaches VR1 on the

electric capacity

407, can be in two kinds of situation: if this moment Vct voltage less than VR1, then

charging control switch

402 by,

discharge control switch

405 conductings,

electric capacity

407 discharges; If this moment, Vct voltage was greater than VR1, then

charging control switch

402 by, charging control switch 404 conductings, continued

electric capacity

407 chargings by

current source

403, the C point voltage continues to increase on the

electric capacity

407, if Vct is less than VR2, then when the C point voltage reaches Vct,

charging control switch

404 is by,

discharge control switch

405 conductings, and 406 pairs of

electric capacity

407 of current source begin discharge; If Vct is greater than VR2, then when the C point voltage reaches VR2,

charging control switch

404 is by,

discharge control switch

405 conductings, 406 pairs of

electric capacity

407 of current source begin discharge, after

electric capacity

407 discharges, the voltage that C is ordered on the

electric capacity

407 reduces, when the C point voltage is reduced to VL,

discharge control switch

405 by,

charging control switch

402 conductings are

electric capacity

407 chargings by

current source

401, begin a new cycle.The above-mentioned control signal that discharges and recharges control switch is the CLKA by waveform

synthetic control circuit

412 output, CLKB, the CLKC signal controlling, square wave is synthetic is input as comparator 408,409,410 and 411 S1, S2, S3 and the S4 of output respectively.

Fig. 6 is complete oscillator example of the present invention, describes its course of work below in conjunction with Fig. 7.The voltage of ordering as C on the

electric capacity

407 is during less than VL, the output S4 of

comparator

411 is a low level, transmission through

NAND gate

514 and

NOR gate

519, the CLKC signal is a low level, the output S3 of

comparator

410 is a high level simultaneously, the output of

NAND gate

514 also is high level, so the output of

NAND gate

513 is CLKA is low level,

charging control switch

402 be controlled to be the high level conducting,

current source

401 is

electric capacity

407 chargings with

electric current I

1, because CLKA is a low level, obtaining signal CLKB through

NAND gate

516 is high level, so

charging control switch

404 by, 401 pairs of electric capacity of

current source

407 charging is only arranged this moment, when C point voltage on the

electric capacity

407 greater than VL during less than VR1, the output S4 of

comparator

411 is converted to high level, other signal remains unchanged, and ensuing situation is divided three kinds:

Situation 1:Vct＜VR1＜VR2, when the voltage of ordering as C on the

electric capacity

407 is increased to Vct, the output S2 of

comparator

409 is converted into low level, through

NAND gate

512, the reset signal R of d

type flip flop

515 is input as high level, reset flip-

flop

515, the output Q of

trigger

515 is a low level, CLKA like this, CLKB, the state of CLKC signal is constant,

current source

401 continues as

electric capacity

407 chargings, when the voltage of ordering as C on the

electric capacity

407 is increased to VR1, the output S3 of

comparator

410 changes low level into, after

NAND gate

513, CLKA becomes high level,

charging control switch

402 by, in a single day CLKA becomes high level, through

NAND gate

514 and

NOR gate

519, CLKC becomes high level,

discharge control switch

405 conductings, by

current source

406 with release electric charge on the

electric capacity

407 of

electric current I

3, the voltage of

electric capacity

407 descends, and when the voltage of ordering as C on the

electric capacity

407 was reduced to and is slightly smaller than VR1, the output S3 of

comparator

410 became high level, but other signal condition is constant, the C point voltage continues to reduce on the

electric capacity

407, and when the C point voltage was reduced to VL, the output S4 of

comparator

411 changed low level into, under the effect of

NAND gate

513 and 514, CLKA changes low level into, and under the effect of NAND

gate

514 and NOR

gate

519, CLKC changes low level into, like this

discharge control switch

405 by,

charging control switch

402 conductings are

electric capacity

407 chargings by

current source

401, begin the new cycle.Described above is the situation that oscillator works in maximum switching frequency.

Situation 2:VR1＜Vct＜VR2, charging current I1 to

electric capacity

407 on the charging, C point voltage increases on it, when the voltage of ordering as C is increased to VR1, the output S3 of

comparator

410 becomes low level, signal CLKA changes high level into like this,

charging control switch

402 by, this moment, the reset terminal signal R of

trigger

515 was a low level, change the rising edge of high level into by low level at CLKA, the output Q of

trigger

515 changes high level into, under the effect of

NAND gate

516, signal CLKB changes low level into,

charging control switch

404 conductings, is

electric capacity

407 chargings by

current source

403 with

electric current I

2, simultaneously in NAND

gate

517, under the effect of

inverter

518 and

NOR gate

519, CLKC continues to keep low level,

discharge control switch

405 by, it is

electric capacity

407 chargings that charging current I2 is only arranged this moment, when the C point voltage is increased to Vct, the output S2 of

comparator

409 changes low level into, through

NAND gate

512, the reset signal R of

trigger

515 changes high level into, reset flip-

flop

515, the output Q of

trigger

515 changes low level into, under the effect of

NAND gate

516, CLKB changes low level into,

charging control switch

404 by, under the effect of

NAND gate

517

inverters

518 and

NOR gate

519, CLKC changes high level into,

discharge control switch

405 conductings, beginning is with release electric charge on the

electric capacity

407 of discharging current I3, the C point voltage reduces on the

electric capacity

407, the output S2 of

comparator

409 changes height into when being slightly smaller than Vct when the C point voltage is reduced to, when the voltage of ordering as C is reduced to VR1, the output S3 of

comparator

410 changes height into, but CLKA in this process, CLKB, the CLKC signal remains unchanged, when the voltage of ordering as C was reduced to VL, the output S4 of

comparator

411 changed low level into, and CLKC changes low level into,

discharge control switch

405 by, under the effect of

NAND gate

513 and

NAND gate

514, CLKA changes low level into,

charging control switch

402 conductings, is

electric capacity

407 chargings by

current source

401 with

electric current I

1, begins a new cycle.This situation lower frequency can change, because Vct changes, the variation of Vct can change the charging interval of charging current I2, promptly changes second time period of first output signal, and the cycle of oscillator also can and then change, i.e. the frequency shift of oscillator.

Situation 3:VR1＜VR2＜Vct, under the effect of charging current I1, the voltage that C is ordered on the

electric capacity

407 increases, when the voltage of ordering as C is increased to VR1, the output S3 of

comparator

410 becomes low level, signal CLKA changes high level into like this,

charging control switch

402 by, this moment, the reset terminal signal R of

trigger

515 was a low level, change the rising edge of high level into by low level at CLKA, the output Q of

trigger

515 changes high level into, under the effect of

NAND gate

516, signal CLKB changes low level into,

charging control switch

404 conductings, is electric capacity 507 chargings by

current source

403 with

electric current I

2, simultaneously in NAND

gate

517, under the effect of

inverter

518 and

NOR gate

519, CLKC continues to keep low level,

discharge control switch

405 by, it is

electric capacity

407 chargings with charging current I2 that

current source

403 is only arranged this moment, when the C point voltage continues to be increased to VR2 on the electric capacity 507,

comparator

408 output signal S1 change low level into, through

NAND gate

512, the reset signal R of

trigger

515 changes high level into, reset flip-

flop

515, the output Q of

trigger

515 changes low level into, under the effect of

NAND gate

516, CLKB changes low level into,

charging control switch

404 by, under the effect of

NAND gate

517

inverters

518 and

NOR gate

519, CLKC changes high level into,

discharge control switch

405 conductings, beginning is

electric capacity

407 electric charge of releasing with

electric current I

3, the C point voltage reduces on the

electric capacity

407, when the C point voltage is reduced to when being slightly smaller than Vct, the output S2 of

comparator

409 changes height into, when electric C point voltage is reduced to VR1, the output S3 of

comparator

410 changes height into, but CLKA in this process, CLKB, the CLKC signal remains unchanged, and the output S4 of

comparator

411 changed low level into when the voltage of ordering as C was reduced to VL, and CLKC changes low level into,

discharge control switch

405 by, under the effect of

NAND gate

513 and

NAND gate

514, CLKA changes low level into,

charging control switch

402 conductings, by charging current I1 is

electric capacity

407 chargings, begins a new cycle.Under this situation, can see the work not influence of voltage Vct to oscillator, the length of each time period in whole cycle all has voltage VR1, VR2 and three fixing charging and discharging currents controls, therefore the operating frequency of oscillator is also fixed, this fixed frequency is the minimum frequency of oscillator, in actual applications, this frequency can be set in more than the 20K, to avoid the generation of audio-frequency noise.

Fig. 9 is a physical circuit realizing function shown in Fig. 8,

operational amplifier

601 among the figure, 602 with resistance 603,604 constitute the level shift amplifying circuit, VFB is an external feedback signal, Vmod is used for controlling the shift value of output Vct at feedback voltage V FB, the ratio decision output voltage V ct of

resistance

603 and

resistance

604 and the variation ratio of VFB voltage, and it is described with preamble that Vct sends into the course of work of oscillator.

1, a kind of system of modulating working frequency of switch power source converter, this system comprises an oscillator, receives the input signal of a reflection Switching Power Supply load state, it is characterized in that:

Described oscillator produces first output signal at least, the one-period of described first output signal is made up of three parts, first time period, second time period and the 3rd time period, described first output signal strengthens in described first time period, described first output signal also strengthens in described second time period, described first output signal reduces in described the 3rd time period, the length of wherein said second time period changes between zero-sum one predefined maximum with the variation of input signal, and the length of described second time period and described input signal are inversely proportional to.

2, according to the system of the described modulating working frequency of switch power source converter of claim 1, it is characterized in that:

Described oscillator comprises: the charging and discharging circuit that first charging circuit, second charging circuit and a discharge circuit are formed produces described first output signal on an electric capacity; Four comparators are formed a comparator array, the positive input terminal of one of them comparator detects described first output signal, with compare output signal (S4) and send into a waveform synthetic control circuit of fixed threshold voltage (VL), the negative input end of three comparators detects described first output signal respectively in addition, the output signal (S3) and send into described waveform synthetic control circuit of comparing with fixed voltage (VR1), the output signal (S2) and send into described waveform synthetic control circuit of comparing with described input signal, another output signal (S1) and send into described waveform synthetic control circuit of comparing with fixed voltage (VR2);

In the described waveform synthetic control circuit, described signal (S1) and signal (S2) send the reset terminal that outputs signal to a d type flip flop after a NAND gate, described signal (S3) output signal (CLKA) back after NAND gate divides four the tunnel, one the road delivers to the CK end of described d type flip flop, one the road delivers to described driving stage and then controls described power transistor, also has one road charging control switch of delivering to described first charging circuit, the input of another NAND gate is delivered on another road, with the Q output end signal of described d type flip flop together by a NAND gate and reverser output signal and be transferred to a NOR gate, described signal (S4) is delivered to another input of described NOR gate after another NAND gate, and output signal (CLKC), described output signal (CLKC) is delivered to the discharge control switch of described discharge circuit, the Q output end signal of described d type flip flop and output signal (CLKA) together by with NAND gate after output signal (CLKB), described output signal (CLKB) is delivered to the charging control switch of described second charging circuit to control this charging circuit.

3, according to the system of claim 1 or 2 described modulating working frequency of switch power source converter, it is characterized in that: this system also includes an electric voltage displacement and amplifying circuit, d type flip flop, PWM comparator; Described input signal is the signal of feedback signal behind described electric voltage displacement and amplifying circuit, one the tunnel delivers to described PWM comparator and the current sample voltage elementary electric current of control transformer together, described PWM comparator outputs to the reset terminal of described d type flip flop, described oscillator is delivered on another road, described oscillator output signal (CLKA) is to the CLK end of described d type flip flop, described d type flip flop output signal is controlled a power transistor after a driving stage level shift, and then the switch of control switching transducer.

4, according to the system of the described modulating working frequency of switch power source converter of claim 3, it is characterized in that: described feedback signal is a feedback voltage.

5, system according to the described modulating working frequency of switch power source converter of claim 3, it is characterized in that: described electric voltage displacement and amplifying circuit comprise two operational amplifiers and two resistance, the described feedback signal of positive input termination of an operational amplifier, the output of negative input end and described operational amplifier joins, the output of described operational amplifier is received two series resistance outputs, another operational amplifier positive input termination one fixed reference potential, negative input end is received on the connecting line between two series resistances, its output links to each other with described two series resistance outputs and exports voltage after level shift is amplified, and delivers to described oscillator.