CN101414817B - switch circuit - Google Patents
- ️Wed Aug 10 2011
CN101414817B - switch circuit - Google Patents
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- CN101414817B CN101414817B CN2007101671111A CN200710167111A CN101414817B CN 101414817 B CN101414817 B CN 101414817B CN 2007101671111 A CN2007101671111 A CN 2007101671111A CN 200710167111 A CN200710167111 A CN 200710167111A CN 101414817 B CN101414817 B CN 101414817B Authority
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Abstract
The invention provides a switching circuit capable of adjusting linearity. The switch circuit comprises two metal oxide semiconductor switches and an adjusting unit. The two MOS switches receive a pair of differential input voltages at their input terminals and output a pair of differential output voltages at their output terminals when turned on. The adjusting unit changes the difference of the common mode level of the input end and the output end of the two metal oxide semiconductor switches so as to adjust the linearity of the differential mode resistance of the two metal oxide semiconductor switches.
Description
技术领域technical field
本发明涉及一种开关电路,特别是涉及一种可以调整线性度的开关电路。The invention relates to a switch circuit, in particular to a switch circuit capable of adjusting linearity.
背景技术Background technique
现有用于传递差动电压的开关电路包含二个金属氧化物半导体开关(MOSSwitch),其中,每一金属氧化物半导体开关包括一输入端及一输出端,且可以是一N型金属氧化物半导体开关(NMOS Switch)、一P型金属氧化物半导体开关(PMOS Switch)或一互补型金属氧化物半导体开关(CMOS Switch)。该二个金属氧化物半导体开关在其输入端接收一对差动输入电压Vin+、Vin-,并在导通时在其输出端输出一对差动输出电压Vout+、Vout-。The existing switching circuit for transmitting differential voltage includes two metal oxide semiconductor switches (MOSSwitch), wherein each metal oxide semiconductor switch includes an input terminal and an output terminal, and can be an N-type metal oxide semiconductor switch. switch (NMOS Switch), a P-type metal oxide semiconductor switch (PMOS Switch) or a complementary metal oxide semiconductor switch (CMOS Switch). The two MOS switches receive a pair of differential input voltages Vin+, Vin- at their input terminals, and output a pair of differential output voltages Vout+, Vout- at their output terminals when turned on.
图1与图2显示了该开关电路1的相关仿真结果,其中,横轴表示该对差动输入电压Vin+、Vin-的差异Vdiff,纵轴表示该二个金属氧化物半导体开关的差模电阻Rdiff的比例(以Vdiff=0时获得的Rdiff为基准),曲线21是在该二个金属氧化物半导体开关是N型或P型金属氧化物半导体开关时获得的,曲线22是在该二个金属氧化物半导体开关是互补型金属氧化物半导体开关时获得的,且Vdiff及Rdiff的定义如下所示:Figure 1 and Figure 2 show the relevant simulation results of the switch circuit 1, wherein the horizontal axis represents the difference Vdiff of the pair of differential input voltages Vin+, Vin-, and the vertical axis represents the differential mode resistance of the two metal oxide semiconductor switches The ratio of Rdiff (based on the Rdiff obtained when Vdiff=0), the curve 21 is obtained when the two MOS switches are N-type or P-type MOS switches, and the curve 22 is obtained when the two MOS switches are N-type or P-type MOS switches. The metal-oxide-semiconductor switch is obtained when the metal-oxide-semiconductor switch is a complementary metal-oxide-semiconductor switch, and the definitions of Vdiff and Rdiff are as follows:
Vdiff=Vin+-Vin-,Vdiff=Vin+-Vin-,
Rdiff=(Vin+-Vin-)/(Iin+-Iin-),Rdiff=(Vin+-Vin-)/(Iin+-Iin-),
其中,Iin+、Iin-是该二个金属氧化物半导体开关在其输入端接收到的一对差动输入电流。Wherein, Iin+, Iin- are a pair of differential input currents received by the two MOS switches at their input terminals.
由图1与图2可知,该二个金属氧化物半导体开关的差模电阻Rdiff会随着该对差动输入电压Vin+、Vin-的差异Vdiff改变。当该开关电路运用于一线性电路(例如一滤波器或一放大器)时,会限制该线性电路的线性度。It can be seen from FIG. 1 and FIG. 2 that the differential mode resistance Rdiff of the two MOS switches will change with the difference Vdiff of the pair of differential input voltages Vin+, Vin−. When the switching circuit is used in a linear circuit such as a filter or an amplifier, it limits the linearity of the linear circuit.
发明内容Contents of the invention
因此,本发明的目的即在提供一种可以调整线性度的开关电路。Therefore, the purpose of the present invention is to provide a switch circuit that can adjust the linearity.
于是,本发明开关电路包含二个金属氧化物半导体开关及一调整单元。每一金属氧化物半导体开关包括一输入端及一输出端。该二个金属氧化物半导体开关在其输入端接收一对差动输入电压,并在导通时在其输出端输出一对差动输出电压。该调整单元改变该二个金属氧化物半导体开关的输入端与输出端的共模电平的差异,以调整该二个金属氧化物半导体开关的差模电阻的线性度。Therefore, the switch circuit of the present invention includes two metal oxide semiconductor switches and an adjustment unit. Each MOS switch includes an input terminal and an output terminal. The two MOS switches receive a pair of differential input voltages at their input terminals, and output a pair of differential output voltages at their output terminals when they are turned on. The adjustment unit changes the difference of the common mode level between the input terminal and the output terminal of the two metal oxide semiconductor switches, so as to adjust the linearity of the differential mode resistance of the two metal oxide semiconductor switches.
附图说明Description of drawings
图1是一模拟图,说明当使用N型或P型金属氧化物半导体开关时,该现有开关电路的差模电阻的比例;FIG. 1 is a simulation diagram illustrating the ratio of the differential mode resistance of the conventional switching circuit when using N-type or P-type metal-oxide-semiconductor switches;
图2是一模拟图,说明当使用互补型金属氧化物半导体开关时,该现有开关电路的差模电阻的比例;FIG. 2 is a simulation diagram illustrating the ratio of the differential mode resistance of the conventional switching circuit when using complementary metal-oxide-semiconductor switches;
图3是一电路示意图,说明本发明开关电路的第一实施例;Fig. 3 is a schematic circuit diagram illustrating the first embodiment of the switching circuit of the present invention;
图4是一模拟图,说明该第一实施例的差模电阻;Fig. 4 is a simulation diagram illustrating the differential mode resistance of the first embodiment;
图5是一模拟图,说明该第一实施例的差模电阻的比例;Fig. 5 is a simulation diagram illustrating the ratio of the differential mode resistance of the first embodiment;
图6是一模拟图,与图4相似,但部分参数的范围不同;Fig. 6 is a simulation diagram, similar to Fig. 4, but the range of some parameters is different;
图7是一模拟图,与图5相似,但部分参数的范围不同;Fig. 7 is a simulation diagram, similar to Fig. 5, but the range of some parameters is different;
图8是一模拟图,说明图7中差模电阻的比例与1的差距;Fig. 8 is a simulation diagram illustrating the difference between the ratio of the differential mode resistance in Fig. 7 and 1;
图9是一电路示意图,说明本发明开关电路的第二实施例;FIG. 9 is a schematic circuit diagram illustrating a second embodiment of the switching circuit of the present invention;
图10是一电路示意图,说明本发明开关电路的第三实施例;及10 is a schematic circuit diagram illustrating a third embodiment of the switching circuit of the present invention; and
图11是一电路示意图,说明所述实施例可被运用的状况。FIG. 11 is a schematic circuit diagram illustrating a situation in which the described embodiment can be used.
附图符号说明Description of reference symbols
31、32金属氧化物半导体开关31, 32 metal oxide semiconductor switch
5调整单元5 adjustment unit
501-504电流源501-504 current source
511-514电阻511-514 resistor
521-524电感521-524 inductance
601-641曲线601-641 curve
651点651 points
71、72电容71, 72 capacitance
具体实施方式Detailed ways
有关本发明的前述及其它技术内容、特点与功效,在以下配合参考附图的三个实施例的详细说明中,将可清楚地呈现。The aforementioned and other technical contents, features and functions of the present invention will be clearly presented in the following detailed description of three embodiments with reference to the accompanying drawings.
在本发明被详细描述之前,要注意的是,在以下的说明内容中,类似的元件是以相同的编号来表示。Before the present invention is described in detail, it should be noted that in the following description, similar elements are denoted by the same reference numerals.
参阅图3,本发明开关电路的第一实施例包含二个金属氧化物半导体开关31、32及一调整单元5。每一金属氧化物半导体开关31、32包括一输入端及一输出端,且在本实施例中,是一N型金属氧化物半导体开关,但在其它实施例中,可以是一P型金属氧化物半导体开关或一互补型金属氧化物半导体开关。该二个金属氧化物半导体开关31、32在其输入端接收一对差动输入电压Vin+、Vin-,并在导通时在其输出端输出一对差动输出电压Vout+、Vout-。Referring to FIG. 3 , the first embodiment of the switch circuit of the present invention includes two metal oxide semiconductor switches 31 , 32 and an adjustment unit 5 . Each metal-oxide-semiconductor switch 31, 32 includes an input terminal and an output terminal, and in this embodiment, it is an N-type metal-oxide-semiconductor switch, but in other embodiments, it can be a P-type metal oxide semiconductor switch. semiconductor switch or a complementary metal oxide semiconductor switch. The two MOS switches 31, 32 receive a pair of differential input voltages Vin+, Vin- at their input terminals, and output a pair of differential output voltages Vout+, Vout- at their output terminals when turned on.
该调整单元5改变该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm,以调整该二个金属氧化物半导体开关31、32的差模电阻Rdiff的线性度,且Vcm,in、Vcm,out、Vdcm及Rdiff的定义如下所示:The adjustment unit 5 changes the difference Vdcm of the common-mode levels Vcm,in, Vcm,out of the input terminals and output terminals of the two MOS switches 31, 32 to adjust the two MOS switches 31, 32 The linearity of the differential mode resistance Rdiff, and the definitions of Vcm, in, Vcm, out, Vdcm and Rdiff are as follows:
Vcm,in=(Vin++Vin-)/2,Vcm,in=(Vin++Vin-)/2,
Vcm,out=(Vout++Vout-)/2,Vcm,out=(Vout++Vout-)/2,
Vdcm=Vcm,in-Vcm,out,Vdcm=Vcm,in-Vcm,out,
Rdiff=(Vin+-Vin-)/(Iin+-Iin-),Rdiff=(Vin+-Vin-)/(Iin+-Iin-),
其中,Iin+、Iin-是该二个金属氧化物半导体开关31、32在其输入端接收到的一对差动输入电流。Wherein, Iin+ and Iin− are a pair of differential input currents received by the two MOS switches 31 and 32 at their input terminals.
在本实施例中,该调整单元5包括四个电流源501-504,其中,该四个电流源501-504分别电连接到该二个金属氧化物半导体开关31、32的输入端及输出端,且每一金属氧化物半导体开关31、32的输入端及输出端分别从相对应的电流源501-504接收实质上大小相同但方向相反的电流。例如,当该电流源501注入电流到该金属氧化物半导体开关31的输入端时,该电流源502会从该金属氧化物半导体开关31的输出端汲取实质上大小相同的电流(与该电流源501相比),反之亦然。通过所述电流源501-504产生流经该二个金属氧化物半导体开关31、32的电流,配合该二个金属氧化物半导体开关31、32的导通电阻,可以改变该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm。In this embodiment, the adjustment unit 5 includes four current sources 501-504, wherein the four current sources 501-504 are respectively electrically connected to the input terminals and output terminals of the two metal oxide semiconductor switches 31, 32 , and the input terminal and the output terminal of each MOS switch 31, 32 respectively receive currents with substantially the same magnitude but opposite directions from the corresponding current sources 501-504. For example, when the current source 501 injects current into the input terminal of the MOS switch 31, the current source 502 will draw a current from the output terminal of the MOS switch 31 that is substantially the same magnitude (as the current source 501), and vice versa. The current flowing through the two metal oxide semiconductor switches 31, 32 is generated by the current sources 501-504, and the on-resistance of the two metal oxide semiconductor switches 31, 32 can be changed to change the current of the two metal oxide semiconductor switches 31, 32. The difference Vdcm of the common-mode levels Vcm,in, Vcm,out of the input terminals and output terminals of the semiconductor switches 31 and 32 .
图4至图8显示了本实施例的相关模拟结果。参阅图4,横轴表示该对差动输入电压Vin+、Vin-的差异Vdiff,纵轴表示该二个金属氧化物半导体开关31、32的差模电阻Rdiff,曲线601-605是分别在该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm=60mV、30mV、0V、-30mV及-60mV时获得的,且Vdiff的定义如下所示:Fig. 4 to Fig. 8 show relevant simulation results of this embodiment. Referring to FIG. 4, the horizontal axis represents the difference Vdiff of the pair of differential input voltages Vin+, Vin-, the vertical axis represents the differential mode resistance Rdiff of the two metal oxide semiconductor switches 31, 32, and the curves 601-605 are respectively in the two The common-mode levels Vcm, in, Vcm, out of the input terminals and output terminals of the metal oxide semiconductor switches 31, 32 are obtained when the difference Vdcm=60mV, 30mV, 0V, -30mV and -60mV, and the definition of Vdiff is as follows Shown:
Vdiff=Vin+-Vin-。Vdiff=Vin+-Vin-.
参阅图5,横轴表示该对差动输入电压Vin+、Vin-的差异Vdiff,纵轴表示该二个金属氧化物半导体开关31、32的差模电阻Rdiff的比例(以Vdiff=0时获得的Rdiff为基准),曲线611-615是分别在该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm=60mV、30mV、0V、-30mV及-60mV时获得的。5, the horizontal axis represents the difference Vdiff of the pair of differential input voltages Vin+, Vin-, and the vertical axis represents the ratio of the differential mode resistance Rdiff of the two metal oxide semiconductor switches 31, 32 (obtained when Vdiff=0 Rdiff is the benchmark), and the curves 611-615 are the common-mode level Vcm, in, Vcm, out difference Vdcm=60mV, 30mV, 0V, Obtained at -30mV and -60mV.
由图4与图5可知,在该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm接近30mV时,该二个金属氧化物半导体开关31、32的差模电阻Rdiff的变异是最小的,而当Vdcm愈小时,Rdiff愈小,且在该对差动输入电压Vin+、Vin-的差异Vdiff=0附近会有愈大的区域使得Rdiff的变异很小。It can be seen from FIG. 4 and FIG. 5 that when the difference Vdcm of the common-mode levels Vcm,in, Vcm,out of the input terminals and output terminals of the two metal oxide semiconductor switches 31, 32 is close to 30mV, the two metal oxide semiconductor switches 31, 32 The variation of the differential mode resistance Rdiff of the semiconductor switches 31, 32 is the smallest, and when the Vdcm is smaller, the Rdiff is smaller, and there will be a larger area around the difference Vdiff=0 of the pair of differential input voltages Vin+, Vin- Makes the variation of Rdiff very small.
接着,缩小该对差动输入电压Vin+、Vin-的差异Vdiff的范围,并增加该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm的范围。Next, narrow the range of the difference Vdiff between the pair of differential input voltages Vin+, Vin-, and increase the common-mode levels Vcm,in, Vcm,out of the input terminals and output terminals of the two metal oxide semiconductor switches 31,32 Differential Vdcm range.
参阅图6,横轴表示该对差动输入电压Vin+、Vin-的差异Vdiff,纵轴表示该二个金属氧化物半导体开关31、32的差模电阻Rdiff,曲线621-627是分别在该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm=60mV、30mV、0V、-30mV、-60mV、-90mV及-120mV时获得的。Referring to FIG. 6, the horizontal axis represents the difference Vdiff of the pair of differential input voltages Vin+, Vin-, the vertical axis represents the differential mode resistance Rdiff of the two metal oxide semiconductor switches 31, 32, and the curves 621-627 are respectively in the two The common mode levels Vcm, in, Vcm, and out of the input and output terminals of the metal oxide semiconductor switches 31 and 32 are obtained when the difference Vdcm=60mV, 30mV, 0V, -30mV, -60mV, -90mV and -120mV .
参阅图7,横轴表示该对差动输入电压Vin+、Vin-的差异Vdiff,纵轴表示该二个金属氧化物半导体开关31、32的差模电阻Rdiff的比例(以Vdiff=0时获得的Rdiff为基准),曲线631-637是分别在该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm=60mV、30mV、0V、-30mV、-60mV、-90mV及-120mV时获得的。7, the horizontal axis represents the difference Vdiff of the pair of differential input voltages Vin+, Vin-, and the vertical axis represents the ratio of the differential mode resistance Rdiff of the two metal oxide semiconductor switches 31, 32 (obtained when Vdiff=0 Rdiff is the benchmark), and the curves 631-637 are the common-mode level Vcm, in, Vcm, out difference Vdcm=60mV, 30mV, 0V, Acquired at -30mV, -60mV, -90mV and -120mV.
参阅图8,横轴表示该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm,纵轴表示图7中该二个金属氧化物半导体开关31、32的差模电阻Rdiff的比例与1的差距,曲线64 1是在该对差动输入电压Vin+、Vin-的差异Vdiff=50mV时获得的。Referring to FIG. 8, the horizontal axis represents the difference Vdcm of the common-mode levels Vcm, in, Vcm, and out of the input and output ends of the two metal oxide semiconductor switches 31, 32, and the vertical axis represents the difference Vdcm of the two metal oxide semiconductor switches 31, 32 in FIG. The difference between the ratio of the differential mode resistance Rdiff of the material semiconductor switches 31, 32 and 1, the curve 641 is obtained when the difference Vdiff=50mV of the pair of differential input voltages Vin+, Vin-.
由图6、图7与图8可知,虽然该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm存在一解使得该二个金属氧化物半导体开关31、32的差模电阻Rdiff的变异是最小的(如点651所示),但是如果使Vdcm愈小会得到另一解,因为此时Rdiff较小,且Rdiff的变异也很小。It can be seen from FIG. 6 , FIG. 7 and FIG. 8 that although there is a solution to the difference Vdcm between the input and output terminals of the two metal oxide semiconductor switches 31, 32, the difference Vdcm makes the two The variation of the differential mode resistance Rdiff of the metal-oxide-semiconductor switches 31 and 32 is the smallest (as shown in point 651), but if the Vdcm is made smaller, another solution will be obtained, because Rdiff is smaller at this time, and the variation of Rdiff is also small. very small.
参阅图9,本发明开关电路的第二实施例包含二个金属氧化物半导体开关31、32、一调整单元5及二个电容71、72。该二个金属氧化物半导体开关31、32在其输入端分别通过该二个电容71、72接收一对差动输入电压Vin+、Vin-,并在导通时在其输出端输出一对差动输出电压Vout+、Vout-。Referring to FIG. 9 , the second embodiment of the switch circuit of the present invention includes two metal oxide semiconductor switches 31 , 32 , an adjustment unit 5 and two capacitors 71 , 72 . The two metal-oxide-semiconductor switches 31, 32 respectively receive a pair of differential input voltages Vin+, Vin- through the two capacitors 71, 72 at their input terminals, and output a pair of differential input voltages at their output terminals when they are turned on. Output voltages Vout+, Vout-.
该调整单元5包括四电阻511-514。该二个金属氧化物半导体开关31、32的输入端分别通过该二电阻511、513电连接到一第一共模电压,而输出端分别通过该二电阻512、514电连接到一第二共模电压。该第一及第二共模电压分别设定该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out。The adjusting unit 5 includes four resistors 511-514. The input ends of the two metal oxide semiconductor switches 31, 32 are electrically connected to a first common mode voltage through the two resistors 511, 513 respectively, and the output ends are electrically connected to a second common mode voltage through the two resistors 512, 514 respectively. mode voltage. The first and second common-mode voltages respectively set the common-mode levels Vcm,in and Vcm,out of the input terminals and output terminals of the two MOS switches 31 and 32 .
参阅图10,本发明开关电路的第三实施例与该第二实例相似,不同之处在于本实施例是利用四个电感521-524分别取代该四电阻511-514。Referring to FIG. 10 , the third embodiment of the switching circuit of the present invention is similar to the second embodiment, except that the four resistors 511-514 are replaced by four inductors 521-524 in this embodiment.
由于该第二及第三实施例的相关模拟结果与该第一实施例的相关模拟相似,此处不再多加说明。Since the relevant simulation results of the second and third embodiments are similar to those of the first embodiment, further description is omitted here.
参阅图11,上述实施例可以运用在一可变增益放大器(如图11(a)所示)、用于选择由二接收器中的哪一个接收信号(如图11(b)所示)、用于选择由二发送器中的哪一个发送信号(如图11(c)所示),及用于选择由二电路中的哪一个输出信号到下一级电路(如图11(d)所示),且不以此为限。Referring to Fig. 11, the above-mentioned embodiment can be applied in a variable gain amplifier (as shown in Fig. 11(a)), which is used to select which one of the two receivers receives the signal (as shown in Fig. 11(b)), It is used to select which one of the two transmitters sends the signal (as shown in Figure 11(c)), and is used to select which one of the two circuits outputs the signal to the next stage circuit (as shown in Figure 11(d) shown), but not limited to.
归纳上述,本发明通过改变该二个金属氧化物半导体开关31、32的输入端与输出端的共模电平Vcm,in、Vcm,out的差异Vdcm,可以调整该二个金属氧化物半导体开关31、32的差模电阻Rdiff的线性度,以达到本发明的目的。To sum up the above, the present invention can adjust the two metal oxide semiconductor switches 31 by changing the difference Vdcm of the common mode level Vcm, in, Vcm, out of the input terminal and the output terminal of the two metal oxide semiconductor switches 31, 32. , The linearity of the differential mode resistance Rdiff of 32, in order to achieve the purpose of the present invention.
惟以上所述者,仅为本发明的实施例而已,当不能以此限定本发明实施的范围,即大凡依本发明申请专利范围及发明说明内容所作的简单的等效变化与修饰,皆仍属本发明专利涵盖的范围内。But the above-mentioned ones are only embodiments of the present invention, and should not limit the scope of the present invention with this, that is, all simple equivalent changes and modifications made according to the patent scope of the present invention and the contents of the description of the invention are still the same. It belongs to the scope covered by the patent of the present invention.
Claims (7)
1. switching circuit comprises:
Two metal oxide semiconductor switch, each metal oxide semiconductor switch comprises an input and an output, these two metal oxide semiconductor switch receive the pair of differential input voltage at its input, and export the pair of differential output voltage at its output when conducting; And
One adjustment unit changes the difference of the common mode electrical level of the common mode electrical level of input of these two metal oxide semiconductor switch and output, with the linearity of the differential mode resistance of adjusting these two metal oxide semiconductor switch;
Wherein the common mode electrical level of the common mode electrical level of input and output is respectively this mean value and this mean value to differential output voltage to differential input voltage, and
This differential mode resistance is defined at the ratio of the difference of the pair of differential input current of its input reception by these difference and this two metal oxide semiconductor switch to differential input voltage.
2. switching circuit according to claim 1, wherein, these two metal oxide semiconductor switch are N type metal oxide semiconductor switches.
3. switching circuit according to claim 1, wherein, these two metal oxide semiconductor switch are P-type mos switches.
4. switching circuit according to claim 1, wherein, these two metal oxide semiconductor switch are CMOS (Complementary Metal Oxide Semiconductor) switches.
5. switching circuit according to claim 1, wherein, this adjustment unit comprises four current sources, these four current sources are electrically connected to the input and the output of these two metal oxide semiconductor switch respectively,
Wherein, the input of each metal oxide semiconductor switch and output receive big or small in fact identical but electric current that direction is opposite from corresponding current source.
6. switching circuit according to claim 1, more comprise two electric capacity, wherein, these two metal oxide semiconductor switch receive this to differential input voltage by these two electric capacity respectively at its input, this adjustment unit comprises four resistance, the input of these two metal oxide semiconductor switch is electrically connected to one first common-mode voltage by two in this four resistance respectively, and output respectively by in this four resistance in addition two be electrically connected to one second common-mode voltage, this first and second common-mode voltage is set the input of these two metal oxide semiconductor switch and the common mode electrical level of output respectively.
7. switching circuit according to claim 1, more comprise two electric capacity, wherein, these two metal oxide semiconductor switch receive this to differential input voltage by these two electric capacity respectively at its input, this adjustment unit comprises four inductance, the input of these two metal oxide semiconductor switch is electrically connected to one first common-mode voltage by two in these four inductance respectively, and output respectively by in these four inductance in addition two be electrically connected to one second common-mode voltage, this first and second common-mode voltage is set the input of these two metal oxide semiconductor switch and the common mode electrical level of output respectively.
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