CN101510034B - Liquid crystal display - Google Patents

本发明的液晶显示器包括：大量象素，每个象素具有液晶层和大量用于对液晶层施加电压的电极，象素呈行列矩阵分布，其特征在于：大量象素的每一个具有可以对液晶层施加互不相同的电压的第一子象素和第二子象素，在确定灰度下第一子象素具有高于第二子象素的亮度；第一子象素和第二子象素每个包括：由反电极和经液晶层与反电极相对的子象素电极形成的液晶电容，和由电连接到子象素电极上的存储电容电极、绝缘层和经绝缘层与存储电容电极相对的存储电容反电极形成的存储电容；反电极为由第一子象素和第二子象素共享的单电极，第一子象素和第二子象素的存储电容反电极彼此电绝缘；和大量象素中任何第一子象素的存储电容反电极与列方向上任何相邻象素的第二子象素的存储电容反电极彼此电绝缘。The liquid crystal display of the present invention comprises: a large number of pixels, each pixel has a liquid crystal layer and a large number of electrodes for applying a voltage to the liquid crystal layer, and the pixels are distributed in a matrix of rows and columns, and it is characterized in that: each of a large number of pixels has a voltage that can be applied to the liquid crystal layer The liquid crystal layer applies different voltages to the first sub-pixel and the second sub-pixel, and the first sub-pixel has a brightness higher than that of the second sub-pixel at a certain gray scale; the first sub-pixel and the second sub-pixel Each of the sub-pixels includes: a liquid crystal capacitor formed by a counter electrode and a sub-pixel electrode opposite to the counter electrode through a liquid crystal layer, and a storage capacitor electrode electrically connected to the sub-pixel electrode, an insulating layer, and a The storage capacitor formed by the storage capacitor counter electrode opposite to the storage capacitor electrode; the counter electrode is a single electrode shared by the first sub-pixel and the second sub-pixel, and the storage capacitor counter electrode of the first sub-pixel and the second sub-pixel electrically insulated from each other; and the storage capacitor counter electrode of any first sub-pixel in the plurality of pixels is electrically insulated from the storage capacitor counter electrode of any second sub-pixel of adjacent pixels in the column direction.

液晶显示器LCD Monitor

本申请是申请日为2004年12月3日，申请号为200410099783X，名为“液晶显示器”申请的分案申请。This application is a divisional application with an application date of December 3, 2004, an application number of 200410099783X, and an application named "Liquid Crystal Display".

技术领域 technical field

本发明涉及一种可以减小液晶显示器中γ特性的视角依赖性的结构和/或驱动方法。The present invention relates to a structure and/or driving method capable of reducing viewing angle dependence of gamma characteristics in a liquid crystal display.

背景技术 Background technique

液晶显示器是一种具有良好特性(包括高分辨率、较小的厚度、较轻的重量和较低的功耗)的平板显示器。随着显示性能和产量的提高以及与其它类型显示器相比的价格优势，其市场份额也在迅速扩张。A liquid crystal display is a flat panel display with favorable characteristics including high resolution, small thickness, light weight, and low power consumption. Its market share is also expanding rapidly with the improvement of display performance and yield, and its price advantage compared with other types of displays.

通常常规使用的扭曲相列向(TN)液晶显示器具有正介电各向异性的液晶分子，液晶分子以其长轴取向近似平行于基底表面且沿液晶层的厚度方向扭转90°的方式分布在上下基底之间。当对液晶层施加电压时，液晶分子开始平行于电场，释放扭转排列。TN液晶显示器利用电压造成的液晶分子的取向改变导致的旋转极化的改变来控制透光量。Generally, the conventionally used twisted nematic (TN) liquid crystal display has liquid crystal molecules with positive dielectric anisotropy. between the upper and lower bases. When a voltage is applied to the liquid crystal layer, the liquid crystal molecules start parallel to the electric field, releasing the twist alignment. The TN liquid crystal display uses the change of the rotation polarization caused by the change of the orientation of the liquid crystal molecules caused by the voltage to control the amount of light transmitted.

TN液晶显示器允许有很宽的制造容限和高的产量。另一方面，它还有显示性能、尤其是视角特性的问题。具体地说，当斜视TN液晶显示器的显示表面时，显示对比度下降得相当厉害。因此，即使从正前方看时图象清晰地呈现出从黑到白多个灰度，但在斜视时灰度之间的亮度差也显得极不清晰。此外，还存在从正前方看时显暗的部分在斜视时显亮的现象。TN liquid crystal displays allow wide manufacturing tolerances and high yields. On the other hand, it also has issues with display performance, especially viewing angle characteristics. Specifically, when the display surface of a TN liquid crystal display is viewed obliquely, the display contrast drops considerably. Therefore, even if the image clearly shows multiple gray scales from black to white when viewed from the front, the brightness difference between the gray scales appears extremely unclear when squinted. In addition, there is also a phenomenon that a portion that appears dark when viewed from the front appears bright when viewed from the side.

为了改善TN液晶显示器的视角特性，近来开发了一些液晶显示器，包括日本公开专利JP63-21907中描述的共面切换(IPS)型液晶显示器、日本待公开专利中描述的多畴垂直排列(MVA)型液晶显示器、日本待公开专利JP10-186330中描述的轴向对称微盒(ASM)型显示器，和日本待公开专利JP2002-55343中描述的液晶显示器。In order to improve the viewing angle characteristics of TN liquid crystal displays, some liquid crystal displays have been developed recently, including the in-plane switching (IPS) type liquid crystal display described in Japanese laid-open patent JP63-21907, the multi-domain vertical alignment (MVA) described in Japanese laid-open patent type liquid crystal display, an axially symmetric microcell (ASM) type display described in Japanese laid-open patent JP10-186330, and a liquid crystal display described in Japanese laid-open patent JP2002-55343.

采用上述任一新颖模式(宽视角模式)的液晶显示器解决了视角特性的具体问题。尤其是它们没有在斜视TN液晶显示器的显示表面时表现出的对比度或显示灰度显著下降的问题。A liquid crystal display employing any of the novel modes described above (wide viewing angle mode) solves specific problems of viewing angle characteristics. In particular, they do not have the problem of a significant drop in contrast or display gradation exhibited when the display surface of the TN liquid crystal display is squinted.

在液晶显示器的显示质量得到改善的情况下，又面临视角特性的新问题，即γ特性的视角依赖性，这意味着从正前方观看显示器和斜视显示器时存在γ特性差异。这样在显示图象(例如照片)或显示电视广播等时就出现问题。In the case of improved display quality of liquid crystal displays, a new problem of viewing angle characteristics is faced, that is, the viewing angle dependence of γ characteristics, which means that there is a difference in γ characteristics when viewing the display from the front and obliquely viewing the display. This causes problems when displaying images such as photographs or displaying television broadcasts or the like.

γ特性的视角依赖性在MVA模式和ASM模式中比在IPS模式中更为突出。另一方面，比MVA或ASM板更难以高产量地制作从正前方看时具有较高对比度的IPS板。因而，希望减小MVA模式或ASM模式的γ特性的视角依赖性。The viewing angle dependence of the γ properties is more prominent in the MVA mode and the ASM mode than in the IPS mode. On the other hand, it is more difficult to produce IPS panels with high contrast when viewed from the front at high yield than MVA or ASM panels. Therefore, it is desired to reduce the viewing angle dependence of the γ characteristic of the MVA mode or the ASM mode.

鉴于上述问题产生了本发明。本发明的主要目的在于提供一种具有减小的γ特性视角依赖性的液晶显示器。The present invention has been made in view of the above problems. A main object of the present invention is to provide a liquid crystal display having reduced viewing angle dependence of gamma characteristics.

发明内容 Contents of the invention

为了实现上述目的，本发明的第一方面提供了一种常黑模式的液晶显示器，其包括大量象素，每个象素具有液晶层和用于给液晶层施加电压的大量电极，其特征在于：大量象素的每一个包括可以对各自的液晶层施加互不相同的电压的第一子象素和第二子象素；并且当大量象素的每一个显示满足0≤gk≤gn的灰度gk时(其中gk和gn为不小于零的整数，并且gk的较大值对应于较高的亮度)，如果假设ΔV12(gk)＝V1(gk)-V2(gk)，则至少在0＜gk≤n-1的范围内满足关系ΔV12(gk)＞0V和ΔV12(gk)＞ΔV12(gk+1)，其中，V1(gk)和V2(gk)是分别施加到第一子象素和第二子象素的液晶层的方均根电压。顺便说一下，此处的“象素”代表液晶显示器上的最小显示单元，在彩色显示器的情况下，其对应于显示单种颜色(典型地为R、G或B)“象元(或点)”。In order to achieve the above object, the first aspect of the present invention provides a normally black mode liquid crystal display, which includes a large number of pixels, each pixel has a liquid crystal layer and a large number of electrodes for applying voltage to the liquid crystal layer, characterized in that : Each of a large number of pixels includes a first sub-pixel and a second sub-pixel that can apply voltages different from each other to the respective liquid crystal layers; and when each of a large number of pixels displays a gray color satisfying 0≤gk≤gn When the degree gk (where gk and gn are integers not less than zero, and a larger value of gk corresponds to a higher brightness), if it is assumed that ΔV12(gk)=V1(gk)-V2(gk), then at least in 0 <gk≤n-1 satisfies the relationship ΔV12(gk)>0V and ΔV12(gk)>ΔV12(gk+1), wherein, V1(gk) and V2(gk) are respectively applied to the first sub-pixel and the RMS voltage of the liquid crystal layer of the second sub-pixel. By the way, "pixel" here represents the smallest display unit on a liquid crystal display, and in the case of a color display, it corresponds to a "pixel (or dot) displaying a single color (typically R, G, or B). )".

液晶显示器可以这样构造：大量象素中的每一个包括可以对其液晶层施加不同于第一子象素和第二子象素的电压的第三子象素；和当大量象素的每一个显示灰度gk，并且ΔV13(gk)＝V1(gk)-V3(gk)时，如果向第三子象素的液晶层施加的方均根电压为V3(gk)，则满足关系0V＜ΔV13(gk)＜ΔV12(gk)。The liquid crystal display can be constructed in such a way that each of the large number of pixels includes a third sub-pixel to which a voltage different from that of the first sub-pixel and the second sub-pixel can be applied to its liquid crystal layer; and when each of the large number of pixels Display grayscale gk, and when ΔV13(gk)=V1(gk)-V3(gk), if the root mean square voltage applied to the liquid crystal layer of the third sub-pixel is V3(gk), then the relationship 0V<ΔV13(gk) is satisfied )<ΔV12(gk).

优选施加到液晶层的方均根电压至少在0＜gk≤n-1的范围内满足关系ΔV12(gk)≥ΔV12(gk+1)。It is preferable that the root mean square voltage applied to the liquid crystal layer satisfies the relationship ΔV12(gk)≥ΔV12(gk+1) at least in the range of 0<gk≤n-1.

优选当每个象素有第三子象素时，至少在0＜gk≤n-1的范围内满足关系ΔV12(gk)≥ΔV12(gk+1)和ΔV13(gk)≥ΔV13(gk+1)。Preferably, when each pixel has a third sub-pixel, the relations ΔV12(gk)≥ΔV12(gk+1) and ΔV13(gk)≥ΔV13(gk+1) are satisfied at least in the range of 0<gk≤n-1 ).

在优选实施例中，第一子象素和第二子象素每个包括：由反电极和经液晶层与反电极相对的子象素电极形成的液晶电容；以及由电连接到子象素电极的存储电容、绝缘层和经绝缘层与存储电容电极相对的存储电容反电极形成的存储电容；并且反电极为与第一子象素和第二子象素共享的单电极，第一子象素和第二子象素的存储电容反电极彼此电绝缘。典型地，反电极设置在相对基底(有时称作“公共电极”)上，但在IPS模式中，反电极设置在与子象素电极相同的基底上。顺便说一下，“经液晶层与子象素电极相对的反电极”不必与子象素电极隔液晶层的厚度相对。在IPS液晶显示器中，其放置在液晶层中与子象素电极隔液晶层相对。In a preferred embodiment, each of the first sub-pixel and the second sub-pixel includes: a liquid crystal capacitor formed by a counter electrode and a sub-pixel electrode opposite to the counter electrode through a liquid crystal layer; The storage capacitor of the electrode, the insulating layer and the storage capacitor counter electrode formed by the insulating layer and the storage capacitor electrode opposite to the storage capacitor; and the counter electrode is a single electrode shared with the first sub-pixel and the second sub-pixel, the first sub-pixel The storage capacitor counter electrodes of the pixel and the second sub-pixel are electrically insulated from each other. Typically, the counter electrode is provided on an opposing substrate (sometimes referred to as a "common electrode"), but in IPS mode, the counter electrode is provided on the same substrate as the subpixel electrodes. By the way, the "counter electrode opposite to the sub-pixel electrode via the liquid crystal layer" need not be opposite to the sub-pixel electrode across the thickness of the liquid crystal layer. In an IPS liquid crystal display, it is placed in the liquid crystal layer and is opposite to the sub-pixel electrode across the liquid crystal layer.

在优选实施例中，液晶显示器包括两个分别为第一子象素和第二子象素设置的开关元件，其特征在于两个开关元件通过供给公共扫描线的扫描线信号电压开和关；两个开关元件开启时，显示信号电压从公共信号线施加到第一子象素和第二子象素的各个子象素电极和存储电容电极上；两个开关元件关闭后，第一子象素和第二子象素的各个存储电容反电极的电压改变；以及由变化的大小和方向限定的变化量在第一子象素和第二子象素之间不同。此处不仅关于大小(绝对值)，而且关于方向定义存储电容反电极的变化量。例如，第一子象素和第二子象素的存储电容反电极的电压变化量的绝对值相等、符号相反。简言之，如果在开关元件断开后其中一个存储电容反电极的电压升高而另一个存储电容反电极的电压下降，则变化的绝对值可以相等。In a preferred embodiment, the liquid crystal display includes two switching elements respectively provided for the first sub-pixel and the second sub-pixel, characterized in that the two switching elements are turned on and off by the scanning line signal voltage supplied to the common scanning line; When the two switching elements are turned on, the display signal voltage is applied from the common signal line to the respective sub-pixel electrodes and storage capacitor electrodes of the first sub-pixel and the second sub-pixel; after the two switching elements are turned off, the first sub-image The voltages of the counter electrodes of the respective storage capacitors of the pixel and the second sub-pixel change; and the amount of change defined by the magnitude and direction of the change is different between the first sub-pixel and the second sub-pixel. The variation of the storage capacitor counter-electrode is defined here not only with respect to magnitude (absolute value), but also with respect to direction. For example, the absolute values and opposite signs of the voltage changes of the storage capacitor counter electrodes of the first sub-pixel and the second sub-pixel are equal. In short, if the voltage at the counter-electrode of one of the storage capacitors increases and the voltage at the counter-electrode of the other storage capacitor decreases after the switching element is turned off, the absolute values of the changes can be equal.

优选液晶层为垂直排列的液晶层，且包含具有负介电各向异性的相列向液晶材料。Preferably, the liquid crystal layer is a homeotropic liquid crystal layer and contains a nematic liquid crystal material with negative dielectric anisotropy.

优选第一子象素和第二子象素每个的液晶层都包含在方位角方向上相隔大约90°的四个畴，在四个畴中当施加电压时液晶分子就倾斜。Preferably, the liquid crystal layer of each of the first sub-pixel and the second sub-pixel includes four domains separated by about 90° in the azimuthal direction, in which the liquid crystal molecules are tilted when a voltage is applied.

优选第一子象素和第二子象素放置在公共信号线的相反侧；第一子象素和第二子象素在反电极一侧每个都有大量的凸向液晶层的肋，大量的肋包括在第一方向上延伸的第一肋和在近似垂直于第一方向的第二方向上延伸的第二肋；并且在第一子象素和第二子象素每个中第一肋与第二肋相对于平行于公共扫描线的中心线对称设置，并且在第一和第二子象素的之一中第一肋和第二肋的分布相对于其它子象素中第一肋和第二肋的分布对称。Preferably, the first sub-pixel and the second sub-pixel are placed on opposite sides of the common signal line; each of the first sub-pixel and the second sub-pixel has a large number of ribs protruding toward the liquid crystal layer on the side of the counter electrode, The plurality of ribs include first ribs extending in a first direction and second ribs extending in a second direction approximately perpendicular to the first direction; and in each of the first sub-pixel and the second sub-pixel A rib and the second rib are arranged symmetrically with respect to the center line parallel to the common scanning line, and the distribution of the first rib and the second rib in one of the first and second sub-pixels is relative to that of the first rib in the other sub-pixel. The distribution of the first rib and the second rib is symmetrical.

优选在第一子象素和第二子象素每个中平行于公共扫描线的中心线以近似等于第一子象素和第二子象素中扫描线阵列间距一半的间隔设置。Preferably, in each of the first sub-pixel and the second sub-pixel, the central line parallel to the common scanning line is arranged at an interval approximately equal to half the pitch of the scanning line array in the first sub-pixel and the second sub-pixel.

优选第一子象素的面积等于或小于第二子象素的面积。当大量象素的每一个都有三个或更多个子象素时，优选被施加最大方均根电压的子象素面积不大于其它子象素的面积。Preferably, the area of the first sub-pixel is equal to or smaller than the area of the second sub-pixel. When each of a large number of pixels has three or more sub-pixels, it is preferable that the area of the sub-pixel to which the maximum rms voltage is applied is not larger than the area of other sub-pixels.

在根据本发明另一方面的液晶显示器中：施加到大量象素中液晶层上的电场方向在每个垂直扫描周期之间反转；以及当显示中等灰度时，在任意行象素的情形中，电场方向在行方向上周期性反转，在任一列象素的情形中，列方向上每个象素的电场方向反转。In a liquid crystal display according to another aspect of the present invention: the direction of the electric field applied to the liquid crystal layer in a large number of pixels is reversed between each vertical scanning period; In , the direction of the electric field is periodically reversed in the row direction, and in the case of any column of pixels, the direction of the electric field is reversed for each pixel in the column direction.

根据一个实施例，在任意行象素的情形中，行方向上每个象素的电场方向反转。According to one embodiment, in the case of any row of pixels, the direction of the electric field is reversed for each pixel in the row direction.

根据一个实施例，在任意行象素的情形中，行方向上每两个象素的电场方向反转。According to one embodiment, in the case of any row of pixels, the direction of the electric field is reversed every two pixels in the row direction.

根据一个实施例的液晶显示器以常黑模式工作；其特征在于至少两个子象素包括两个子象素SPa(p，q)和SPb(p，q)；以及当大量象素的每一个显示满足0≤gk≤gn的灰度gk时(其中gk和gn是不小于零的整数，并且较大的gk值对应于较高的亮度)，如果假设ΔV12(gk)＝V1(gk)-V2(gk)，则至少在0＜gk≤n-1的范围内满足关系ΔV12(gk)＞0V和ΔV12(gk)≥ΔV12(gk+1)，其中，V1(gk)和V2(gk)是分别施加到第一子象素和第二子象素的液晶层上的方均根电压。A liquid crystal display according to an embodiment works in a normally black mode; It is characterized in that at least two sub-pixels include two sub-pixels SPa (p, q) and SPb (p, q); and when each display of a large number of pixels satisfies When the grayscale gk of 0≤gk≤gn (where gk and gn are integers not less than zero, and a larger gk value corresponds to a higher brightness), if it is assumed that ΔV12(gk)=V1(gk)-V2( gk), then the relationship ΔV12(gk)>0V and ΔV12(gk)≥ΔV12(gk+1) is satisfied at least in the range of 0<gk≤n-1, where V1(gk) and V2(gk) are respectively RMS voltage applied to the liquid crystal layer of the first sub-pixel and the second sub-pixel.

根据一个实施例，至少在0＜gk≤n-1的范围内满足关系ΔV12(gk)≥ΔV12(gk+1)。According to one embodiment, the relationship ΔV12(gk)≧ΔV12(gk+1) is satisfied at least in the range of 0<gk≦n−1.

根据一个实施例，SPa(p，q)和SPb(p，q)每个包括：由反电极和经液晶层与反电极相对的子象素电极形成的液晶电容，和由电连接到子象素电极的存储电容电极、绝缘层和经绝缘层与存储电容相对的存储电容反电极形成的存储电容；以及反电极为SPa(p，q)和SPb(p，q)共享的单电极，SPa(p，q)和SPb(p，q)的存储电容反电极彼此电绝缘。According to one embodiment, each of SPa(p, q) and SPb(p, q) includes: a liquid crystal capacitance formed by a counter electrode and a sub-pixel electrode opposite to the counter electrode through a liquid crystal layer, and a sub-pixel electrode electrically connected to the sub-image The storage capacitor electrode of the prime electrode, the insulating layer and the storage capacitor counter electrode formed by the insulating layer and the storage capacitor opposite to the storage capacitor; and the counter electrode is a single electrode shared by SPa (p, q) and SPb (p, q), SPa The storage capacitor counter electrodes of (p,q) and SPb(p,q) are electrically insulated from each other.

根据一个实施例，液晶显示器包括分别为SPa(p，q)和SPb(p，q)设置的两个开关元件，其特征在于这两个开关元件通过供给公共扫描线的扫描线信号电压开和关；这两个开关元件开启时，显示信号电压从公共信号线施加到SPa(p，q)和SPb(p，q)的各个子象素电极和存储电容电极上；这两个开关元件关闭后，SPa(p，q)和SPb(p，q)的各个存储电容反电极的电压就改变；并且由变化的大小和方向限定的变化量在SPa(p，q)和SPb(p，q)之间不同。具体地说，当这两个开关元件开启时，电压就施加到VSpa(on)和VSpb(on)的各个存储电容反电极上，从而使得当这两个开关元件断开时，各个存储电容反电极的电势将改变，例如分别从VSpa(on)和VSpb(on)变为VSpa(off)和VSpb(off)，并且各个变化量“VSpa(off)-VSpa(on)”和“VSpb(off)-VSpb(on)”将互不相同。According to one embodiment, the liquid crystal display includes two switching elements respectively provided for SPa(p, q) and SPb(p, q), characterized in that the two switching elements are switched on and off by a scanning line signal voltage supplied to a common scanning line. Off; when these two switching elements are turned on, the display signal voltage is applied from the common signal line to the respective sub-pixel electrodes and storage capacitor electrodes of SPa (p, q) and SPb (p, q); these two switching elements are turned off Afterwards, the voltages of the counter electrodes of the respective storage capacitors of SPa(p, q) and SPb(p, q) are changed; ) are different. Specifically, when the two switching elements are turned on, the voltage is applied to the opposite electrodes of the respective storage capacitors VSpa(on) and VSpb(on), so that when the two switching elements are turned off, the respective storage capacitors are reversed. The potential of the electrodes will change, for example, from VSpa(on) and VSpb(on) to VSpa(off) and VSpb(off), respectively, and the respective changes "VSpa(off)-VSpa(on)" and "VSpb(off )-VSpb(on)" will be different from each other.

根据一个实施例，SPa(p，q)和SPb(p，q)存储电容反电极的电压变化在量上相等，方向上相反。According to one embodiment, the voltage changes at the counter electrodes of the SPa(p, q) and SPb(p, q) storage capacitors are equal in magnitude and opposite in direction.

根据一个实施例，SPa(p，q)和SPb(p，q)的存储电容反电极的电压是彼此有180°相位差的振荡电压。振荡电压可以是矩形波、正弦波或三角波。According to one embodiment, the voltages at the opposite electrodes of the storage capacitors SPa(p,q) and SPb(p,q) are oscillating voltages 180° out of phase with each other. The oscillating voltage can be a rectangular wave, a sine wave or a triangular wave.

根据一个实施例，SPa(p，q)和SPb(p，q)的存储电容反电极的振荡电压每个具有近似等于一个水平扫描周期的周期。According to one embodiment, the oscillating voltages of the storage capacitor counter electrodes of SPa(p,q) and SPb(p,q) each have a period approximately equal to one horizontal scanning period.

根据一个实施例，SPa(p，q)和SPb(p，q)的存储电容反电极的振荡电压每个具有短于一个水平扫描周期的周期。According to one embodiment, the oscillating voltages of the storage capacitor counter electrodes of SPa(p, q) and SPb(p, q) each have a period shorter than one horizontal scanning period.

根据一个实施例，如果在周期内平均，SPa(p，q)和SPb(p，q)的存储电容反电极的振荡电压在任何水平扫描周期中近似相等。According to one embodiment, the oscillating voltages at the storage capacitor counter electrodes of SPa(p,q) and SPb(p,q) are approximately equal during any horizontal scanning period if averaged over the period.

根据一个实施例，振荡周期是一个水平扫描周期的一半。According to one embodiment, the oscillation period is half of a horizontal scanning period.

根据一个实施例，振荡电压是占空比为1∶1的矩形波。According to one embodiment, the oscillating voltage is a rectangular wave with a duty ratio of 1:1.

根据一个实施例，SPa(p，q)和SPb(p，q)具有不同的面积，小的面积属于具有施加到其液晶层上的较大方均根电压的SPa(p，q)或SPb(p，q)。According to one embodiment, SPa(p, q) and SPb(p, q) have different areas, the smaller area belongs to SPa(p, q) or SPb( p, q).

根据一个实施例，SPa(p，q)和SPb(p，q)的面积实际上相等。According to one embodiment, the areas of SPa(p,q) and SPb(p,q) are substantially equal.

本发明的第三方面提供了一种液晶显示器，其包括：大量象素，每个象素具有液晶层和大量用于给液晶层施加电压的电极，电极呈行列矩阵分布，其特征在于：大量象素的每一个具有可以给液晶层施加互不相同的电压的第一子象素和第二子象素，在确定灰度下第一子象素具有高于第二子象素的亮度；第一子象素和第二子象素每个包括：由反电极和经液晶层与反电极相对的子象素电极形成的液晶电容，和由电连接到子象素电极上的存储电容电极、绝缘层和经绝缘层与存储电容电极相对的存储电容反电极形成的存储电容；反电极为由第一子象素和第二子象素共享的单电极，第一子象素和第二子象素的存储电容反电极彼此电绝缘；大量象素任一个中的第一子象素的存储电容反电极与列方向上任何象素相邻的一个象素的第二子象素的存储电容反电极彼此电绝缘。The third aspect of the present invention provides a liquid crystal display, which includes: a large number of pixels, each pixel has a liquid crystal layer and a large number of electrodes for applying voltage to the liquid crystal layer, the electrodes are distributed in a matrix of rows and columns, and it is characterized in that: a large number of Each of the pixels has a first sub-pixel and a second sub-pixel capable of applying mutually different voltages to the liquid crystal layer, and the first sub-pixel has a brightness higher than that of the second sub-pixel under a certain gray scale; Each of the first sub-pixel and the second sub-pixel includes: a liquid crystal capacitor formed by a counter electrode and a sub-pixel electrode opposite to the counter electrode through a liquid crystal layer, and a storage capacitor electrode electrically connected to the sub-pixel electrode , an insulating layer and a storage capacitor formed by a storage capacitor counter electrode opposite to the storage capacitor electrode through the insulating layer; the counter electrode is a single electrode shared by the first sub-pixel and the second sub-pixel, and the first sub-pixel and the second sub-pixel The storage capacitor counter electrodes of the sub-pixels are electrically insulated from each other; the storage capacitor counter electrodes of the first sub-pixel in any one of a large number of pixels are stored in the second sub-pixel of a pixel adjacent to any pixel in the column direction. The capacitor counter electrodes are electrically insulated from each other.

根据一个实施例，任何象素的第一子象素分布成与列方向上任何象素的相邻象素的第二子象素相邻。According to one embodiment, the first sub-pixels of any pixel are distributed adjacent to the second sub-pixels of adjacent pixels of any pixel in the column direction.

根据一个实施例，在多个象素的每个中，第一子象素分布成在列方向上与第二子象素相邻。According to one embodiment, in each of the plurality of pixels, the first sub-pixels are distributed adjacent to the second sub-pixels in the column direction.

根据一个实施例，液晶显示器包括彼此电绝缘的大量存储电容柱，其特征在于每个存储电容柱经存储电容线电连接到大量象素中的第一子象素和第二子象素的任意存储电容反电极上。According to one embodiment, the liquid crystal display includes a large number of storage capacitor columns electrically insulated from each other, and is characterized in that each storage capacitor column is electrically connected to any of the first sub-pixel and the second sub-pixel in the plurality of pixels via a storage capacitor line. on the storage capacitor counter electrode.

根据一个实施例，大量存储电容柱(trunk)中彼此电绝缘的存储电容柱的数量为L，由每个存储电容柱供给的存储电容反电压为振荡电压，振荡周期为水平扫描周期的L倍。According to one embodiment, the number of storage capacitor columns electrically insulated from each other in a large number of storage capacitor columns (trunk) is L, and the storage capacitor reverse voltage supplied by each storage capacitor column is an oscillation voltage, and the oscillation period is L times of the horizontal scanning period .

根据一个实施例，彼此电绝缘的大量存储电容柱为，组成成对存储电容柱的偶数个存储电容柱，供给彼此有180°相位差的振荡的存储电容反电压。According to one embodiment, the plurality of storage capacitor columns electrically insulated from each other is that an even number of storage capacitor columns forming a pair of storage capacitor columns supplies oscillating storage capacitor counter voltages with a phase difference of 180° from each other.

根据一个实施例，彼此电绝缘的存储电容柱的数量比通过CR时间常数划分一个水平扫描周期获得的份额大8倍，其中CR时间常数接近存储电容线的最大负载阻抗。According to one embodiment, the number of storage capacitor columns electrically insulated from each other is 8 times larger than the fraction obtained by dividing one horizontal scanning period by a CR time constant close to the maximum load impedance of the storage capacitor line.

根据一个实施例，彼此电绝缘的存储电容柱的数量比通过CR时间常数划分一个水平扫描周期获得的份额大8倍，并且为偶数，其中CR时间常数接近存储电容线的最大负载阻抗。According to one embodiment, the number of storage capacitor columns electrically insulated from each other is 8 times greater than the fraction obtained by dividing one horizontal scanning period by a CR time constant close to the maximum load impedance of the storage capacitor line, and is an even number.

根据一个实施例，大量的存储电容柱包括彼此电绝缘的第一存储电容柱和第二存储电容柱；以及如果连接到位于任意列与大量象素形成的行中指定行n交叉处的象素的第一子象素的存储电容反电极的存储电容线设为CSBL_A_n，如果连接到第二子象素的存储电容反电极上的存储电容线设为CSBL_B_n，并且如果k为自然数(包括0)，则CSBL_A_n+k就连接到第一存储电容柱上，而CSBL_B_n就连接到第二存储电容柱上。According to one embodiment, the plurality of storage capacitor columns includes a first storage capacitor column and a second storage capacitor column electrically insulated from each other; The storage capacitor line of the storage capacitor counter electrode of the first sub-pixel is set as CSBL_A_n, if the storage capacitor line connected to the storage capacitor counter electrode of the second sub-pixel is set as CSBL_B_n, and if k is a natural number (including 0) , then CSBL_A_n+k is connected to the first storage capacitor column, and CSBL_B_n is connected to the second storage capacitor column.

根据一个实施例，分别通过第一和第二存储电容柱供给的第一和第二存储电容反电压的振荡周期是水平扫描周期的两倍。According to one embodiment, the oscillation period of the counter voltages of the first and second storage capacitors respectively supplied through the first and second storage capacitor columns is twice the horizontal scanning period.

根据一个实施例，第二存储电容反电压比第一存储电容反电压滞后一个水平扫描周期的相位差。According to an embodiment, the counter voltage of the second storage capacitor lags behind the counter voltage of the first storage capacitor by a phase difference of one horizontal scanning period.

根据一个实施例，液晶显示器包括两个分别为第一子象素和第二子象素设置的开关元件，其特征在于这两个开关元件通过供给公共扫描线的扫描线信号电压开和关；当这两个开关元件开启时，显示信号电压从公共信号线施加到第一子象素和第二子象素的各自子象素电极和存储电容电极上；当这两个开关元件关闭后，第一子象素和第二子象素的各自存储电容反电极的电压就改变；以及如果Td表示这两个开关元件关闭后第一存储电容反电压在第一时间改变所需的时间，则Td大于0个水平扫描周期而小于一个水平扫描周期。According to one embodiment, the liquid crystal display includes two switching elements respectively provided for the first sub-pixel and the second sub-pixel, characterized in that the two switching elements are turned on and off by the scanning line signal voltage supplied to the common scanning line; When these two switching elements are turned on, the display signal voltage is applied to the respective sub-pixel electrodes and the storage capacitor electrodes of the first sub-pixel and the second sub-pixel from the common signal line; when these two switching elements are turned off, The voltages of the respective storage capacitor counter electrodes of the first sub-pixel and the second sub-pixel just change; and if Td represents the time required for the first storage capacitor counter voltage to change at the first time after the two switching elements are turned off, then Td is greater than 0 horizontal scanning period and less than one horizontal scanning period.

根据一个实施例，Td近似等于水平扫描周期的0.5倍。According to one embodiment, Td is approximately equal to 0.5 times the horizontal scanning period.

根据一个实施例，大量存储电容柱包括彼此电绝缘的第一存储电容柱、第二存储电容柱、第三存储电容柱和第四存储电容柱；并且如果连接到位于任意列与大量象素形成的行中指定行n交叉处的象素的第一子象素存储电容反电极的存储电容线设为CSBL_A_n，如果连接到第二子象素存储电容反电极的存储电容线设为CSBL_B_n，并且如果k为自然数(包括0)，则CSBL_A_n+4*k和CSBL_B_n+2+4*k就连接到第一存储电容柱上，CSBL_B_n+4*k和CSBL_A_n+2+4*k就连接到第二存储电容柱上，CSBL_A_n+1+4*k和CSBL_B_n+3+4*k就连接到第三存储电容柱上，CSBL_B_n+1+4*k和CSBL_A_n+3+4*k就连接到第四存储电容柱上。According to one embodiment, a large number of storage capacitor columns include a first storage capacitor column, a second storage capacitor column, a third storage capacitor column and a fourth storage capacitor column electrically insulated from each other; The storage capacitor line of the first sub-pixel storage capacitor counter electrode of the pixel at the intersection of the specified row n in the row of is set to CSBL_A_n, if the storage capacitor line connected to the second sub-pixel storage capacitor counter electrode is set to CSBL_B_n, and If k is a natural number (including 0), then CSBL_A_n+4*k and CSBL_B_n+2+4*k are connected to the first storage capacitor column, and CSBL_B_n+4*k and CSBL_A_n+2+4*k are connected to the first On the second storage capacitor column, CSBL_A_n+1+4*k and CSBL_B_n+3+4*k are connected to the third storage capacitor column, and CSBL_B_n+1+4*k and CSBL_A_n+3+4*k are connected to the second storage capacitor column Four storage capacitors on the column.

根据一个实施例，分别通过第一至第四存储电容柱供给的第一至第四存储电容反电压的振荡周期均为水平扫描周期的4倍。According to an embodiment, the oscillation periods of the counter voltages of the first to fourth storage capacitors respectively supplied through the first to fourth storage capacitor columns are all four times of the horizontal scanning period.

根据一个实施例，第二存储电容反电压比第一存储电容反电压滞后两个水平扫描周期的相位差，第三存储电容反电压比第一存储电容反电压滞后三个水平扫描周期的相位差，第四存储电容反电压比第一存储电容反电压滞后一个水平扫描周期的相位差。According to an embodiment, the reverse voltage of the second storage capacitor is lagged behind the reverse voltage of the first storage capacitor by a phase difference of two horizontal scanning periods, and the reverse voltage of the third storage capacitor is lagged behind the reverse voltage of the first storage capacitor by a phase difference of three horizontal scanning periods , the reverse voltage of the fourth storage capacitor lags behind the reverse voltage of the first storage capacitor by a phase difference of one horizontal scanning period.

根据一个实施例，液晶显示器包括两个分别为第一子象素和第二子象素设置的开关元件，其特征在于这两个开关元件通过供给公共扫描线的扫描线信号电压开和关；当这两个开关元件开启时，显示信号电压从公共信号线施加到第一子象素和第二子象素的各个子象素电极以及存储电容电极上；两个开关元件关闭时，第一子象素和第二子象素的各个存储电容反电极的电压改变；以及如果Td表示两个开关元件关闭后第一存储电容反电压在第一时间改变所需的时间，则Td大于0个水平扫描周期而小于两个水平扫描周期。According to one embodiment, the liquid crystal display includes two switching elements respectively provided for the first sub-pixel and the second sub-pixel, characterized in that the two switching elements are turned on and off by the scanning line signal voltage supplied to the common scanning line; When these two switching elements are turned on, the display signal voltage is applied to the respective sub-pixel electrodes and the storage capacitor electrodes of the first sub-pixel and the second sub-pixel from the common signal line; when the two switching elements are turned off, the first The voltages of the respective storage capacitor counter electrodes of the sub-pixel and the second sub-pixel change; and if Td represents the time required for the first storage capacitor counter voltage to change at the first time after the two switching elements are turned off, then Td is greater than 0 The horizontal scanning period is less than two horizontal scanning periods.

根据一个实施例，Td近似等于一个水平扫描周期。According to one embodiment, Td is approximately equal to one horizontal scanning period.

根据一个实施例，大量存储电容柱包括彼此电绝缘的第一存储电容柱、第二存储电容柱、第三存储电容柱、第四存储电容柱、第五存储电容柱和第六存储电容柱；并且如果连接到位于任意列与大量象素形成的行中指定行n交叉处的象素的第一子象素存储电容反电极的存储电容线设为CSBL_A_n，如果连接到第二子象素存储电容反电极的存储电容线设为CSBL_B_n，并且如果k为自然数(包括0)，则CSBL_A_n+3*k就连接到第一存储电容柱上，CSBL_B_n+3*k就连接到第二存储电容柱上，CSBL_A_n+1+3*k就连接到第三存储电容柱上，CSBL_B_n+1+3*k就连接到第四存储电容柱上，CSBL_A_n+2+3*k就连接到第五存储电容柱上，CSBL_B_n+2+3*k就连接到第六存储电容柱上。According to one embodiment, the plurality of storage capacitor columns includes a first storage capacitor column, a second storage capacitor column, a third storage capacitor column, a fourth storage capacitor column, a fifth storage capacitor column and a sixth storage capacitor column electrically insulated from each other; And if the storage capacitor line connected to the counter electrode of the first sub-pixel storage capacitor of the pixel at the intersection of any column and a row formed by a large number of pixels is set to CSBL_A_n, if connected to the second sub-pixel storage The storage capacitor line of the capacitor counter electrode is set to CSBL_B_n, and if k is a natural number (including 0), then CSBL_A_n+3*k is connected to the first storage capacitor column, and CSBL_B_n+3*k is connected to the second storage capacitor column CSBL_A_n+1+3*k is connected to the third storage capacitor column, CSBL_B_n+1+3*k is connected to the fourth storage capacitor column, and CSBL_A_n+2+3*k is connected to the fifth storage capacitor column On the column, CSBL_B_n+2+3*k is connected to the sixth storage capacitor column.

根据一个实施例，分别通过第一至第六存储电容柱供给的第一至第六存储电容反电压的振荡周期均为水平扫描周期的6倍。According to an embodiment, the oscillation periods of the counter voltages of the first to sixth storage capacitors respectively supplied through the first to sixth storage capacitor columns are all 6 times of the horizontal scanning period.

根据一个实施例，大量存储电容柱包括彼此电绝缘的第一存储电容柱、第二存储电容柱、第三存储电容柱、第四存储电容柱、第五存储电容柱、第六存储电容柱、…第(L-3)存储电容柱、第(L-2)存储电容柱、第(L-1)存储电容柱和第L存储电容柱等总共L个存储电容柱；并且当电绝缘的存储电容柱的数量L的1/2为奇数时，即当L＝2、6、10、…等时，如果连接到位于任意列与大量象素形成的行中指定行n交叉处的象素的第一子象素存储电容反电极的存储电容线设为CSBL_A_n，如果连接到第二子象素存储电容反电极的存储电容线设为CSBL_B_n，并且如果k为自然数(包括0)，则CSBL_A_n+(L/2)*k就连接到第一存储电容柱上，CSBL_B_n+(L/2)*k就连接到第二存储电容柱上，CSBL_A_n+1+(L/2)*k就连接到第三存储电容柱上，CSBL_B_n+1+(L/2)*k就连接到第四存储电容柱上，CSBL_A_n+2+(L/2)*k就连接到第五存储电容柱上，CSBL_B_n+2+(L/2)*k就连接到第六存储电容柱上，CSBL_A_n+(L/2)-2+(L/2)*k就连接到第(L-3)存储电容柱上，CSBL_B_n+(L/2)-2+(L/2)*k就连接到第(L-2)存储电容柱上，CSBL_A_n+(L/2)-1+(L/2)*k就连接到第(L-1)存储电容柱上，CSBL_B_n+(L/2)-1+(L/2)*k就连接到第L存储电容柱上。According to one embodiment, the plurality of storage capacitor columns includes a first storage capacitor column, a second storage capacitor column, a third storage capacitor column, a fourth storage capacitor column, a fifth storage capacitor column, a sixth storage capacitor column, ...the (L-3)th storage capacitor column, the (L-2) storage capacitor column, the (L-1) storage capacitor column and the L storage capacitor column etc. have a total of L storage capacitor columns; and when the electrically insulated storage When 1/2 of the quantity L of the capacitance column is an odd number, that is, when L=2, 6, 10, ... etc., if it is connected to the pixel at the intersection of the specified row n in the row formed by any column and a large number of pixels The storage capacitor line of the counter electrode of the first sub-pixel storage capacitor is set as CSBL_A_n, if the storage capacitor line connected to the counter electrode of the second sub-pixel storage capacitor is set as CSBL_B_n, and if k is a natural number (including 0), then CSBL_A_n+( L/2)*k is connected to the first storage capacitor column, CSBL_B_n+(L/2)*k is connected to the second storage capacitor column, and CSBL_A_n+1+(L/2)*k is connected to the third storage capacitor column On the storage capacitor column, CSBL_B_n+1+(L/2)*k is connected to the fourth storage capacitor column, and CSBL_A_n+2+(L/2)*k is connected to the fifth storage capacitor column, CSBL_B_n+2 +(L/2)*k is connected to the sixth storage capacitor column, CSBL_A_n+(L/2)-2+(L/2)*k is connected to the (L-3) storage capacitor column, CSBL_B_n+( L/2)-2+(L/2)*k is connected to the (L-2) storage capacitor column, and CSBL_A_n+(L/2)-1+(L/2)*k is connected to the (L -1) On the storage capacitor column, CSBL_B_n+(L/2)-1+(L/2)*k is connected to the Lth storage capacitor column.

根据一个实施例，分别通过第一至第L存储电容柱供给的第一至第L存储电容反电压的振荡周期均为水平扫描周期的L倍。According to an embodiment, the oscillating periods of the counter voltages of the first to the Lth storage capacitors respectively supplied through the first to the Lth storage capacitor columns are all L times of the horizontal scanning period.

根据一个实施例，大量存储电容柱包括彼此电绝缘的第一存储电容柱、第二存储电容柱、第三存储电容柱、第四存储电容柱、第五存储电容柱、第六存储电容柱、第七存储电容柱和第八存储电容柱；并且如果连接到位于任意列与大量象素形成的行中指定行n交叉处的象素的第一子象素存储电容反电极的存储电容线设为CSBL_A_n，如果连接到第二子象素存储电容反电极的存储电容线设为CSBL_B_n，并且如果k为自然数(包括0)，则CSBL_A_n+8*k和CSBL_B_n+4+8*k就连接到第一存储电容柱上，CSBL_B_n+8*k和CSBL_A_n+4+8*k就连接到第二存储电容柱上，CSBL_A_n+1+8*k和CSBL_B_n+5+8*k就连接到第三存储电容柱上，CSBL_B_n+1+8*k和CSBL_A_n+5+8*k就连接到第四存储电容柱上，CSBL_A_n+2+8*k和CSBL_B_n+6+8*k就连接到第五存储电容柱上，CSBL_B_n+2+8*k和CSBL_A_n+6+8*k就连接到第六存储电容柱上，CSBL_A_n+3+8*k和CSBL_B_n+7+8*k就连接到第七存储电容柱上，CSBL_B_n+3+8*k和CSBL_A_n+7+8*k就连接到第八存储电容柱上。According to one embodiment, the plurality of storage capacitor columns includes a first storage capacitor column, a second storage capacitor column, a third storage capacitor column, a fourth storage capacitor column, a fifth storage capacitor column, a sixth storage capacitor column, The seventh storage capacitance column and the eighth storage capacitance column; For CSBL_A_n, if the storage capacitor line connected to the counter electrode of the second sub-pixel storage capacitor is set as CSBL_B_n, and if k is a natural number (including 0), then CSBL_A_n+8*k and CSBL_B_n+4+8*k are just connected to On the first storage capacitor column, CSBL_B_n+8*k and CSBL_A_n+4+8*k are connected to the second storage capacitor column, and CSBL_A_n+1+8*k and CSBL_B_n+5+8*k are connected to the third On the storage capacitor column, CSBL_B_n+1+8*k and CSBL_A_n+5+8*k are connected to the fourth storage capacitor column, and CSBL_A_n+2+8*k and CSBL_B_n+6+8*k are connected to the fifth On the storage capacitor column, CSBL_B_n+2+8*k and CSBL_A_n+6+8*k are connected to the sixth storage capacitor column, and CSBL_A_n+3+8*k and CSBL_B_n+7+8*k are connected to the seventh On the storage capacitor column, CSBL_B_n+3+8*k and CSBL_A_n+7+8*k are connected to the eighth storage capacitor column.

根据一个实施例，分别通过第一至第八存储电容柱供给的第一至第八存储电容反电压的振荡周期均为水平扫描周期的8倍。According to an embodiment, the oscillation periods of the counter voltages of the first to eighth storage capacitors respectively supplied through the first to eighth storage capacitor columns are all 8 times of the horizontal scanning period.

根据一个实施例，大量存储电容柱包括彼此电绝缘的第一存储电容柱、第二存储电容柱、第三存储电容柱、第四存储电容柱、第五存储电容柱、第六存储电容柱、第七存储电容柱、第八存储电容柱、…第(L-3)存储电容柱、第(L-2)存储电容柱、第(L-1)存储电容柱和第L存储电容柱等总共L个存储电容柱；以及当电绝缘的存储电容柱的数量L的1/2为偶数时，即当L＝4、8、12、…等时，如果连接到位于行列矩阵中任意列与大量象素形成的行中指定行n交叉处的象素的第一子象素存储电容反电极的存储电容线设为CSBL_A_n，如果连接到第二子象素存储电容反电极的存储电容线设为CSBL_B_n，并且如果k为自然数(包括0)，则CSBL_A_n+L*k和CSBL_B_n+(L/2)+L*k就连接到第一存储电容柱上，CSBL_B_n+L*k和CSBL_A_n+(L/2)+L*k就连接到第二存储电容柱上，CSBL_A_n+1+L*k和CSBL_B-n+(L/2)+1+L*k就连接到第三存储电容柱上，CSBL_B_n+1+L*k和CSBL_A_n+(L/2)+1+L*k就连接到第四存储电容柱上，CSBL_A_n+2+L*k和CSBL_B_n+(L/2)+2+L*k就连接到第五存储电容柱上，CSBL_B_n+2+L*k和CSBL_A_n+(L/2)+2+L*k就连接到第六存储电容柱，CSBL_A_n+3+L*k和CSBL_B_n+(L/2)+3+L*k就连接到第七存储电容柱上，CSBL_B_n+3+L*k和CSBL_A_n+(L/2)+3+L*k就连接到第八存储电容柱上，CSBL_A_n+(L/2)-2+L*k和CSBL_B_n+L-2+L*k就连接到第(L-3)存储电容柱上，CSBL_B_n+(L/2)-2+L*k和CSBL_A_n+L-2+L*k就连接到第(L-2)存储电容柱上，CSBL_A_n+(L/2)-1+L*k和CSBL_B_n+L-1+L*k就连接到第(L-1)存储电容柱上，以及CSBL_B_n+(L/2)-1+L*k和CSBL_A_n+L-1+L*k就连接到第L存储电容柱上。According to one embodiment, the plurality of storage capacitor columns includes a first storage capacitor column, a second storage capacitor column, a third storage capacitor column, a fourth storage capacitor column, a fifth storage capacitor column, a sixth storage capacitor column, The seventh storage capacitor column, the eighth storage capacitor column, ... the (L-3) storage capacitor column, the (L-2) storage capacitor column, the (L-1) storage capacitor column and the L storage capacitor column etc. in total L storage capacitor columns; and when 1/2 of the quantity L of the electrically insulated storage capacitor columns is an even number, that is, when L=4, 8, 12, ... etc., if it is connected to any column in the row-column matrix and a large number The storage capacitor line of the first sub-pixel storage capacitor counter electrode of the pixel at the intersection of the specified row n in the row formed by the pixel is set to CSBL_A_n, if the storage capacitor line connected to the second sub-pixel storage capacitor counter electrode is set to CSBL_B_n, and if k is a natural number (including 0), then CSBL_A_n+L*k and CSBL_B_n+(L/2)+L*k are connected to the first storage capacitor column, CSBL_B_n+L*k and CSBL_A_n+(L/2 )+L*k is connected to the second storage capacitor column, CSBL_A_n+1+L*k and CSBL_B-n+(L/2)+1+L*k are connected to the third storage capacitor column, CSBL_B_n+1 +L*k and CSBL_A_n+(L/2)+1+L*k are connected to the fourth storage capacitor column, and CSBL_A_n+2+L*k and CSBL_B_n+(L/2)+2+L*k are connected to On the fifth storage capacitor column, CSBL_B_n+2+L*k and CSBL_A_n+(L/2)+2+L*k are connected to the sixth storage capacitor column, CSBL_A_n+3+L*k and CSBL_B_n+(L/2) +3+L*k is connected to the seventh storage capacitor column, CSBL_B_n+3+L*k and CSBL_A_n+(L/2)+3+L*k are connected to the eighth storage capacitor column, CSBL_A_n+(L/ 2)-2+L*k and CSBL_B_n+L-2+L*k are connected to the (L-3)th storage capacitor column, CSBL_B_n+(L/2)-2+L*k and CSBL_A_n+L-2 +L*k is connected to the (L-2)th storage capacitor column, CSBL_A_n+(L/2)-1+L*k and CSBL_B_n+L-1+L*k are connected to the (L-1)th storage capacitor On the capacitor column, and CSBL_B_n+(L/2)-1+L*k and CSBL_A_n+L-1+L*k are connected to the Lth storage capacitor column.

根据一个实施例，分别通过第一至第L存储电容柱供给的第一至第L存储电容反电压的振荡周期均为水平扫描周期的L倍。According to an embodiment, the oscillating periods of the counter voltages of the first to the Lth storage capacitors respectively supplied through the first to the Lth storage capacitor columns are all L times of the horizontal scanning period.

本发明的第四方面提供了一种液晶显示器，其包括大量象素，每个象素具有液晶层和用于对液晶层施加电压的以行列矩阵分布的大量电极，其特征在于大量象素的每一个具有可以对液晶层施加互不相同的电压的第一子象素和第二子象素；此处在确定灰度下第一子象素具有高于第二子象素的亮度；第一子象素和第二子象素每个包括：由反电极和经液晶层与反电极相对的子象素电极形成的液晶电容，和由电连接到子象素电极上的存储电容电极、绝缘层和经绝缘层与存储电容电极相对的存储电容反电极形成的存储电容；反电极为由第一子象素和第二子象素共享的单电极，第一子象素和第二子象素的存储电容反电极彼此电绝缘；液晶显示器还包括大量彼此电绝缘的存储电容柱，每个存储电容柱经存储电容线电连接到大量象素中第一子象素和第二子象素的任意存储电容反电极上，列方向上两个相邻象素之一的第一子象素的存储电容反电极连接到与另一个的第二子象素的存储电容反电极等电位的存储电容线上；并且大量存储电容柱中彼此电绝缘的存储电容柱的数量为L或更大(L为偶数)，由每个存储电容柱供给的存储电容反电压为振荡电压，振荡周期为水平扫描周期的2*K*L(K为正整数)倍。A fourth aspect of the present invention provides a liquid crystal display comprising a large number of pixels, each pixel having a liquid crystal layer and a large number of electrodes distributed in a matrix of rows and columns for applying a voltage to the liquid crystal layer, characterized in that a large number of pixels Each has a first sub-pixel and a second sub-pixel that can apply different voltages to the liquid crystal layer; here, the first sub-pixel has a brightness higher than that of the second sub-pixel under a certain gray scale; A sub-pixel and the second sub-pixel each include: a liquid crystal capacitor formed by a counter electrode and a sub-pixel electrode opposite to the counter electrode through a liquid crystal layer, and a storage capacitor electrode electrically connected to the sub-pixel electrode, The storage capacitor formed by the insulating layer and the storage capacitor counter electrode opposite to the storage capacitor electrode through the insulating layer; the counter electrode is a single electrode shared by the first sub-pixel and the second sub-pixel, and the first sub-pixel and the second sub-pixel The storage capacitor counter electrodes of the pixel are electrically insulated from each other; the liquid crystal display also includes a large number of storage capacitor columns electrically insulated from each other, and each storage capacitor column is electrically connected to the first sub-pixel and the second sub-image in a large number of pixels via a storage capacitor line. On any storage capacitor counter electrode of the pixel, the storage capacitor counter electrode of the first sub-pixel of one of the two adjacent pixels in the column direction is connected to the storage capacitor counter electrode of the second sub-pixel of the other with the same potential. On the storage capacitor line; and the number of storage capacitor columns electrically insulated from each other in a large number of storage capacitor columns is L or greater (L is an even number), and the storage capacitor back voltage supplied by each storage capacitor column is an oscillation voltage, and the oscillation period is 2*K*L (K is a positive integer) times of the horizontal scanning period.

根据一个实施例，如果连接到位于任意列和大量行列矩阵分布的象素形成的行中指定行年交叉处的象素的第一子象素的存储电容反电极的存储电容线设为CSBL_(n)A，连接到第二子象素的存储电容反电极的存储电容线设为CSBL_(n)B，连接到L个电绝缘的存储电容柱的CS总线满足下列关系：According to one embodiment, if the storage capacitor line connected to the storage capacitor counter electrode of the first sub-pixel of the pixel at the intersection of the specified row and year in the row formed by any column and a large number of rows and columns of matrix-distributed pixels is set to CSBL_( n)A, the storage capacitor line connected to the counter electrode of the storage capacitor of the second sub-pixel is set as CSBL_(n)B, and the CS bus connected to L electrically insulated storage capacitor columns satisfies the following relationship:

CSBL_(p+2*(1-1))B，(p+2*(1-1))+1)A，CSBL_(p+2*(1-1))B, (p+2*(1-1))+1)A,

CSBL_(p+2*(2-1))B，(p+2*(2-1))+1)A，CSBL_(p+2*(2-1))B, (p+2*(2-1))+1)A,

CSBL_(p+2*(3-1))B，(p+2*(3-1))+1)A，CSBL_(p+2*(3-1))B, (p+2*(3-1))+1)A,

……

CSBL_(p+2*(K-1))B，(p+2*(K-1))+1)A，和CSBL_(p+2*(K-1))B, (p+2*(K-1))+1)A, and

CSBL_(p+2*(1-1)+K*L+1)B，(p+2*(1-1))+K*L+2)A，CSBL_(p+2*(1-1)+K*L+1)B, (p+2*(1-1))+K*L+2)A,

CSBL_(p+2*(2-1)+K*L+1)B，(p+2*(2-1))+K*L+2)A，CSBL_(p+2*(2-1)+K*L+1)B, (p+2*(2-1))+K*L+2)A,

CSBL_(p+2*(3-1)+K*L+1)B，(p+2*(3-1))+K*L+2)A，CSBL_(p+2*(3-1)+K*L+1)B, (p+2*(3-1))+K*L+2)A,

……

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(3-1))+K*L+2)A，CSBL_(p+2*(K-1)+K*L+1)B, (p+2*(3-1))+K*L+2)A,

或or

CSBL_(p+2*(1-1)+1)B，(p+2*(1-1)+2)A，CSBL_(p+2*(1-1)+1)B, (p+2*(1-1)+2)A,

CSBL_(p+2*(2-1)+1)B，(p+2*(2-1)+2)A，CSBL_(p+2*(2-1)+1)B, (p+2*(2-1)+2)A,

CSBL_(p+2*(3-1)+1)B，(p+2*(3-1)+2)A，CSBL_(p+2*(3-1)+1)B, (p+2*(3-1)+2)A,

……

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)A，CSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A,

和and

CSBL_(p+2*(1-1)+K*L)B，(p+2*(1-1)+K*L+1)A，CSBL_(p+2*(1-1)+K*L)B, (p+2*(1-1)+K*L+1)A,

CSBL_(p+2*(2-1)+K*L)B，(p+2*(2-1)+K*L+1)A，CSBL_(p+2*(2-1)+K*L)B, (p+2*(2-1)+K*L+1)A,

CSBL_(p+2*(3-1)+K*L)B，(p+2*(3-1)+K*L+1)A，CSBL_(p+2*(3-1)+K*L)B, (p+2*(3-1)+K*L+1)A,

……

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)A，CSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A,

此处，p＝1、3、5等，或p＝0、2、4等。Here, p=1, 3, 5, etc., or p=0, 2, 4, etc.

根据一个实施例，K为1或2，L为6、8、10和12中的任意一个。According to an embodiment, K is 1 or 2, and L is any one of 6, 8, 10 and 12.

根据一个实施例，优选存储电容线置于列方向上两个相邻的象素之间。According to one embodiment, preferably the storage capacitor line is placed between two adjacent pixels in the column direction.

根据一个实施例，液晶显示器包括：两个分别为第一子象素和第二子象素配置的开关元件；和共同连接到两个开关元件上的扫描线，其特征在于公共扫描线置于第一子象素和第二子象素之间。According to one embodiment, the liquid crystal display includes: two switching elements respectively configured for the first sub-pixel and the second sub-pixel; and scanning lines commonly connected to the two switching elements, wherein the common scanning line is placed Between the first sub-pixel and the second sub-pixel.

根据一个实施例，大量存储电容柱为组成成对存储电容柱的偶数个存储电容柱，供给存储电容反电压，反电压的振荡彼此有180°的相位差。According to one embodiment, the plurality of storage capacitor columns is an even number of storage capacitor columns forming a pair of storage capacitor columns, supplying storage capacitor counter voltages, and the oscillations of the counter voltages have a phase difference of 180° from each other.

根据一个实施例，在列方向的任何两个相邻象素中，一个象素的第一子象素的存储电容反电极与另一个象素的第二子象素的存储电容反电极连接到公共存储电容线上According to one embodiment, in any two adjacent pixels in the column direction, the storage capacitor counter electrode of the first sub-pixel of one pixel is connected to the storage capacitor counter electrode of the second sub-pixel of another pixel common storage capacitor line

根据一个实施例，存储电容反电压的占空比均为1∶1。According to an embodiment, the duty ratios of the counter voltages of the storage capacitors are all 1:1.

根据一个实施例，任意象素中的第一子象素布置成与列方向上任意象素相邻的象素的第二子象素相邻，并且在大量象素的每一个中，第一子象素布置成与列方向上的第二子象素相邻。According to one embodiment, the first sub-pixel in any pixel is arranged adjacent to the second sub-pixel of the pixel adjacent to any pixel in the column direction, and in each of a large number of pixels, the first The sub-pixels are arranged adjacent to the second sub-pixel in the column direction.

根据一个实施例，第一子象素和第二子象素面积近似相等。According to one embodiment, the areas of the first sub-pixel and the second sub-pixel are approximately equal.

根据一个实施例，第二子象素的面积大于第一子象素的面积。According to one embodiment, the area of the second sub-pixel is larger than the area of the first sub-pixel.

本发明的第一方面可以减小液晶显示器中γ特性的视角依赖性。特别是，可以通过改善有宽视角的液晶显示器如MAV或ASV液晶显示器的γ特性来实现极高的显示质量。The first aspect of the present invention can reduce the viewing angle dependence of the γ characteristic in a liquid crystal display. In particular, extremely high display quality can be achieved by improving the gamma characteristic of a liquid crystal display having a wide viewing angle such as an MAV or ASV liquid crystal display.

本发明的第二方面可以减少由交流电驱动的液晶显示器上的闪烁。通过合并本发明的第一方面和第二方面，可以提供一种减少了闪烁、提高了γ特性的视角特性以及高显示质量的液晶显示器。The second aspect of the present invention can reduce flicker on a liquid crystal display driven by alternating current. By combining the first and second aspects of the present invention, it is possible to provide a liquid crystal display with reduced flicker, improved viewing angle characteristics of gamma characteristics, and high display quality.

本发明的第三方面可以根据第二方面增大施加到液晶显示器中存储电容反电极的电压(振荡电压)的振荡周期。因而，可以提供一种这样的液晶显示器，该显示器适于通过将一个象素划分为两个或更多个子象素并以不同的亮度水平对子象素照明而改善较大或较高分辨率的液晶显示器的视角特性。The third aspect of the present invention can increase the oscillation period of the voltage (oscillating voltage) applied to the counter electrode of the storage capacitor in the liquid crystal display according to the second aspect. Thus, it is possible to provide a liquid crystal display adapted to improve larger or higher resolution by dividing one pixel into two or more sub-pixels and illuminating the sub-pixels at different brightness levels. viewing angle characteristics of liquid crystal displays.

本发明的第四方面除了与第三方面一样能够增大施加到存储电容反电极的电压(振荡电压)的振荡周期，还可以利用公共存储电容线(CS总线)对列方向上相邻象素的子象素供给振荡电压。因此，如果存储电容线置于列方向上的相邻象素之间，也可以用作黑色矩阵(BM)。因而，第四方面具有能够增大象素孔径比的优点，它可以省去第三方面的液晶显示器情形中需要单独提供的黑色矩阵，并且比第三方面减少了CS总线的数量。The fourth aspect of the present invention can increase the oscillation cycle of the voltage (oscillating voltage) applied to the storage capacitor counter-electrode the same as the third aspect, and can also utilize the common storage capacitor line (CS bus line) to pair adjacent pixels in the column direction. The sub-pixels supply the oscillating voltage. Therefore, if the storage capacitor line is placed between adjacent pixels in the column direction, it can also be used as a black matrix (BM). Therefore, the fourth aspect has the advantage of being able to increase the pixel aperture ratio, it can save the black matrix that needs to be provided separately in the case of the liquid crystal display of the third aspect, and the number of CS buses is reduced compared with the third aspect.

附图说明 Description of drawings

图1是根据本发明第一方面实施例的液晶显示器100的象素结构示意图；FIG. 1 is a schematic diagram of a pixel structure of a liquid crystal display 100 according to an embodiment of the first aspect of the present invention;

图2A～2C是根据本发明实施例的液晶显示器的结构示意图；2A-2C are schematic structural views of a liquid crystal display according to an embodiment of the present invention;

图3A～3C是表示常规液晶显示器100’的结构示意图；3A to 3C are schematic structural views representing a conventional liquid crystal display 100';

图4A～4C是MVA液晶显示器的显示特性简图，其中图4A是透射率与施加电压的关系曲线，图4B是关于白模式下透射率规一化后的图4A的透视率图，图4C是表示γ特性的简图；4A to 4C are schematic diagrams of the display characteristics of MVA liquid crystal displays, wherein FIG. 4A is the relationship curve between transmittance and applied voltage, and FIG. 4B is the transmittance diagram of FIG. 4A after the normalization of the transmittance in the white mode, and FIG. 4C is a simplified diagram representing the γ characteristic;

图5A～5D是表示施加到通过划分象素得到的子象素的液晶层的电压的状态A～D的简图；5A to 5D are schematic diagrams showing states A to D of voltages applied to the liquid crystal layer of the sub-pixels obtained by dividing the pixels;

图6A～6B是表示在图5所示电压状态A～D下获得的γ特性曲线，其中图6A表示右侧60°的视角γ特性，图6B是表示右上侧60°的视角γ特性；6A to 6B show the γ characteristic curves obtained under the voltage states A to D shown in FIG. 5 , wherein FIG. 6A shows the γ characteristic of the viewing angle of 60° on the right side, and FIG. 6B shows the γ characteristic of the viewing angle of 60° on the upper right side;

图7是表示在电压状态A～D下获得的白模式透射率(正视)曲线；Fig. 7 shows the white mode transmittance (front view) curve obtained under the voltage state A～D;

图8A～8B是表示根据本发明实施例在电压状态C下子象素之间的面积比与γ特性的曲线，其中图8A表示右侧60°的视角γ特性，图8B是表示右上侧60°的视角γ特性；8A-8B are curves showing the area ratio and γ characteristic between sub-pixels in the voltage state C according to an embodiment of the present invention, wherein FIG. 8A shows the viewing angle γ characteristic of 60° on the right side, and FIG. 8B shows the γ characteristic on the upper right side of 60°. The viewing angle γ characteristic of ;

图9是根据本发明实施例在电压状态C下白模式透射率(正视)和子象素面积比之间的关系曲线；9 is a relationship curve between white mode transmittance (front view) and sub-pixel area ratio under voltage state C according to an embodiment of the present invention;

图10A～10B是表示根据本发明实施例在电压状态B下子象素的γ特性的曲线，其中图10A表示右侧60°的视角γ特性，图10B是表示右上侧60°的视角γ特性；10A-10B are curves showing the gamma characteristics of sub-pixels in the voltage state B according to an embodiment of the present invention, wherein FIG. 10A shows the viewing angle gamma characteristics of the right side 60°, and FIG. 10B shows the viewing angle gamma characteristics of the upper right side 60°;

图11是表示根据本发明实施例在电压状态B下白模式透射率与子象素数之间的关系曲线；11 is a graph showing the relationship between the white mode transmittance and the number of sub-pixels in the voltage state B according to an embodiment of the present invention;

图12是根据本发明另一实施例的液晶显示器200的象素结构示意图；FIG. 12 is a schematic diagram of a pixel structure of a liquid crystal display 200 according to another embodiment of the present invention;

图13是表示液晶显示器200的象素的等效电路简图；FIG. 13 is a schematic diagram showing an equivalent circuit of a pixel of the liquid crystal display 200;

图14是用于驱动液晶显示器200的各种电压波形(a)-(f)的简图；FIG. 14 is a schematic diagram of various voltage waveforms (a)-(f) for driving the liquid crystal display 200;

图15是液晶显示器200中施加到子象素的液晶层的电压之间的关系简图；15 is a schematic diagram of the relationship between the voltages applied to the liquid crystal layer of the sub-pixel in the liquid crystal display 200;

图16A～16B是表示液晶显示器200的γ特性简图，其中图16A表示右侧60°的视角γ特性，图16B是表示右上侧60°的视角γ特性；16A to 16B are schematic diagrams showing the gamma characteristics of the liquid crystal display 200, wherein FIG. 16A shows the viewing angle gamma characteristics of 60° on the right side, and FIG. 16B shows the viewing angle gamma characteristics of 60° on the upper right side;

图17是表示根据本发明第二方面的液晶显示器的象素分布示意图；17 is a schematic diagram showing pixel distribution of a liquid crystal display according to a second aspect of the present invention;

图18是用于驱动具有图17所示结构的液晶显示器的各种电压(信号)波形(a)-(j)的简图；Fig. 18 is a schematic diagram of various voltage (signal) waveforms (a)-(j) for driving a liquid crystal display having the structure shown in Fig. 17;

图19是表示根据本发明另一实施例的液晶显示器的象素分布示意图；19 is a schematic diagram showing pixel distribution of a liquid crystal display according to another embodiment of the present invention;

图20是用于驱动具有图19所示结构的液晶显示器的各种电压(信号)波形(a)-(j)的简图；Fig. 20 is a schematic diagram of various voltage (signal) waveforms (a)-(j) for driving a liquid crystal display having the structure shown in Fig. 19;

图21A是根据本发明另一实施例的液晶显示器的象素分布示意图，图21B是表示存储电容线和存储电容电极的布局的示意图；21A is a schematic diagram of pixel distribution of a liquid crystal display according to another embodiment of the present invention, and FIG. 21B is a schematic diagram showing the layout of storage capacitor lines and storage capacitor electrodes;

图22是根据本发明第二方面的液晶显示器的特定区域的等效电路简图；22 is a schematic diagram of an equivalent circuit of a specific region of a liquid crystal display according to a second aspect of the present invention;

图23A是表示就栅极总线的电压波形而言施加到CS总线的振荡电压的振荡周期和相位简图，还表示图22中所示液晶显示器的子象素电极的电压；Fig. 23A is a schematic diagram showing the oscillation cycle and phase of the oscillation voltage applied to the CS bus line in terms of the voltage waveform of the gate bus line, and also shows the voltages of the sub-pixel electrodes of the liquid crystal display shown in Fig. 22;

图23B是表示就栅极总线的电压波形而言供给CS总线的振荡电压的振荡周期和相位，并表示图22中所示液晶显示器中的子象素的电压(施加到液晶层的电压具有与图23A相反的极性)23B is a graph showing the oscillation period and phase of the oscillation voltage supplied to the CS bus line in terms of the voltage waveform of the gate bus line, and shows the voltages of the sub-pixels in the liquid crystal display shown in FIG. 22 (the voltage applied to the liquid crystal layer has the same Figure 23A opposite polarity)

图24A是表示图22中所示液晶显示器的驱动状态示意图(此处采用图23A所示的电压)；FIG. 24A is a schematic diagram showing the driving state of the liquid crystal display shown in FIG. 22 (the voltage shown in FIG. 23A is used here);

图24B是表示图22中所示液晶显示器的驱动状态示意图(此处采用图23B所示的电压)；FIG. 24B is a schematic diagram showing the driving state of the liquid crystal display shown in FIG. 22 (the voltage shown in FIG. 23B is used here);

图25A是表示根据本发明第二方面的实施例用于供给液晶显示器中CS总线的振荡电压的结构示意图，图25B是表示接近液晶显示器电负载阻抗的等效电路；Fig. 25A is a schematic diagram showing the structure of an oscillating voltage for supplying the CS bus in the liquid crystal display according to an embodiment of the second aspect of the present invention, and Fig. 25B is an equivalent circuit representing an electrical load impedance close to the liquid crystal display;

图26表示子象素电极没有CS电压波形钝头的振荡电压波形(a)～(e)；Figure 26 shows the oscillating voltage waveforms (a)-(e) of the sub-pixel electrodes without the blunt head of the CS voltage waveform;

图27表示子象素电极没有对应于“0.2H”CR时间常数的CS电压波形钝头的振荡电压波形(a)～(e)；Fig. 27 shows the oscillating voltage waveforms (a)-(e) of the sub-pixel electrode without the blunt tip of the CS voltage waveform corresponding to the "0.2H" CR time constant;

图28是表示基于图26和27中波形算出的振荡电压平均值和有效值与CS总线电压的振荡周期的关系曲线；FIG. 28 is a graph showing the relationship between the average value and effective value of the oscillation voltage calculated based on the waveforms in FIGS. 26 and 27 and the oscillation period of the CS bus voltage;

图29是根据本发明第三方面实施例的液晶显示器的等效电压示意图；Fig. 29 is a schematic diagram of an equivalent voltage of a liquid crystal display according to an embodiment of the third aspect of the present invention;

图30A是表示就栅极总线的电压波形而言供给CS总线的振荡电压的振荡周期和相位，并表示图29所示液晶显示器中的子象素的电压；Fig. 30A shows the oscillation period and phase of the oscillation voltage supplied to the CS bus line in terms of the voltage waveform of the gate bus line, and shows the voltages of the sub-pixels in the liquid crystal display shown in Fig. 29;

图30B是表示就栅极总线的电压波形而言供给CS总线的振荡电压的振荡周期和相位，并表示图22中所示液晶显示器中的子象素的电压(施加到液晶层的电压具有与图30A相反的极性)30B is a graph showing the oscillation period and phase of the oscillation voltage supplied to the CS bus line in terms of the voltage waveform of the gate bus line, and shows the voltages of the sub-pixels in the liquid crystal display shown in FIG. 22 (the voltage applied to the liquid crystal layer has the same Figure 30A opposite polarity)

图31A是表示图29中所示液晶显示器的驱动状态简图(此处采用图30A所示的电压)；Fig. 31A is a schematic diagram showing the driving state of the liquid crystal display shown in Fig. 29 (the voltage shown in Fig. 30A is adopted here);

图31B是表示图29中所示液晶显示器的驱动状态简图(此处采用图30B所示的电压)；Fig. 31B is a schematic diagram showing the driving state of the liquid crystal display shown in Fig. 29 (the voltage shown in Fig. 30B is adopted here);

图32是根据本发明第三方面实施例的液晶显示器的等效电压示意图；Fig. 32 is a schematic diagram of an equivalent voltage of a liquid crystal display according to an embodiment of the third aspect of the present invention;

图33A是表示就栅极总线的电压波形而言供给CS总线的振荡电压的振荡周期和相位，并表示图32所示液晶显示器中的子象素的电压；Fig. 33A shows the oscillation period and phase of the oscillation voltage supplied to the CS bus line in terms of the voltage waveform of the gate bus line, and shows the voltages of the sub-pixels in the liquid crystal display shown in Fig. 32;

图33B是表示就栅极总线的电压波形而言供给CS总线的振荡电压的振荡周期和相位，并表示图32中所示液晶显示器中的子象素的电压(施加到液晶层的电压具有与图33A相反的极性)；33B is a graph showing the oscillation cycle and phase of the oscillation voltage supplied to the CS bus line in terms of the voltage waveform of the gate bus line, and shows the voltages of the sub-pixels in the liquid crystal display shown in FIG. 32 (the voltage applied to the liquid crystal layer has the same Figure 33A opposite polarity);

图34A是表示图32中所示液晶显示器的驱动状态简图(此处采用图33A所示的电压)；Fig. 34A is a schematic diagram showing the driving state of the liquid crystal display shown in Fig. 32 (the voltage shown in Fig. 33A is adopted here);

图34B是表示图32中所示液晶显示器的驱动状态简图(此处采用图33B所示的电压)；Fig. 34B is a schematic diagram showing the driving state of the liquid crystal display shown in Fig. 32 (the voltage shown in Fig. 33B is adopted here);

图35A表示根据本发明第三方面实施例的液晶显示器中CS总线以及象素间黑色矩阵的轮廓示意图，图35B是表示还用作本发明第四方面实施例的液晶显示器中象素间黑色矩阵的CS总线轮廓；Fig. 35A shows the outline sketch map of CS bus line and inter-pixel black matrix in the liquid crystal display according to the embodiment of the third aspect of the present invention, and Fig. 35B shows the black matrix between pixels in the liquid crystal display which is also used as the fourth aspect embodiment of the present invention The CS bus profile;

图36A是表示根据本发明第四方面实施例的液晶显示器的驱动状态简图；FIG. 36A is a schematic diagram showing a driving state of a liquid crystal display according to an embodiment of the fourth aspect of the present invention;

图36B是表示根据本发明第四方面实施例的液晶显示器的驱动状态简图，其中施加到液晶层的电场与图33A中所示驱动状态的方向相反；FIG. 36B is a schematic diagram showing a driving state of a liquid crystal display according to an embodiment of the fourth aspect of the present invention, wherein the direction of the electric field applied to the liquid crystal layer is opposite to that of the driving state shown in FIG. 33A;

图37是表示根据本发明第四方面实施例的液晶显示器的矩阵结构(CS总线的连接图案)示意图；37 is a schematic diagram showing a matrix structure (connection pattern of a CS bus) of a liquid crystal display according to an embodiment of the fourth aspect of the present invention;

图38是表示图37所示液晶显示器的驱动信号波形示意图；Fig. 38 is a schematic diagram showing a driving signal waveform of the liquid crystal display shown in Fig. 37;

图39是表示根据本发明第四方面另一实施例的液晶显示器的矩阵结构(CS总线的连接图案)示意图；39 is a schematic diagram showing a matrix structure (connection pattern of a CS bus) of a liquid crystal display according to another embodiment of the fourth aspect of the present invention;

图40是表示图39所示液晶显示器的驱动信号波形的示意图；Fig. 40 is a schematic diagram showing the driving signal waveform of the liquid crystal display shown in Fig. 39;

图41是表示根据本发明第四方面另一实施例的液晶显示器的矩阵结构(CS总线的连接图案)示意图；41 is a schematic diagram showing a matrix structure (connection pattern of a CS bus) of a liquid crystal display according to another embodiment of the fourth aspect of the present invention;

图42是表示图41所示液晶显示器的驱动信号波形的示意图；Fig. 42 is a schematic diagram showing the driving signal waveform of the liquid crystal display shown in Fig. 41;

图43是表示根据本发明第四方面另一实施例的液晶显示器的矩阵结构(CS总线的连接图案)示意图；43 is a schematic diagram showing a matrix structure (connection pattern of a CS bus) of a liquid crystal display according to another embodiment of the fourth aspect of the present invention;

图44是表示图43所示液晶显示器的驱动信号波形的示意图；Fig. 44 is a schematic diagram showing the driving signal waveform of the liquid crystal display shown in Fig. 43;

图45是表示根据本发明第四方面另一实施例的液晶显示器的矩阵结构(CS总线的连接图案)示意图；45 is a schematic diagram showing a matrix structure (connection pattern of a CS bus) of a liquid crystal display according to another embodiment of the fourth aspect of the present invention;

图46是表示图45所示液晶显示器的驱动信号波形的示意图；Fig. 46 is a schematic diagram showing the driving signal waveform of the liquid crystal display shown in Fig. 45;

图47是表示根据本发明第四方面另一实施例的液晶显示器的矩阵结构(CS总线的连接图案)示意图；47 is a schematic diagram showing a matrix structure (connection pattern of a CS bus) of a liquid crystal display according to another embodiment of the fourth aspect of the present invention;

图48是表示图47所示液晶显示器的驱动信号波形的示意图；Fig. 48 is a schematic diagram showing the driving signal waveform of the liquid crystal display shown in Fig. 47;

图49是表示根据本发明第四方面另一实施例的液晶显示器的矩阵结构(CS总线的连接图案)示意图；49 is a schematic diagram showing a matrix structure (connection pattern of a CS bus) of a liquid crystal display according to another embodiment of the fourth aspect of the present invention;

图50是表示图49所示液晶显示器的驱动信号波形的示意图Figure 50 is a schematic diagram showing the driving signal waveform of the liquid crystal display shown in Figure 49

具体实施方式 Detailed ways

下面参考附图描述本发明第一方面实施例中的液晶显示器的结构和操作。The structure and operation of the liquid crystal display in the embodiment of the first aspect of the present invention will be described below with reference to the drawings.

首先参见图1、2A、2B和2C。图1是表示根据本发明实施例的液晶显示器100的象素中电极分布的示意图。图2A是液晶显示器100的总体结构示意图，图2B是象素中电极结构的示意图，图2C是图2B中沿2C-2C’的截面图。出于参考的目的，图3A、3B和3C分别表示常规液晶显示器100’的象素中电极分布、电极结构和沿3C-3C’的截面图。See first Figures 1, 2A, 2B and 2C. FIG. 1 is a schematic diagram showing electrode distribution in a pixel of a liquid crystal display 100 according to an embodiment of the present invention. 2A is a schematic diagram of the overall structure of the liquid crystal display 100, FIG. 2B is a schematic diagram of the electrode structure in a pixel, and FIG. 2C is a cross-sectional view along 2C-2C' in FIG. 2B. For reference purposes, FIGS. 3A, 3B, and 3C respectively show electrode distribution, electrode structure, and cross-sectional views along 3C-3C' in a pixel of a conventional liquid crystal display 100'.

根据本实施例的液晶显示器100以常黑模式工作，并且包括大量象素，每个象素具有液晶层和用于对液晶层施加电压的大量电极。虽然此处以TFT液晶显示器为例，但也可以用其它开关元件(如MIM元件)代替。The liquid crystal display 100 according to the present embodiment operates in a normally black mode, and includes a large number of pixels each having a liquid crystal layer and a large number of electrodes for applying a voltage to the liquid crystal layer. Although a TFT liquid crystal display is used as an example here, other switching elements (such as MIM elements) can also be used instead.

液晶显示器100具有大量以矩阵分布的象素10。大量象素10的每一个有液晶层13。另外，象素具有自己的象素电极18和反电极17，以向液晶层13施加电压。典型地，反电极17是对所有象素10公用的单电极。The liquid crystal display 100 has a large number of pixels 10 arranged in a matrix. Each of the plurality of pixels 10 has a liquid crystal layer 13 . In addition, a pixel has its own pixel electrode 18 and counter electrode 17 to apply a voltage to the liquid crystal layer 13 . Typically, the counter electrode 17 is a single electrode common to all pixels 10 .

在根据本实施例的液晶显示器100中，大量象素10的每一个具有可以施加互不相同的电压的第一子象素10a和第二子象素10b，如图1所示。In the liquid crystal display 100 according to the present embodiment, each of a large number of pixels 10 has a first sub-pixel 10a and a second sub-pixel 10b to which voltages different from each other can be applied, as shown in FIG. 1 .

当显示满足0≤gk≤gn(此处，gk和gn为不小于零的整数，并且较大的gk值对应于较高的亮度)的灰度时，大量象素的每一个以至少在0＜gk≤n-1的范围内满足ΔV12(gk)＞0V和ΔV12(gk)》ΔV12(gk+1)的方式驱动，其中，ΔV12(gk)＝V1(gk)-V2(gk)是施加到第一子象素10a液晶层的方均根电压V1(gk)和施加到第二子象素10部的液晶层的方均根电压V2(gk)之差。When displaying a gray scale that satisfies 0≤gk≤gn (here, gk and gn are integers not less than zero, and a larger gk value corresponds to a higher brightness), each of a large number of pixels is at least at 0 In the range of <gk≤n-1, ΔV12(gk)>0V and ΔV12(gk)>ΔV12(gk+1) are satisfied, where ΔV12(gk)=V1(gk)-V2(gk) is applied The difference between the root mean square voltage V1(gk) applied to the liquid crystal layer of the first sub-pixel 10a and the root mean square voltage V2(gk) applied to the liquid crystal layer of the second sub-pixel 10.

每个象素10拥有的子象素数量(有时称作象素划分的数量)不限于二。每个象素10还可以有第三子象素(未示出)，对其施加不同于第一子象素10a和第二子象素10b的电压。在该情况下，象素构造成如果假设ΔV13＝V1(gk)-V3(gk)，此处V3(gk)为对第三子象素的液晶层施加的方均根电压，并且ΔV13(gk)为施加给第一子象素的液晶层的方均根电压与施加给第三子象素液晶层的方均根电压之差，则满足0V＜ΔV13(gk)＜ΔV12(gk)The number of sub-pixels (sometimes referred to as the number of pixel divisions) that each pixel 10 possesses is not limited to two. Each pixel 10 may also have a third sub-pixel (not shown) to which a voltage different from that of the first sub-pixel 10a and the second sub-pixel 10b is applied. In this case, the pixel is constructed such that if it is assumed that ΔV13=V1(gk)−V3(gk), where V3(gk) is the root mean square voltage applied to the liquid crystal layer of the third sub-pixel, and ΔV13(gk) is The difference between the root mean square voltage applied to the liquid crystal layer of the first sub-pixel and the root mean square voltage applied to the liquid crystal layer of the third sub-pixel satisfies 0V<ΔV13(gk)<ΔV12(gk)

优选施加到子象素液晶层的方均根电压至少在0＜gk≤n-1的范围内满足关系ΔV12(gk)＞ΔV12(gk+1)。因而，优选灰度水平变得越高，施加到第一子象素10a和第二子象素10b液晶层的方均根电压之差变得越小。换言之，优选随着灰度水平变低(接近黑色)，施加到第一子象素10a和第二子象素10b液晶层的方均根电压之差变得越大。另外，如果每个象素有第三子象素，则优选至少在0＜gk≤n-1的范围内满足关系ΔV12(gk)＞ΔV12(gk+1)和ΔV13(gk)＞ΔV13(gk+1)。Preferably, the RMS voltage applied to the sub-pixel liquid crystal layer satisfies the relationship ΔV12(gk)>ΔV12(gk+1) at least in the range of 0<gk≤n-1. Thus, it is preferable that the higher the gray level becomes, the smaller the difference in root mean square voltages applied to the liquid crystal layers of the first sub-pixel 10a and the second sub-pixel 10b becomes. In other words, it is preferable that as the gray level becomes lower (closer to black), the difference between the RMS voltages applied to the liquid crystal layers of the first sub-pixel 10a and the second sub-pixel 10b becomes larger. In addition, if each pixel has a third sub-pixel, it is preferable to satisfy the relations ΔV12(gk)>ΔV12(gk+1) and ΔV13(gk)>ΔV13(gk) at least in the range of 0<gk≤n-1 +1).

第一子象素10a的面积等于或小于第二子象素10b的面积。如果大量象素的每一个有三个或更多的子象素，则优选被施加最高方均根电压的子象素的面积(在此情况下是第一子象素)不大于被施加最低方均根电压的子象素(在此情况下是第二子象素)面积。具体地说，如果每个象素10有大量的子象素SP1、SP2、...、和SPn，并且施加到液晶层的方均根电压为V1(gk)、V2(gk)、...和Vn(gk)，则优选满足V1(gk)＞V2(gk)＞...＞Vn(gk)。另外，如果子象素的面积为SSP1、SSP2、...和SSPn，则优选满足SSP1≤SSP2≤...≤SSPn。The area of the first sub-pixel 10a is equal to or smaller than the area of the second sub-pixel 10b. If each of a large number of pixels has three or more subpixels, it is preferred that the area of the subpixel to which the highest rms voltage is applied (in this case the first subpixel) is no greater than the area of the subpixel to which the lowest rms voltage is applied. The sub-pixel (in this case the second sub-pixel) area. Specifically, if each pixel 10 has a large number of sub-pixels SP1, SP2, . . . Vn(gk) preferably satisfies V1(gk)>V2(gk)>...>Vn(gk). In addition, if the areas of the sub-pixels are SSP1, SSP2, ... and SSPn, it is preferable to satisfy SSP1≤SSP2≤...≤SSPn.

至少如果对于除了最高灰度和最低灰度的所有灰度(即，在0＜gk≤n-1的范围内)满足V1(gk)＞V2(gk)＞...＞Vn(gk)，则可以实现本发明。但是，也可以实施一种对所有灰度(即，在0≤gk≤n的范围内)满足该关系式的结构。At least if V1(gk)>V2(gk)>...>Vn(gk) is satisfied for all grayscales except the highest grayscale and the lowest grayscale (ie, in the range of 0<gk≤n-1), Then the present invention can be realized. However, it is also possible to implement a structure that satisfies this relational expression for all gradations (ie, in the range of 0≦gk≦n).

通过这种方式，如果每个象素被分成大量的子象素，并且对子象素的液晶层施加不同的电压，则获得不同γ特性的混合，因而，可以减小γ特性的视角依赖性。另外，因为较低灰度的方均根电压差设置得较大，所以在常黑模式的黑侧(低亮度水平处)γ特性的视角依赖性大大减小。这在提高显示质量方面非常有效。In this way, if each pixel is divided into a large number of sub-pixels, and different voltages are applied to the liquid crystal layer of the sub-pixels, a mixture of different gamma characteristics is obtained, thus, the viewing angle dependence of the gamma characteristic can be reduced . In addition, since the RMS voltage difference is set larger for lower grayscales, the viewing angle dependence of the gamma characteristic is greatly reduced on the black side (at low luminance levels) of the normally black mode. This is very effective in improving display quality.

可以用不同的结构以满足上述关系式的方式对子象素10a和10b的液晶层施加方均根电压。The root mean square voltage can be applied to the liquid crystal layers of the sub-pixels 10a and 10b in a manner to satisfy the above-mentioned relationship with different structures.

例如，液晶显示器100可以如图1所示构成。具体地说，在常规液晶显示器100’中，象素10仅有一个象素电极18经TFT 16连接到信号线14上，而液晶显示器100有两个子象素电极18a和18b分别经TFT 16a和16b连接到不同的信号线14a和14b上。For example, the liquid crystal display 100 can be configured as shown in FIG. 1 . Specifically, in the conventional liquid crystal display 100', the pixel 10 has only one pixel electrode 18 connected to the signal line 14 via the TFT 16, while the liquid crystal display 100 has two sub-pixel electrodes 18a and 18b respectively via the TFT 16a and 16b is connected to different signal lines 14a and 14b.

因为子象素10a和10b组成一个象素10，所以TFT16a和16b的栅极连接到公共扫描线(栅极线)12上，并通过公共扫描信号开和关。对信号线(源极总线)14a和14b供给满足上述关系的信号电压(灰度电压)。优选TFT16a和16b的栅极构造成公共栅极。Since the sub-pixels 10a and 10b constitute one pixel 10, the gates of the TFTs 16a and 16b are connected to a common scanning line (gate line) 12 and turned on and off by a common scanning signal. Signal voltages (gradation voltages) satisfying the above relationship are supplied to the signal lines (source bus lines) 14a and 14b. Preferably, the gates of TFTs 16a and 16b are configured as a common gate.

或者，在第一子象素和第二子象素每个包括由电连接到子象素电极的存储电容电极、绝缘层和经绝缘层与存储电容电极相对的存储电容反电极形成的存储电容的结构中(后面描述)，优选提供彼此电绝缘的第一子象素和第二子象素的存储电容反电极，并且通过改变供给存储电容反电极的电压(称作存储电容反电极电压)来改变施加到第一子象素液晶层的方均根电压和施加到第二子象素液晶层的方均根电压。通过调节存储电容的值和供给存储电容反电极的电压大小，可以控制施加到子象素液晶层的方均根电压的大小。Alternatively, each of the first sub-pixel and the second sub-pixel includes a storage capacitor formed by a storage capacitor electrode electrically connected to the sub-pixel electrode, an insulating layer, and a storage capacitor counter electrode opposite to the storage capacitor electrode through the insulating layer In the structure (described later), it is preferable to provide the storage capacitor counter electrodes of the first sub-pixel and the second sub-pixel electrically insulated from each other, and by changing the voltage supplied to the storage capacitor counter electrode (referred to as the storage capacitor counter electrode voltage) to change the root mean square voltage applied to the liquid crystal layer of the first sub-pixel and the root mean square voltage applied to the liquid crystal layer of the second sub-pixel. By adjusting the value of the storage capacitor and the voltage supplied to the counter electrode of the storage capacitor, the root mean square voltage applied to the sub-pixel liquid crystal layer can be controlled.

在此结构中，因为不需要对子象素电极18a和18b施加不同的信号电压，所以TFT三16a和16b可以连接到公共信号线上，并且可以对它们供给相同的信号电压。因此，信号线的数量在图3所示常规液晶显示器100’的情况下相同，并且可以利用与常规液晶显示器100’有相同结构的信号线驱动电路。当然，因为TFT三16a和16b连接到同一扫描线上，所以优选与上述实例的情况一样，共享公共栅极。In this structure, since there is no need to apply different signal voltages to the sub-pixel electrodes 18a and 18b, the TFTs 16a and 16b can be connected to a common signal line and the same signal voltage can be supplied to them. Therefore, the number of signal lines is the same in the case of the conventional liquid crystal display 100' shown in FIG. 3, and a signal line driving circuit having the same structure as the conventional liquid crystal display 100' can be used. Of course, since the TFTs 16a and 16b are connected to the same scanning line, it is preferable to share a common gate as in the case of the above example.

优选本发明应用到采用垂直排列的液晶层的液晶显示器，其中液晶层包含具有负介电各向异性的向列相液晶材料。特别是，优选每个子象素的液晶层包含四个在方位角方向分开大约90°的畴，当施加电压时液晶分子就倾斜(MVA)。或者，每个子象素的液晶层在施加电压时维持轴向对称地排列(ASM)。Preferably the invention is applied to a liquid crystal display employing a homeotropically aligned liquid crystal layer comprising a nematic liquid crystal material having negative dielectric anisotropy. In particular, it is preferable that the liquid crystal layer of each sub-pixel comprises four domains separated by about 90° in the azimuthal direction, and the liquid crystal molecules are tilted (MVA) when a voltage is applied. Alternatively, the liquid crystal layer of each sub-pixel maintains an axially symmetrical alignment (ASM) when a voltage is applied.

下面对于MVA液晶显示器100更详细地描述本发明的实施例，其中每个子象素的液晶层包含四个在方位角方向分开大约90°的畴，当施加电压时液晶分子就倾斜。Embodiments of the present invention are described in more detail below for an MVA liquid crystal display 100 in which the liquid crystal layer of each sub-pixel contains four domains separated by about 90° in azimuthal direction, and the liquid crystal molecules tilt when a voltage is applied.

如图2A所示，MVA液晶显示器100包括液晶板10A、安装在液晶板10A两侧的相位差补偿元件(典型地为相位差补偿板)20a和20b、将补偿板夹在中间的偏振片30a和30b、以及背光组件40。偏振片30a和30b的透射轴(也称作偏振轴)彼此正交(尼科尔分布)，以至于对液晶板10A的液晶层(未示出)不施加电压(垂直排列状态)时显黑。提供相位差补偿元件20a和20b以改善液晶显示器的视角特性，并利用已知技术优化设计。具体地说，已经优化(gk＝0)为将正面观察和以任意方位角斜视时的亮度(黑色水平)差减为最小。当以这种方式优化相位差补偿元件20a和20b时，本发明可以产生更大的视场效应。As shown in FIG. 2A, an MVA liquid crystal display 100 includes a liquid crystal panel 10A, phase difference compensation elements (typically phase difference compensation plates) 20a and 20b installed on both sides of the liquid crystal panel 10A, and a polarizing plate 30a sandwiching the compensation plate. and 30b, and the backlight assembly 40. The transmission axes (also referred to as polarization axes) of the polarizing plates 30a and 30b are orthogonal to each other (Nicol distribution), so that black appears when no voltage is applied to the liquid crystal layer (not shown) of the liquid crystal panel 10A (homeotropic alignment state). . The phase difference compensating elements 20a and 20b are provided to improve the viewing angle characteristics of the liquid crystal display, and the design is optimized using known techniques. Specifically, it has been optimized (gk=0) to minimize the difference in luminance (black level) between frontal viewing and squinting at any azimuth. When the phase difference compensating elements 20a and 20b are optimized in this way, the present invention can produce a larger field of view effect.

实际上，在基底11a上形成公共扫描线12、信号线14a和14b以及TFT16a和16b(见图1)，以分别在预定时间对子象素电极18a和18b施加预定的信号电压。另外，根据需要形成电路等以驱动这些元件。此外，根据需要在另一个基底11b上设置彩色滤光片等。Actually, common scanning line 12, signal lines 14a and 14b, and TFTs 16a and 16b (see FIG. 1) are formed on substrate 11a to apply predetermined signal voltages to sub-pixel electrodes 18a and 18b at predetermined times, respectively. In addition, circuits and the like are formed as necessary to drive these elements. In addition, a color filter and the like are provided on another substrate 11b as necessary.

下面参考图2A～2C描述MVA液晶显示器100中的象素结构。例如在日本待公开专利申请JP11-242225中描述了MVA液晶显示器的结构和工作。The pixel structure in the MVA liquid crystal display 100 will be described below with reference to FIGS. 2A to 2C. The structure and operation of an MVA liquid crystal display is described, for example, in Japanese Laid-Open Patent Application JP11-242225.

如参考图1所述，MVA液晶显示器100中的象素10有两个子象素10a和10b，子象素中的子象素10a具有子象素电极18a，子象素10b具有子象素电极18b。如图2C所示，形成在玻璃基底11a上的子象素电极18a(和子象素电极18b(未示出))具有狭缝18s，并与放置成与子象素电极18a隔液晶层13相对的反电极17一起形成倾斜电场。另外，在玻璃基底11b的安置了反电极17的表面上设置凸向液晶层13的肋19。液晶层13由具有负介电各向异性的向列相液晶材料制成。不施加电压时，其通过覆盖反电极17、肋19和子象素电极18a和18b的垂直排列膜(未示出)近乎垂直地排列。垂直排列的液晶分子通过肋19表面(倾斜面)和倾斜电场在预定的方向上安稳地铺设。As described with reference to FIG. 1, the pixel 10 in the MVA liquid crystal display 100 has two sub-pixels 10a and 10b, the sub-pixel 10a of the sub-pixels has a sub-pixel electrode 18a, and the sub-pixel 10b has a sub-pixel electrode 18b. As shown in Figure 2C, the sub-pixel electrode 18a (and sub-pixel electrode 18b (not shown)) formed on the glass substrate 11a has a slit 18s, and is placed to be opposite to the liquid crystal layer 13 with the sub-pixel electrode 18a. The counter electrodes 17 together form an oblique electric field. In addition, ribs 19 protruding toward the liquid crystal layer 13 are provided on the surface of the glass substrate 11b on which the counter electrode 17 is disposed. The liquid crystal layer 13 is made of a nematic liquid crystal material with negative dielectric anisotropy. When no voltage is applied, they are aligned almost vertically by a vertical alignment film (not shown) covering the counter electrode 17, the rib 19, and the sub-pixel electrodes 18a and 18b. The vertically aligned liquid crystal molecules are laid down stably in a predetermined direction by the surface of the rib 19 (inclined surface) and the inclined electric field.

如图2C所示，肋19以形成一角度的方式向其中心倾斜。液晶分子近乎垂直于倾斜面地排列。因而，肋19决定液晶分子的倾角(由基底表面与液晶分子的长轴形成的角度)分布。狭缝18s规律地改变施加到液晶层的电场的方向。因此，当施加电场时，液晶分子通过肋19和狭缝18在图中箭头所示的四个方向---右上、左上、左下和右下---排列，提供垂直和水平对称的、良好的视角特性。液晶板10A的矩形显示表面以其较长的尺度水平放置和偏振片30a的透射轴平行于较长尺度放置来典型地取向。另一方面，象素10以其较长尺度正交于液晶板10A的较长尺度来典型地取向，如图2B所示。As shown in FIG. 2C, the rib 19 is inclined toward its center in an angled manner. The liquid crystal molecules are aligned almost perpendicular to the inclined plane. Thus, the ribs 19 determine the distribution of inclination angles (angles formed by the surface of the substrate and the long axes of the liquid crystal molecules) of the liquid crystal molecules. The slits 18s regularly change the direction of the electric field applied to the liquid crystal layer. Therefore, when an electric field is applied, the liquid crystal molecules are aligned in the four directions shown by the arrows in the figure --- upper right, upper left, lower left and lower right --- through the ribs 19 and the slits 18, providing vertical and horizontal symmetry, good viewing angle characteristics. The rectangular display surface of liquid crystal panel 10A is typically oriented with its longer dimension lying horizontally and with the transmission axis of polarizer 30a parallel to the longer dimension. Pixels 10, on the other hand, are typically oriented with their longer dimension orthogonal to the longer dimension of liquid crystal panel 10A, as shown in FIG. 2B.

优选，如图2B所示，第一子象素10a和第二子象素10b的面积实际上相等，每个子象素包含在第一方向延伸的第一肋和在第二方向上延伸的第二肋，每个子象素中的第一肋和第二肋相对于平行于扫描线12的中心线对称放置，并且其中一个子象素中的肋分布与另一个子象素中的肋分布相对于正交于扫描线12的中心线对称。此种分布导致每个子象素中的液晶分子在四个方向---右上、左上、左下和右下---上分布，并且使得在包含第一子象素和第二子象素的整个象素中液晶畴的面积实际上相等，提供垂直和水平对称以及良好的视角特性。另外，优选在每个子象素中平行于公共扫描线的中心线以近似等于扫描线阵列间距一半的间隔放置。Preferably, as shown in FIG. 2B, the areas of the first sub-pixel 10a and the second sub-pixel 10b are substantially equal, and each sub-pixel includes a first rib extending in the first direction and a second rib extending in the second direction. Two ribs, the first rib and the second rib in each sub-pixel are symmetrically placed relative to the center line parallel to the scan line 12, and the distribution of ribs in one sub-pixel is opposite to the distribution of ribs in the other sub-pixel It is symmetrical about the center line perpendicular to the scan line 12 . This kind of distribution causes the liquid crystal molecules in each sub-pixel to be distributed in four directions—upper right, upper left, lower left, and lower right—and makes the liquid crystal molecules in the entire sub-pixel including the first sub-pixel and the second sub-pixel The areas of liquid crystal domains in a pixel are virtually equal, providing vertical and horizontal symmetry and good viewing angle characteristics. In addition, it is preferable to place in each sub-pixel parallel to the center line of the common scan line at an interval approximately equal to half the pitch of the scan line array.

接下来，对根据本发明实施例的液晶显示器100的工作及显示特性进行描述。Next, the operation and display characteristics of the liquid crystal display 100 according to the embodiment of the present invention will be described.

首先，参见图4，对与图3所示常规液晶显示器100’有相同电极结构的MVA液晶显示器的显示特性给予描述。顺便说一下，对根据本发明实施例的液晶显示器100中子象素10a和10b(即子象素电极18a和18b)的液晶层施加相同方均根电压所获得的显示特性近似等于常规液晶显示器的显示特性。First, referring to FIG. 4, a description will be given of display characteristics of an MVA liquid crystal display having the same electrode structure as the conventional liquid crystal display 100' shown in FIG. By the way, the display characteristics obtained by applying the same root-mean-square voltage to the liquid crystal layers of the sub-pixels 10a and 10b (i.e., the sub-pixel electrodes 18a and 18b) in the liquid crystal display 100 according to the embodiment of the present invention are approximately equal to those of a conventional liquid crystal display. characteristic.

图4A是从前侧(N1)、右侧60°(L1)和从右上60°(LU1)观看显示时的透射率与施加电压的依赖关系。图4B是以应用最高灰度电压(显示白色所需的电压)获得的透射率为100％规一化之后图4A中所示的三个透射率曲线。其表示三种条件下：正视状态(N2)、右侧60°(L2)和从右上60°(LU2)规一化的透射率与施加电压的关系：正视状态(N2)、右侧60°(L2)和从右上60°(LU2)。顺便说一下，“60°”是指与显示表面法线夹60°的角。Figure 4A is the dependence of transmittance on applied voltage when viewing the display from the front side (N1), right 60° (L1), and upper right 60° (LU1). FIG. 4B is the three transmittance curves shown in FIG. 4A after normalizing to a transmittance of 100% obtained by applying the highest grayscale voltage (the voltage required to display white). It represents the relationship between normalized transmittance and applied voltage under three conditions: front view state (N2), right 60° (L2) and upper right 60° (LU2): front view state (N2), right 60° (L2) and 60° from upper right (LU2). Incidentally, "60°" means an angle of 60° with the display surface normal.

从图4B可以看出，正视的显示特性不同于右侧60°和右上侧60°的显示特性。这表明γ特性依赖于观察方向。It can be seen from FIG. 4B that the display characteristics of the front view are different from those of 60° to the right and 60° to the upper right. This indicates that the γ properties depend on the viewing direction.

图4C更清晰地表示γ特性的差异。为了清晰地表示γ特性的差异，水平轴代表(正视规一化的透射率/100)^(1/2.2)，而竖直轴代表N3、L3和LU3状态下的灰度特性：正视灰度特性＝(正视规一化的透射率/100)^(1/2.2)，右侧60°视角灰度特性＝(右侧60°规一化的透射率/100)^(1/2.2)，右上侧60°视角灰度特性＝(右上侧60°规一化的透射率/100)^(1/2.2)，此处“-”表示指数，指数的倒数对应于γ值。在典型的液晶显示器中，正视灰度特性的γ值设为2.2。Figure 4C more clearly shows the difference in gamma properties. In order to clearly represent the difference in γ characteristics, the horizontal axis represents (normalized transmittance/100)^(1/2.2), while the vertical axis represents the grayscale characteristics in the N3, L3 and LU3 states: Characteristic = (transmittance normalized at front view/100)^(1/2.2), right 60° viewing angle gray scale characteristic=(normalized transmittance at 60° right/100)^(1/2.2), Grayscale characteristics of the 60° viewing angle on the upper right side = (normalized transmittance at 60° on the upper right side/100)^(1/2.2), where "-" represents an index, and the reciprocal of the index corresponds to the γ value. In a typical liquid crystal display, the gamma value of the front-view grayscale characteristic is set to 2.2.

参见图4C，在正视状态(N3)下横坐标值与纵坐标值重合，因而此状态(N3)下的灰度特性为线性。另一方面，右侧60°视角灰度特性(L3)和右上侧60°视角灰度特性(LU3)为曲线。正视状态(N3)下曲线(L3和LU3)与直线的偏差量化地代表γ特性的各个偏差，即灰度显示的偏差(差异)。Referring to FIG. 4C , the abscissa value coincides with the ordinate value in the normal view state ( N3 ), so the grayscale characteristic in this state ( N3 ) is linear. On the other hand, the right 60° viewing angle gradation characteristic ( L3 ) and the right upper 60° viewing angle gradation characteristic ( LU3 ) are curved lines. The deviation between the curves ( L3 and LU3 ) and the straight line under the emmetropic state ( N3 ) quantitatively represents each deviation of the γ characteristic, that is, the deviation (difference) of the grayscale display.

本发明旨在减小常黑液晶显示器中的这种偏差。理想的情形是，代表右侧60°视角灰度特性(L3)和右上侧60°视角灰度特性(LU3)的曲线(L3和LU3)与代表正视灰度特性(N3)的直线重合。下面将参考附图评估改善γ特性的效果，其中附图表示γ特性的差异，如同图4C所示的情形。The present invention aims to reduce this deviation in normally black liquid crystal displays. Ideally, the curves (L3 and LU3) representing the grayscale characteristic of the right 60° viewing angle (L3) and the upper right 60° viewing angle grayscale characteristic (LU3) coincide with the straight line representing the grayscale characteristic of the front view (N3). Next, the effect of improving the γ characteristic will be evaluated with reference to the accompanying drawings showing differences in the γ characteristic, as in the case shown in FIG. 4C.

参见图4B，下面将对本发明如何可以通过在每个象素中设置第一子象素和第二子象素并对子象素的液晶层施加不同的方均根电压来减小γ特性的偏差的主要原理给予描述。假设此处第一子象素和第二子象素具有相同的面积。Referring to FIG. 4B, how the present invention can reduce the deviation of the gamma characteristic by arranging the first sub-pixel and the second sub-pixel in each pixel and applying different root-mean-square voltages to the liquid crystal layer of the sub-pixels The main principles are described. It is assumed here that the first sub-pixel and the second sub-pixel have the same area.

对于常规的液晶显示器100’，在由点NA代表正视透射率的电压处，右侧60°视角透射率由点LA表示，其中点LA代表与NA相同电压的右侧60°视角透射率。关于本发明，要获得与点NA相同的正视透射率，可以将第一子象素和第二子象素的正视透射率分别设置在点NB1和NB2。因为点NB2处的正视透射率近似为零，并且第一子象素和第二子象素具有相同的面积，所以NB1处的正视透射率是点NA处正视透射率的两倍。点NB1和NB2之间的方均根电压之差为ΔV12。此外，对于本发明，右侧60°视角透射率由点P代表，其作为分别与点NB1和NB2相同电压处的右侧60°视角透射率LB1和LB2的平均值。For the conventional liquid crystal display 100', at the voltage at which the front view transmittance is represented by point NA, the right 60° viewing angle transmittance is represented by point LA, where point LA represents the right 60° viewing angle transmittance at the same voltage as NA. Regarding the present invention, to obtain the same front-view transmittance as that of point NA, the front-view transmittances of the first sub-pixel and the second sub-pixel can be respectively set at points NB1 and NB2. Since the front-view transmittance at point NB2 is approximately zero, and the first sub-pixel and the second sub-pixel have the same area, the front-view transmittance at NB1 is twice that at point NA. The difference in rms voltage between points NB1 and NB2 is ΔV12. Also, for the present invention, the right 60° viewing angle transmittance is represented by a point P as an average value of the right 60° viewing angle transmittances LB1 and LB2 at the same voltage as points NB1 and NB2, respectively.

对于根据本发明的液晶显示器，代表右侧60°视角透射率的点P比代表常规液晶显示器100’的右侧60°视角透射率的点LA更接近代表对应的正视透射率的点NA。这意味着γ特性的偏差减小。For the liquid crystal display according to the present invention, the point P representing the right 60° viewing angle transmittance is closer to the point NA representing the corresponding front viewing angle transmittance than the point LA representing the right 60° viewing angle transmittance of the conventional liquid crystal display 100′. This means that the deviation of the gamma characteristic is reduced.

从上述可以看出，第二子象素的右侧60°视角透射率(见点LB2)接近零的事实增强了本发明的效果。因而，要增强本发明的效果，优选控制斜视黑屏时透射率的增加。从.此观点出发，优选根据需要安装如图2A所示的相位差补偿元件20a和20b，从而控制斜视黑屏时透射率的增加。It can be seen from the above that the effect of the present invention is enhanced by the fact that the right 60° viewing angle transmittance (see point LB2 ) of the second sub-pixel is close to zero. Therefore, to enhance the effect of the present invention, it is preferable to control the increase in transmittance when looking obliquely at the black screen. From this point of view, it is preferable to install the phase difference compensating elements 20a and 20b as shown in FIG. 2A as needed, so as to control the increase of the transmittance when looking obliquely at the black screen.

根据本发明的液晶显示器100通过对每个象素10中各个子象素10a和10b的两个液晶层施加不同的方均根电压来改善γ特性。这样做时，施加到子象素10a和10b的各个液晶层的方均根电压之差ΔV12(gk)＝V1(gk)一V2(gk)设置成满足ΔV12(gk)＞0V和ΔV12(gk)≥ΔV12(gk+1)。下面将描述在0＜gk≤n的整个范围内满足上述关系的情形。The liquid crystal display 100 according to the present invention improves the gamma characteristic by applying different root mean square voltages to the two liquid crystal layers of the respective sub-pixels 10a and 10b in each pixel 10 . In doing so, the difference ΔV12(gk)=V1(gk)−V2(gk) applied to the root mean square voltages of the respective liquid crystal layers of the sub-pixels 10a and 10b is set to satisfy ΔV12(gk)>0V and ΔV12(gk)≥ ΔV12(gk+1). The case where the above relationship is satisfied over the entire range of 0<gk≦n will be described below.

图5A～5D表示施加到图1所示象素10的第一子象素10a的液晶层的方均根电压V1(gk)和施加到第二子象素10b的液晶层的方均根电压V2(gk)之间的多种关系。5A to 5D represent the root mean square voltage V1 (gk) applied to the liquid crystal layer of the first sub-pixel 10a of the pixel 10 shown in FIG. 1 and the root mean square voltage V2 (gk) applied to the liquid crystal layer of the second sub-pixel 10b. various relationships between.

在图5A所示的电压施加状态A下，向两个子像素10a和10b的液晶层施加相同的电压(V1＝V2)。因而，ΔV12(gk)＝0V。In the voltage application state A shown in FIG. 5A, the same voltage (V1=V2) is applied to the liquid crystal layers of the two sub-pixels 10a and 10b. Therefore, ΔV12(gk)=0V.

在图5B所示的电压状态B下，保持关系V1＞V2，并且V12为与V1值无关的常数。因而，在电压状态B下，对任何灰度gk满足关系ΔV12(gk)＝ΔV12(gk+1)。该实施例采用ΔV12(gk)＝1.5V作为典型值，当然，也可以采用其它值。较大的ΔV12(gk)值增强了本发明的效果，但是造成白模式中降低的亮度(透射率)的问题。另外，当ΔV12(gk)的值超过液晶显示器的透射率的阈值电压(即图4B所示的Vth)时，黑模式的亮度(透射率)增加，显示对比度减小，这是个问题。因此，优选的是ΔV12(gk)≤Vth。In the voltage state B shown in FIG. 5B, the relationship V1>V2 holds, and V12 is a constant regardless of the value of V1. Thus, in the voltage state B, the relationship ΔV12(gk)=ΔV12(gk+1) is satisfied for any gray scale gk. This embodiment uses ΔV12(gk)=1.5V as a typical value, of course, other values can also be used. A larger value of ΔV12(gk) enhances the effect of the present invention, but causes a problem of reduced luminance (transmittance) in white mode. In addition, when the value of ΔV12(gk) exceeds the threshold voltage of the transmittance of the liquid crystal display (ie, Vth shown in FIG. 4B ), the brightness (transmittance) of the black mode increases and the display contrast decreases, which is a problem. Therefore, it is preferable that ΔV12(gk)≦Vth.

在图5C所示的电压状态C下，保持关系V1＞V2，并且ΔV12随着V1的增加而减小。因而，在电压状态C下，对任何灰度gk满足关系ΔV12(gk)＞ΔV12(gk+1)。In the voltage state C shown in FIG. 5C , the relationship V1 > V2 holds, and ΔV12 decreases as V1 increases. Thus, in the voltage state C, the relationship ΔV12(gk)>ΔV12(gk+1) is satisfied for any gray scale gk.

该实施例采用ΔV12(0)＝1.5V和ΔV12(n)＝0V作为典型值，当然，也可以采用其它值。然而，如上所述，优选的是在斜视期间从显示对比度的设定点起ΔV12(gk)≤Vth，优选的是从白模式中亮度的设定点起ΔV12(n)＝0V。This embodiment uses ΔV12(0)=1.5V and ΔV12(n)=0V as typical values, and of course, other values can also be used. However, as mentioned above, it is preferred that ΔV12(gk)≦Vth from the set point of display contrast during squinting, preferably ΔV12(n)=0V from the set point of brightness in white mode.

在图5D所示的电压状态D下，保持关系V1＞V2，并且ΔV12随V1的增大而增大。因而，在电压状态D下，对任何灰度gk保持ΔV12(gk)＜ΔV12(gk+1)。In the voltage state D shown in FIG. 5D , the relationship V1 > V2 holds, and ΔV12 increases with the increase of V1 . Thus, in the voltage state D, ΔV12(gk)<ΔV12(gk+1) holds for any gray scale gk.

本实施例采用ΔV12(0)＝0V以及ΔV12(n)＝1.5V作为典型值。In this embodiment, ΔV12(0)=0V and ΔV12(n)=1.5V are used as typical values.

在根据本发明实施例的液晶显示器100中，对子象素10a和10b的液晶层施加电压，使得将满足电压状态B或电压状态C。顺便说一下，虽然在图5B和图5C中对于所有灰度满足ΔV12(gk)＞0，但是在最佳灰度或最高灰度的情况下ΔV12＝0均成立。In the liquid crystal display 100 according to the embodiment of the present invention, a voltage is applied to the liquid crystal layer of the sub-pixels 10a and 10b so that the voltage state B or the voltage state C will be satisfied. Incidentally, although ΔV12(gk)>0 is satisfied for all gradations in FIG. 5B and FIG. 5C , ΔV12=0 holds in the case of the best gradation or the highest gradation.

下面将参考图6描述电压状态A～D下MVA液晶显示器的灰度特性。图6A和6B中的水平轴代表(正视规一化的透射率/100)^(1/2.2)，图6A中的竖直轴代表(右侧60°规一化的透射率/100)^(1/2.2)，图6B中的竖直轴代表(右上侧60°规一化的透射率/100)^(1/2.2)。图中还示出了代表正视灰度特性的直线一并用于参考。Grayscale characteristics of the MVA liquid crystal display in the voltage states A to D will be described below with reference to FIG. 6 . The horizontal axis in Figures 6A and 6B represents (transmittance normalized in front view/100)^(1/2.2), and the vertical axis in Figure 6A represents (transmittance normalized at 60° on the right/100)^ (1/2.2), the vertical axis in Figure 6B represents (upper right 60° normalized transmittance/100)^(1/2.2). Also shown in the figure is a straight line representing grayscale characteristics in frontal view for reference.

在电压状态A下，对子象素10a和10b的液晶层施加相同的电压(ΔV12(gk)＝0)。如图6A和6B所示，与图4中所示常规液晶显示器一样，γ特性极大地偏离。In voltage state A, the same voltage (ΔV12(gk)=0) is applied to the liquid crystal layers of the sub-pixels 10a and 10b. As shown in FIGS. 6A and 6B, like the conventional liquid crystal display shown in FIG. 4, the gamma characteristic deviates greatly.

电压状态D对减小γ特性的视角依赖性的影响小于电压状态B和C的情形。例如，电压状态D对应于利用日本待公开专利申请JP6-332009中描述的常规容量划分划分的象素的电压状态。虽然在常白模式下对改善视角特性有影响，但对常黑模式下减小γ特性的视角依赖性没有很大的影响。The effect of voltage state D on reducing the viewing angle dependence of the γ characteristic is smaller than that of voltage states B and C. For example, the voltage state D corresponds to the voltage state of pixels divided by conventional capacity division described in Japanese Laid-Open Patent Application JP6-332009. Although it has an effect on improving the viewing angle characteristics in the normally white mode, it has no great effect on reducing the viewing angle dependence of the γ characteristic in the normally black mode.

如上所述，优选电压状态B或C用于减小常黑模式下γ特性的视角依赖性。As mentioned above, the voltage state B or C is preferred for reducing the viewing angle dependence of the gamma characteristic in the normally black mode.

接下来，参见图7，对电压状态中白色模式透射率、即施加最高灰度电压时的变化进行描述。Next, referring to FIG. 7 , the change in the white mode transmittance in the voltage state, that is, when the highest grayscale voltage is applied, will be described.

白模式中的透射率在电压状态B和D下自然低于在电压状态A下的情形。电压状态C下白色模式的透射率等于电压状态A下的透射率。在此方面，电压状态C最好是电压状态B和D。因而，考虑到γ特性的视角依赖性以及白模式中的透射率，可以说电压状态C更优越。The transmittance in white mode is naturally lower in voltage states B and D than in voltage state A. The transmittance of the white mode in the voltage state C is equal to the transmittance in the voltage state A. In this respect, voltage state C is preferably voltage states B and D. Thus, it can be said that the voltage state C is superior in consideration of the viewing angle dependence of the γ characteristic and the transmittance in the white mode.

接下来描述子象素之间的优选面积比。A preferred area ratio between sub-pixels is described next.

根据本发明，如果施加到子象素SP1、SP2、…和SPn的液晶层的方均根电压为V1、V2、…Vn，如果子象素的面积为SSP1、SSP2、…和SSPn，并且如果保持关系V1＞V2＞…Vn，则优选满足SSP1≤SSPn。后面将有描述。According to the present invention, if the root-mean-square voltage applied to the liquid crystal layer of the sub-pixels SP1, SP2, ... and SPn is V1, V2, ... Vn, if the area of the sub-pixels is SSP1, SSP2, ... and SSPn, and if the relation V1>V2>...Vn, it is preferable to satisfy SSP1≦SSPn. It will be described later.

假设SSP1和SSP2是图1所示象素10中子象素10a和10b的面积。图8比较了电压状态C下面积比(SSP1∶SSP2)＝(1∶3)、(1∶2)、(1∶1)、(2∶1)、(3∶1)之间的γ特性。图8A表示右侧视角的γ特性，图8B表示右上侧视角的γ特性。图9表示不同狭縫比的正视透射率。Assume that SSP1 and SSP2 are the areas of sub-pixels 10a and 10b in pixel 10 shown in FIG. Figure 8 compares the γ characteristics among the area ratios (SSP1:SSP2)=(1:3), (1:2), (1:1), (2:1), (3:1) under the voltage state C . FIG. 8A shows the γ characteristic of the right viewing angle, and FIG. 8B shows the γ characteristic of the upper right viewing angle. Figure 9 shows the front view transmittance for different slit ratios.

从图8中可以看出，被施加较高电压的子象素(10a)的面积比的减小对减小γ特性的视角依赖性更有效。It can be seen from FIG. 8 that the reduction in the area ratio of the sub-pixel (10a) to which a higher voltage is applied is more effective in reducing the viewing angle dependence of the gamma characteristic.

当面积比(SSP1∶SSP2)＝(1∶1)时白模式中的透射率取最大值，并随着面积比变得不均匀而降低。这是因为如果面积比变得不均匀，则不再能得到良好的多畴垂直排列，从而减小了第一子象素和第二子象素的面积。这种趋势在具有小象素面积的高分辨率液晶显示器中得到断定。因而，虽然优选面积比为1∶1，但考虑到减小对γ特性的视角依赖性、白模式中的透射率以及液晶显示器的利用等的影响，可以根据需要调节。The transmittance in the white mode takes a maximum value when the area ratio (SSP1:SSP2)=(1:1), and decreases as the area ratio becomes non-uniform. This is because if the area ratio becomes non-uniform, good multi-domain vertical alignment can no longer be obtained, thereby reducing the areas of the first sub-pixel and the second sub-pixel. This tendency is confirmed in a high-resolution liquid crystal display having a small pixel area. Therefore, although the area ratio is preferably 1:1, it can be adjusted as necessary in consideration of reducing the viewing angle dependence on the γ characteristic, the transmittance in white mode, and the utilization of liquid crystal displays.

接下来将描述象素的划分数。Next, the number of divisions of pixels will be described.

虽然对于图1所示的液晶显示器100，象素10由两个子象素(10a和10b)组成，但本发明不限于此，子象素的数量可以为三个或更多。Although for the liquid crystal display 100 shown in FIG. 1, the pixel 10 is composed of two sub-pixels (10a and 10b), the present invention is not limited thereto, and the number of sub-pixels may be three or more.

图10比较在三种电压状态下获得的γ特性：象素被分成两个子象素；象素被分成四个子象素；和象素不被划分。图10A表示右侧视角的γ特性，图10B表示右上侧的视角γ特性。图11表示白模式中液晶显示器的对应透射率。象素的面积恒定，并且采用了电压状态B。Fig. 10 compares gamma characteristics obtained under three voltage states: a pixel is divided into two sub-pixels; a pixel is divided into four sub-pixels; and a pixel is not divided. FIG. 10A shows the γ characteristic of the viewing angle at the right side, and FIG. 10B shows the γ characteristic of the viewing angle at the upper right side. FIG. 11 shows the corresponding transmittance of a liquid crystal display in white mode. The area of the pixel is constant, and voltage state B is used.

从图10中可以看出，子象素数量的增加增大了校正γ特性中的偏差的效果。与不划分象素相比，一个象素被分成两个子象素时的效果尤其得以肯定。当划分的数量从两个上升到四个时，虽然在γ特性的偏差上没有很大的差异，但就与灰度变化有关的偏差的平稳变化而言特性得以改善。但是，从图11中可以看出，白模式中的透射率(正视)随划分数量的增大而下降。尤其在划分的数量从两个增加到四个时下降很大。这种很大下降的主要原因在于每个子象素的面积如上所述地大大减小。比较不划分和划分为二的状态时透射率减小的主要原因在于采用了电压状态B。因而，考虑到对减小γ特性的视角依赖性、白模式中的透射率以及液晶显示器的采用等的影响，可以根据需要调节划分的数量。As can be seen from FIG. 10, an increase in the number of sub-pixels increases the effect of correcting deviations in the gamma characteristic. The effect when one pixel is divided into two sub-pixels is especially confirmed compared to not dividing the pixel. When the number of divisions was raised from two to four, although there was no great difference in the deviation of the γ characteristic, the characteristic was improved in terms of a smooth change of the deviation related to the gray scale change. However, it can be seen from FIG. 11 that the transmittance (front view) in the white mode decreases as the number of divisions increases. Especially when the number of partitions is increased from two to four the drop is large. The main reason for this large drop is that the area of each sub-pixel is greatly reduced as described above. The main reason for the reduction in transmittance when comparing the non-divided and divided-by-two states is that voltage state B is employed. Thus, the number of divisions can be adjusted as necessary in consideration of the influence on reducing the viewing angle dependence of the γ characteristic, the transmittance in the white mode, the adoption of a liquid crystal display, and the like.

从上可以看出，γ特性的偏差、偏差的形状畸变以及γ特性的视角依赖性随象素划分数量的增大而增大。这些效果在比较不划分象素和象素划分为二(两个子象素)的状态时尤为显著。因而，考虑到由子象素数量的增加以及可制造性的下降导致的白模式透射率的下降，优选将一个象素划分为两个子象素。It can be seen from the above that the deviation of the gamma characteristic, the shape distortion of the deviation, and the viewing angle dependence of the gamma characteristic increase as the number of pixel divisions increases. These effects are particularly remarkable when comparing the states of no pixel division and the pixel division by two (two sub-pixels). Thus, it is preferable to divide one pixel into two sub-pixels in consideration of a decrease in white mode transmittance caused by an increase in the number of sub-pixels and a decrease in manufacturability.

在图1所示的液晶显示器100中，子象素10a和10b彼此独立地连接到TFT16a和TFT 16b上。TFT 16a和TFT16b的源电极分别连接到信号线14a和14b上。因而，液晶显示器100允许任何方均根电压施加到子象素的每个液晶层上，但要求是图3所示常规液晶显示器100’的信号线14的两倍(信号线14a和14b)，还需要两倍之多的信号线驱动电路。In the liquid crystal display 100 shown in FIG. 1, sub-pixels 10a and 10b are connected to TFT 16a and TFT 16b independently of each other. The source electrodes of the TFT 16a and the TFT 16b are connected to the signal lines 14a and 14b, respectively. Thus, liquid crystal display 100 allows any rms voltage to be applied to each liquid crystal layer of a sub-pixel, but requires twice the signal line 14 (signal lines 14a and 14b) of conventional liquid crystal display 100' shown in FIG. Twice as many signal line drive circuits.

相反，根据本发明另一实施例的液晶显示器200具有与常规液晶显示器100’相同数量的信号线，但可以在类似于上述电压状态C的电压状态下对子象素10a和10b的液晶层施加互不相同的方均根电压。In contrast, the liquid crystal display 200 according to another embodiment of the present invention has the same number of signal lines as the conventional liquid crystal display 100', but can be applied to the liquid crystal layers of the sub-pixels 10a and 10b in a voltage state similar to the voltage state C described above. different rms voltages.

图12表示根据本发明另一实施例的液晶显示器200的电路结构。具有与图1所示液晶显示器100相同功能的元件采用与对应元件相同的标号并省去描述。FIG. 12 shows a circuit structure of a liquid crystal display 200 according to another embodiment of the present invention. Components having the same functions as those of the liquid crystal display 100 shown in FIG. 1 are given the same reference numerals as corresponding components and descriptions are omitted.

象素10被分成子象素10a和10b，这些子象素分别连接到TFT 16a和TFT16b以及存储电容(CS)22a和22b上。TFT16a和TFT16b的栅电极连接到扫描线12上，源电极连接到公共信号线14上。存储电容22a和22b分别连接到存储电容线(CS总线)24a和24b上。存储电容22a和22b分别由电连接到子象素电极18a和18b上的存储电容、与存储电容线24a和24b电连接的存储电容反电极以及形成于其间的绝缘层(未示出)形成。存储电容22a和22b的存储电容反电极彼此独立，并经存储电容线24a和24b被供以互不相同的存储电容反电压。Pixel 10 is divided into sub-pixels 10a and 10b, which are connected to TFT 16a and TFT 16b and storage capacitors (CS) 22a and 22b, respectively. Gate electrodes of TFT 16 a and TFT 16 b are connected to scanning line 12 , and source electrodes are connected to common signal line 14 . Storage capacitors 22a and 22b are connected to storage capacitor lines (CS bus lines) 24a and 24b, respectively. Storage capacitors 22a and 22b are respectively formed by storage capacitors electrically connected to sub-pixel electrodes 18a and 18b, storage capacitor counter electrodes electrically connected to storage capacitor lines 24a and 24b, and an insulating layer (not shown) formed therebetween. The storage capacitor counter electrodes of the storage capacitors 22a and 22b are independent from each other, and are supplied with storage capacitor counter voltages different from each other via the storage capacitor lines 24a and 24b.

接下来，参考附图，对液晶显示器200如何对子象素10a和10b的液晶层施加不同的方均根电压的原理给予描述。Next, with reference to the drawings, the principle of how the liquid crystal display 200 applies different RMS voltages to the liquid crystal layers of the sub-pixels 10a and 10b will be described.

图13表示液晶显示器200的一个象素的等效电路。在等效电路中，子象素10a和10b的液晶层用标号13a和13b表示。由子象素电极18a和18b、液晶层13a和13b以及反电极17(子象素10a和10b共用)形成的液晶电容用Clca和Clcb表示。FIG. 13 shows an equivalent circuit of one pixel of the liquid crystal display 200. As shown in FIG. In the equivalent circuit, the liquid crystal layers of the sub-pixels 10a and 10b are denoted by reference numerals 13a and 13b. The liquid crystal capacitors formed by the sub-pixel electrodes 18a and 18b, the liquid crystal layers 13a and 13b and the counter electrode 17 (common to the sub-pixels 10a and 10b) are denoted by Clca and Clcb.

假设液晶电容Clca和Clcb具有相同的电容值CLC(V)。CLC(V)的值依赖于施加给子象素10a和10b的液晶层的方均根电压。彼此独立地连接到子象素10a和10b的液晶电容上的存储电容22a和22b由Ccsa和Ccsb表示，并且假设它们的电容值为CCS。Assume that the liquid crystal capacitors Clca and Clcb have the same capacitance value CLC(V). The value of CLC(V) depends on the root mean square voltage applied to the liquid crystal layers of the sub-pixels 10a and 10b. The storage capacitors 22a and 22b connected to the liquid crystal capacitors of the sub-pixels 10a and 10b independently of each other are denoted by Ccsa and Ccsb, and their capacitance value is assumed to be CCS.

子象素10a的液晶电容Clca和存储电容Ccsa之一的电极连接到TFT 16a的漏电极上以驱动子象素10a。液晶电容Clca的其它电极连接到反电极上，而存储电容Ccsa的另一个电极连接到存储电容线24a上。子象素10b的液晶电容Clcb和存储电容Ccsb两者之一的电极连接到TFT 16b的漏电极上以驱动子象素10b。液晶电容Clcb的另一个电极连接到反电极上，而存储电容Ccsb的另一个电极连接到存储电容线24b上。TFT16a和TFT16b的栅电极连接到扫描线12上，源电极连接到信号线14上。An electrode of one of the liquid crystal capacitor Clca and the storage capacitor Ccsa of the sub-pixel 10a is connected to the drain electrode of the TFT 16a to drive the sub-pixel 10a. The other electrode of the liquid crystal capacitor Clca is connected to the counter electrode, and the other electrode of the storage capacitor Ccsa is connected to the storage capacitor line 24a. An electrode of one of the liquid crystal capacitor Clcb and the storage capacitor Ccsb of the sub-pixel 10b is connected to the drain electrode of the TFT 16b to drive the sub-pixel 10b. The other electrode of the liquid crystal capacitor Clcb is connected to the counter electrode, and the other electrode of the storage capacitor Ccsb is connected to the storage capacitor line 24b. Gate electrodes of TFT 16 a and TFT 16 b are connected to scanning line 12 , and source electrodes are connected to signal line 14 .

图14表示用于驱动液晶显示器200的电压应用计时图。FIG. 14 shows a voltage application timing chart for driving the liquid crystal display 200 .

在图14中，波形(a)是信号线14的电压波形Vs，波形(b)是存储电容线24a的电压波形Vcsa，波形(c)是存储电容线24b的电压波形Vcsb，波形(d)是扫描线12的电压波形Vg，波形(e)是子象素10a的子象素电极18a的电压波形V1ca，波形(f)是子象素10b的子象素电极18b的电压波形V1cb。图中的虚线表示反电极17的电压波形COMMON(Vcom)。In Fig. 14, waveform (a) is the voltage waveform Vs of signal line 14, waveform (b) is the voltage waveform Vcsa of storage capacitance line 24a, waveform (c) is the voltage waveform Vcsb of storage capacitance line 24b, waveform (d) is the voltage waveform Vg of the scanning line 12, the waveform (e) is the voltage waveform V1ca of the sub-pixel electrode 18a of the sub-pixel 10a, and the waveform (f) is the voltage waveform V1cb of the sub-pixel electrode 18b of the sub-pixel 10b. The dotted line in the figure indicates the voltage waveform COMMON (Vcom) of the counter electrode 17 .

将参照图4描述图3中的等效电路的工作。The operation of the equivalent circuit in FIG. 3 will be described with reference to FIG. 4 .

在T1时刻，当电压Vg从VgL变到VgH时，TFT16a和TFT16b同时导通，并且电压Vs从信号线14传输到子象素10a和10b的子象素电极18a和18b，导致子象素10a和10b改变。类似的，各个子象素的存储电容Csa和Csb从信号线充电。At T1 time, when the voltage Vg changes from VgL to VgH, TFT16a and TFT16b are turned on simultaneously, and the voltage Vs is transmitted from the signal line 14 to the sub-pixel electrodes 18a and 18b of the sub-pixels 10a and 10b, resulting in the sub-pixel 10a and 10b change. Similarly, the storage capacitors Csa and Csb of the respective sub-pixels are charged from the signal line.

在时刻T2，当扫描线12的电压Vg从VgH变为VgL时，TFT 16a和TFT16b同时截止。因此，子象素10a和10b以及存储电容Csa和Csb都与信号线14截止。由于TFT 16a和TFT 16b的寄生电容造成的牵引效应，之后，各个子象素的电压V1ca和V1ca即下降近似相同的电压Vd，成为：At time T2, when the voltage Vg of the scanning line 12 changes from VgH to VgL, the TFT 16a and the TFT 16b are simultaneously turned off. Therefore, both the sub-pixels 10a and 10b and the storage capacitors Csa and Csb are cut off from the signal line 14 . Due to the pulling effect caused by the parasitic capacitance of TFT 16a and TFT 16b, the voltages V1ca and V1ca of each sub-pixel drop by approximately the same voltage Vd afterward, becoming:

V1ca＝Vs-VdV1ca=Vs-Vd

V1cb＝Vs-VdV1cb=Vs-Vd

此时，各条存储电容线的电压Vcsa和Vcsb为：At this time, the voltages Vcsa and Vcsb of each storage capacitor line are:

Vcsa＝Vcom-VadVcsa=Vcom-Vad

Vcsb＝Vcom+VadVcsb=Vcom+Vad

在时刻T3，连接到存储电容Csa上的存储电容线24a的电压Vcsa从“Vcom-Vad”变为“Vcom+Vad”，连接到存储电容Csb上的存储电容线24b的电压Vcsb从“Vcom+Vad”改变两倍的Vad至“Vcom-Vad”。存储电容线24a和24b电压改变的结果是，各个子象素的电压V1ca和V1cb变为：At time T3, the voltage Vcsa of the storage capacitor line 24a connected to the storage capacitor Csa changes from "Vcom-Vad" to "Vcom+Vad", and the voltage Vcsb of the storage capacitor line 24b connected to the storage capacitor Csb changes from "Vcom+Vad" to "Vcom+Vad". Vad" changes twice the Vad to "Vcom-Vad". As a result of the voltage change of the storage capacitor lines 24a and 24b, the voltages V1ca and V1cb of the respective sub-pixels become:

V1ca＝Vs-Vd+2*Kc*VadV1ca＝Vs-Vd+2*Kc*Vad

V1cb＝Vs-Vd-2*Kc*VadV1cb=Vs-Vd-2*Kc*Vad

此处，Kc＝CCS/(CLC(V)+CCS))Here, Kc=CCS/(CLC(V)+CCS))

在时刻T4，Vcsa从“Vcom+Vad”变为“Vcom-Vad”，Vcsb从“Vcom-Vad”改变两倍的Vad成为“Vcom+Vad”。因此，V1ca和V1cb从：At time T4, Vcsa changes from "Vcom+Vad" to "Vcom-Vad", and Vcsb changes from "Vcom-Vad" by twice Vad to "Vcom+Vad". Therefore, V1ca and V1cb from:

V1ca＝Vs-Vd+2*Kc*VadV1ca＝Vs-Vd+2*Kc*Vad

V1cb＝Vs-Vd-2*Kc*VadV1cb=Vs-Vd-2*Kc*Vad

变为：becomes:

V1ca＝Vs-VdV1ca=Vs-Vd

V1cb＝Vs-VdV1cb=Vs-Vd

在时刻T5，Vcsa从“Vcom-Vad”改变两倍的Vad，成为“Vcom+Vad”，Vcsb从“Vcom+Vad”改变两倍的Vad成为“Vcom-Vad”。因此，V1ca和V1cb从：At time T5, Vcsa changes from "Vcom-Vad" by twice Vad to "Vcom+Vad", and Vcsb changes from "Vcom+Vad" by twice Vad to "Vcom-Vad". Therefore, V1ca and V1cb from:

V1ca＝Vs-VdV1ca=Vs-Vd

V1cb＝Vs-VdV1cb=Vs-Vd

变为：becomes:

V1ca＝Vs-Vd+2*Kc*VadV1ca＝Vs-Vd+2*Kc*Vad

V1cb＝Vs-Vd-2*Kc*VadV1cb=Vs-Vd-2*Kc*Vad

Vcsa、Vcsb、V1ca和V1cb在T4和T5时刻以水平写入时间1H的整数倍的间隔更换上述变化。用于更换间隔的整数1、2或3、…可以考虑到液晶显示器的驱动法(极性反转的方法等)和显示条件(闪烁、粒度等)之后按照需要设置。这些更换周期一直重复到象素10被重写到下一时刻，即，直到等于T1的时刻。因此，子象素的电压V1ca和V1cb的有效值为Vcsa, Vcsb, V1ca, and V1cb are changed at intervals of integral multiples of the horizontal writing time 1H at time T4 and T5. The integer 1, 2, or 3, . These replacement cycles are repeated until the pixel 10 is overwritten to the next instant, ie until an instant equal to T1. Therefore, the effective values of the sub-pixel voltages V1ca and V1cb are

V1ca＝Vs-Vd+Kc*VadV1ca=Vs-Vd+Kc*Vad

V1cb＝Vs-Vd-Kc*VadV1cb=Vs-Vd-Kc*Vad

因而，施加到子象素10a和10b的液晶层13a和13b的方均根电压V1和V2为：Thus, the RMS voltages V1 and V2 applied to the liquid crystal layers 13a and 13b of the sub-pixels 10a and 10b are:

V1＝V1ca-VcomV1=V1ca-Vcom

V2＝V1cb-VcomV2=V1cb-Vcom

结果，result,

V1＝Vs-Vd+Kc*Vad-VcomV1＝Vs-Vd+Kc*Vad-Vcom

V2＝Vs-Vd-Kc*Vad-VcomV2=Vs-Vd-Kc*Vad-Vcom

因此，施加到子象素10a和10b的液晶层13a和13b的方均根电压之差ΔV12(＝V1-V2)为ΔV12＝2*Kc*Vad(此处，Kc＝CCS/(CLC(V)+CCS))。这意味着可以施加互不相同的电压。Therefore, the difference ΔV12 (=V1-V2) of the RMS voltage applied to the liquid crystal layers 13a and 13b of the sub-pixels 10a and 10b is ΔV12=2*Kc*Vad (here, Kc=CCS/(CLC(V)+ CCS)). This means that mutually different voltages can be applied.

根据图12至14所示实施例的V1和V2之间的关系示于图15。The relationship between V1 and V2 according to the embodiment shown in FIGS. 12 to 14 is shown in FIG. 15 .

从图15中可以看出，在根据本实施例的液晶显示器200中，V1值越小，ΔV12值就越大。这与上述电压状态C下获得的结果类似。ΔV12值依据V1或V2改变的事实归因于液晶电容的电容值CLC(V)。It can be seen from FIG. 15 that in the liquid crystal display 200 according to the present embodiment, the smaller the value of V1 is, the larger the value of ΔV12 is. This is similar to the results obtained for voltage state C above. The fact that the value of ΔV12 changes depending on V1 or V2 is attributed to the capacitance value CLC(V) of the liquid crystal capacitor.

根据本实施例的液晶显示器200的γ特性示于图16。为了便于比较，在对子象素10a和10b施加相同电压时获得的γ特性也示于图16。从图中可以看出，根据本实施例的液晶显示器中γ特性也得到改善。The gamma characteristic of the liquid crystal display 200 according to this embodiment is shown in FIG. 16 . For ease of comparison, the gamma characteristics obtained when the same voltage is applied to the sub-pixels 10a and 10b are also shown in FIG. 16 . As can be seen from the figure, the gamma characteristic is also improved in the liquid crystal display according to this embodiment.

如上所述，本发明的实施例可以改善常黑液晶显示器、尤其是MVA液晶显示器的γ特性。但是，本发明不限于此，也可以应用到IPS液晶显示器中。As described above, the embodiments of the present invention can improve the gamma characteristics of a normally black liquid crystal display, especially an MVA liquid crystal display. However, the present invention is not limited thereto, and can also be applied to IPS liquid crystal displays.

接下来，对根据本发明第二方面实施例的液晶显示器进行描述。Next, a liquid crystal display according to an embodiment of the second aspect of the present invention will be described.

下面对可以减少液晶显示器上“闪烁”的驱动方法或象素分布(子象素阵列)的优选形式给予描述，在象素分布中，每个象素至少有两个显示中间灰度时亮度彼此不同的子象素。虽然此处以本实施例的液晶显示器的结构和操作作为具有根据本发明第一方面实施例的划分象素结构的液晶显示器实例进行描述，但象素分布产生的效果不受象素划分的限制，并且也可以采用具有另一种象素划分结构的液晶显示器。A description is given below of a preferred form of driving method or pixel distribution (sub-pixel array) that can reduce "flicker" on a liquid crystal display, in which each pixel has at least two luminances when displaying intermediate gray levels different sub-pixels from each other. Although the structure and operation of the liquid crystal display of this embodiment are described here as an example of a liquid crystal display with a divided pixel structure according to the embodiment of the first aspect of the present invention, the effect produced by the pixel distribution is not limited by the division of pixels, And a liquid crystal display having another pixel division structure can also be used.

首先描述液晶显示器上的“闪烁”问题。First describe the "flicker" problem on LCD monitors.

从可靠性出发，典型的液晶显示器设计成使用交变电压作为施加到象素液晶层的电压(有时也称作“ac驱动法”)。象素电极和反电极之间的电势的大小关系以一定的时间间隔反转，并且因此施加到每个液晶层的电场方向(电力线)也以该时间间隔反转。对于反电极和象素电极安置在不同基底上的典型液晶显示器，施加到每个液晶层的电场方向从光源-观察者的方向反转为观察者-光源的方向。For reliability reasons, typical liquid crystal displays are designed to use an alternating voltage as the voltage applied to the liquid crystal layer of the pixels (sometimes referred to as "ac driving method"). The magnitude relationship of the potential between the pixel electrode and the counter electrode is reversed at certain time intervals, and thus the direction of the electric field (line of electric force) applied to each liquid crystal layer is also reversed at this time interval. For a typical liquid crystal display in which the counter electrode and the pixel electrode are disposed on different substrates, the direction of the electric field applied to each liquid crystal layer is reversed from the light source-observer direction to the observer-light source direction.

典型的情况是，施加到每个液晶层的电场方向反转周期是幀周期(如16.667ms)的两倍(如，33.333ms)。换言之，在液晶显示器中，施加到每个液晶层的电场方向在每次显示图象(帧图象)改变时反转。因而，当显示静态图象时，如果在交变方向的电场强度(施加的电压)不精确地匹配，即如果电场强度在每次电场方向改变时改变，则象素的亮度随电场强度的改变而改变，从而导致显示闪烁。Typically, the reversal period of the direction of the electric field applied to each liquid crystal layer is twice (eg, 33.333ms) the frame period (eg, 16.667ms). In other words, in a liquid crystal display, the direction of the electric field applied to each liquid crystal layer is reversed every time a displayed image (frame image) is changed. Thus, when displaying a static image, if the electric field strength (applied voltage) in alternating directions does not match exactly, that is, if the electric field strength changes every time the electric field direction changes, the brightness of the pixel varies with the electric field strength changes, causing the display to flicker.

为了防止闪烁，需要在交变方向上精确地使电场强度(施加的电压)相等。但是，对于工业生产的液晶显示器，很难使电场强度在交变方向上相等。因此，要减少闪烁，把电场方向相反的象素挨着放置，由此在空间上平均象素的亮度。一般地，此方法被称作“点反转”或“行反转”。可以有各种“反转驱动”法，包括逐个(逐行，逐列极性反转：1-点反转)象素上棋盘格式图案的反转、逐行反转(逐行反转：1-行反转)和每两行和每列的极性反转。根据需要选择其中一种。In order to prevent flicker, it is necessary to precisely equalize the electric field strength (applied voltage) in alternating directions. However, for industrially produced liquid crystal displays, it is difficult to make the electric field strength equal in alternating directions. Therefore, to reduce flicker, pixels with opposite electric field directions are placed next to each other, thereby spatially averaging the brightness of the pixels. Generally, this method is called "dot inversion" or "line inversion". Various "inversion drive" methods are possible, including inversion of a checkerboard pattern on pixels one by one (row-by-row, column-by-column polarity inversion: 1-dot inversion), row-by-row inversion (row-by-row inversion: 1-row inversion) and polarity inversion every second row and every column. Choose one of them according to your needs.

如上所述，要实现高质量的显示，优选满足下列三个条件：(1)采用ac驱动，使得以特定的时间间隔如每个幀周期反转施加给每个液晶层的电场方向，(2)使交变电场方向上施加给每个液晶层的电压(或储存在液晶电容中的电荷量)与储存在存储电容中的电荷量相等，和(3)在每个垂直扫描周期(如幀周期)中将象素挨着设置成与施加到液晶层的电场方向(有时称作“电压极性”)彼此相反。顺便说一下，“垂直扫描周期”可以定义为选取扫描行后直到再选取该扫描行的周期。一个扫描周期等于非交错驱动情况下的一幀周期并对应于交错驱动情况下的一个场周期。另外，在每个垂直扫描周期中，选取一个扫描行的时刻和再选取该扫描行的时刻之差(周期)被称作水平扫描周期(1H)。As mentioned above, in order to achieve high-quality display, the following three conditions are preferably satisfied: (1) AC driving is adopted, so that the direction of the electric field applied to each liquid crystal layer is reversed at specific time intervals such as each frame period, (2) ) to make the voltage applied to each liquid crystal layer in the direction of the alternating electric field (or the amount of charge stored in the liquid crystal capacitor) equal to the amount of charge stored in the storage capacitor, and (3) in each vertical scanning period (such as frame Period) the pixels are arranged next to each other so that the direction of the electric field (sometimes referred to as "voltage polarity") applied to the liquid crystal layer is opposite to each other. By the way, the "vertical scanning period" can be defined as the period after a scanning line is selected until the scanning line is selected again. One scanning period is equal to one frame period in the case of non-interlaced driving and corresponds to one field period in the case of interlaced driving. In addition, in each vertical scanning period, the difference (period) between the timing at which one scanning line is selected and the timing at which the scanning line is selected again is called a horizontal scanning period (1H).

本发明上述实施例通过把每个象素划分为至少两个子象素并使彼此的亮度(透射率)不同而实现良好视角特性的显示。本发明人发现，当每个象素被分成大量亮度不同的子象素时，优选除了上述三个条件外还满足关于子象素分布的第四个条件。具体地说，优选亮度不同的子象素以任何亮度的顺序随机地放置。就显示质量而言，最优选不把亮度相同的子象素放置成在行或列方向上相邻。换言之，最优选亮度相同的子象素以棋盘格的图案分布。The above-described embodiments of the present invention realize a display with good viewing angle characteristics by dividing each pixel into at least two sub-pixels and making the luminance (transmittance) different from each other. The present inventors have found that when each pixel is divided into a large number of sub-pixels having different luminances, it is preferable to satisfy the fourth condition regarding sub-pixel distribution in addition to the above-mentioned three conditions. In particular, sub-pixels of different brightness are preferably placed randomly in any order of brightness. In terms of display quality, it is most preferable not to place sub-pixels with the same brightness adjacent to each other in the row or column direction. In other words, it is most preferable that sub-pixels with the same brightness are distributed in a checkerboard pattern.

下面将描述适合于本发明上述实施例的驱动法、象素分布和子象素分布。下面将参考图17和18描述用于根据本发明实施例的液晶显示器的驱动方法实例。The driving method, pixel distribution and sub-pixel distribution suitable for the above-described embodiments of the present invention will be described below. An example of a driving method for a liquid crystal display according to an embodiment of the present invention will be described below with reference to FIGS. 17 and 18 .

下面的描述中引证这样的例子，象素以多行(1～rp)和多列(1～cq)的矩阵形式(rp，cq)分布，每个象素表示成P(p，q)(此处1≤p≤rp以及1 ≤q≤cq)，并且至少有两个子象素SPa(p，q)和SPb(p，q)，如图17所示。图17是表示一种相对分布(8行×6列)的示意图：本实施例的液晶显示器中的信号线S-C1、S-C2、，S-C3、，S-C4、，…S-Ccq；扫描线G-L1、G-L2、G-L3、…、G-Lrp；存储电容线CS-A和CS-B；象素P(p，q)；和组成象素的子象素SPa(p，q)和SPb(p，q)。Citing such an example in the following description, the pixels are distributed in the matrix form (rp, cq) of multiple rows (1~rp) and columns (1~cq), and each pixel is expressed as P(p, q)( Here 1≤p≤rp and 1≤q≤cq), and there are at least two sub-pixels SPa(p, q) and SPb(p, q), as shown in FIG. 17 . Fig. 17 is a schematic diagram showing a relative distribution (8 rows × 6 columns): the signal lines S-C1, S-C2, , S-C3, , S-C4, ... S- in the liquid crystal display of this embodiment Ccq; scanning lines G-L1, G-L2, G-L3, ..., G-Lrp; storage capacitance lines CS-A and CS-B; pixels P(p, q); and sub-pixels constituting a pixel SPa(p,q) and SPb(p,q).

如图17所示，一个象素P(p，q)具有在扫描线G-Lp任一侧上的近似以象素为中心水平展布的子象素SPa(p，q)和SPb(p，q)。子象素SPa(p，q)和SPb(p，q)分布在每个象素的列方向上。子象素SPa(p，q)和SPb(p，q)的存储电容电极(未示出)分别连接到相邻的存储电容线CS-A和CS-B上。根据显示的图象向象素P(p，q)供给信号电压的信号线S-Ccq在象素之间垂直分布，以向信号线右侧上的子象素的TFT元件(未示出)供给信号电压。根据图17所示的结构，一个存储电容线或一个扫描线由两个子象素共享。这是增加象素开口率的益处。As shown in FIG. 17, a pixel P(p, q) has sub-pixels SPa(p, q) and SPb(p , q). The sub-pixels SPa(p, q) and SPb(p, q) are distributed in the column direction of each pixel. The storage capacitor electrodes (not shown) of the sub-pixels SPa(p, q) and SPb(p, q) are connected to adjacent storage capacitor lines CS-A and CS-B, respectively. A signal line S-Ccq that supplies a signal voltage to a pixel P(p, q) according to a displayed image is vertically distributed between the pixels to supply a TFT element (not shown) of a sub-pixel on the right side of the signal line. supply signal voltage. According to the structure shown in FIG. 17, one storage capacitor line or one scanning line is shared by two sub-pixels. This is the benefit of increasing the pixel aperture ratio.

图18表示用于驱动具有图17所示结构的液晶显示器的各种电压(信号)的波形图。通过用具有图18所示电压波形(a)-(j)的电压驱动具有图17所示结构的液晶显示器，可以满足上述四个条件。FIG. 18 shows waveforms of various voltages (signals) for driving the liquid crystal display having the structure shown in FIG. 17. Referring to FIG. By driving the liquid crystal display having the structure shown in FIG. 17 with voltages having the voltage waveforms (a)-(j) shown in FIG. 18, the above four conditions can be satisfied.

接下来，将描述根据本实施例的液晶显示器如何满足上述四个条件。为了解释简单，假设所有的象素都以中等灰度显示。Next, how the liquid crystal display according to the present embodiment satisfies the above four conditions will be described. For simplicity of explanation, assume that all pixels are displayed in medium gray.

在图18中，波形(a)是供给信号线S-C1、S-C3、，S-C5，…(奇数信号线组有时也被称作S-O)的显示信号电压波形(源信号电压波形)；波形(b)是供给信号线S-C2、，S-C4、，S-C6，…(奇数信号线组有时也被称作S-E)的显示信号电压波形；波形(c)是供给存储电容线CS-A的存储电容反电压波形；波形(d)是供给CS-B的存储电容反电压波形；波形(e)是供给扫描线G-L1的扫描电压波形；波形(f)是供给扫描线G-L2的扫描电压波形；波形(g)是供给扫描线G-L3的扫描电压波形；波形(h)是供给扫描线G-L4的扫描电压波形；波形(i)是供给扫描线G-L5的扫描电压波形；波形(j)是供给扫描线G-L6的扫描电压波形。扫描线电压从低水平(VgL)变为高水平(VgH)的时间与下一个扫描线电压从VgL变为VgH的时间之间的周期构成一个水平扫描周期(1H)。扫描线的电压保持在高水平(VgH)的周期有时称作选取周期PS。In FIG. 18, the waveform (a) is the display signal voltage waveform (source signal voltage waveform) of the supply signal lines S-C1, S-C3, S-C5, ... (the odd-numbered signal line group is also sometimes referred to as S-O). ;Waveform (b) is the display signal voltage waveform of the supply signal line S-C2,, S-C4,, S-C6, ... (odd signal line group is sometimes called S-E); waveform (c) is the supply storage capacitor The storage capacitor reverse voltage waveform of line CS-A; waveform (d) is the storage capacitor reverse voltage waveform supplied to CS-B; waveform (e) is the scanning voltage waveform supplied to scan line G-L1; waveform (f) is the supply scan voltage waveform The scanning voltage waveform of the line G-L2; the waveform (g) is the scanning voltage waveform supplied to the scanning line G-L3; the waveform (h) is the scanning voltage waveform supplied to the scanning line G-L4; the waveform (i) is the scanning voltage waveform supplied to the scanning line G - The scanning voltage waveform of L5; waveform (j) is the scanning voltage waveform supplied to the scanning line G-L6. The period between the time when the scanning line voltage changes from low level (VgL) to high level (VgH) and the time when the next scanning line voltage changes from VgL to VgH constitutes one horizontal scanning period (1H). The period during which the voltage of the scan line is kept at a high level (VgH) is sometimes referred to as a selection period PS.

因为所有象素以中等灰度显示，所以所有的显示信号电压(图18中的波形(a)和(b))具有固定振幅的振荡波形。另外，显示信号电压的振荡周期是两个水平扫描周期(2H)。显示信号电压为振荡波形以及信号线S-O(S-C1、S-C3，…)和信号线S-E(S-C2、S-C4，…)的电压波形有180°像差的原因是要满足上述第三条件。通常在TFT驱动中，经TFT元件传输到象素电极的信号线电压受扫描电压波形的变化影响(有时称作牵引现象)。考虑到牵引现象，信号线电压波形传递到象素电极之后，反电压近乎位于信号线电压波形的中心。在图18中，象素电极电压波形高于反电压之处，信号电压用“+”号表示，象素电极电压波形低于反电压之处，信号电压用“-”号表示。“+”和“-”号对应于施加到液晶层的电场方向。电场方向在“+”号和“-”号时相反。Since all pixels are displayed in middle gray scale, all display signal voltages (waveforms (a) and (b) in Fig. 18) have oscillation waveforms of fixed amplitude. In addition, the oscillation period of the display signal voltage is two horizontal scanning periods (2H). The reason why the displayed signal voltage is an oscillating waveform and the voltage waveforms of signal lines S-O (S-C1, S-C3, ...) and signal lines S-E (S-C2, S-C4, ...) have 180° aberration is to satisfy the above The third condition. Generally, in TFT driving, the signal line voltage transmitted to the pixel electrode through the TFT element is affected by the variation of the scanning voltage waveform (sometimes referred to as a pull-in phenomenon). Considering the pulling phenomenon, after the signal line voltage waveform is transmitted to the pixel electrode, the counter voltage is located almost at the center of the signal line voltage waveform. In FIG. 18, where the pixel electrode voltage waveform is higher than the reverse voltage, the signal voltage is represented by a "+" sign, and where the pixel electrode voltage waveform is lower than the reverse voltage, the signal voltage is represented by a "-" sign. The "+" and "-" signs correspond to the direction of the electric field applied to the liquid crystal layer. The direction of the electric field is opposite at the "+" sign and "-" sign.

如参见图12～15所述，当扫描线的扫描电压为VgH时，连接到扫描线上的TFT导通，致使显示信号电压供给连接于TFT的子象素。然后，当扫描线的扫描电压变为VgL时，存储电容反电压改变。因为存储电容反电压的变化(包括方向和符号的改变)在两个子象素之间不同，因此方均根电压被施加到子象素。As described with reference to FIGS. 12-15, when the scanning voltage of the scanning line is VgH, the TFT connected to the scanning line is turned on, so that the display signal voltage is supplied to the sub-pixels connected to the TFT. Then, when the scan voltage of the scan line changes to VgL, the storage capacitor reverse voltage changes. Because the change in the storage capacitor's reverse voltage (including changes in direction and sign) differs between two sub-pixels, an rms voltage is applied to the sub-pixels.

在图18所示的实例中，存储电容反电压的振荡振幅和周期(波形(c)和(d))在存储电容线CS-A和CS-B之间取相同值；例如，分别是二倍的Vad(见图14)和1H。另外，如果其中一个相移为180°，则CS-A和CS-B的振荡波形将重叠。即，它们的相位差为0.5H。如果对应扫描线的电压从VgH变为VgL之后对应存储电容线的第一电压变化增大，每个子象素的平均电压则高于存在于对应扫描线处于VgH态时的周期中的对应信号线的显示信号电压，但如果对应存储电容线的第一电压变化减小，则低于存在于对应扫描线处于VgH态的周期中的对应信号线的显示信号电压。In the example shown in FIG. 18, the oscillation amplitude and period of the storage capacitor counter voltage (waveforms (c) and (d)) take the same value between the storage capacitor lines CS-A and CS-B; for example, two times Vad (see Figure 14) and 1H. Also, if one of them is shifted by 180°, the oscillation waveforms of CS-A and CS-B will overlap. That is, their phase difference is 0.5H. If the first voltage change of the corresponding storage capacitance line increases after the voltage of the corresponding scanning line changes from VgH to VgL, the average voltage of each sub-pixel is higher than that of the corresponding signal line present in the period when the corresponding scanning line is in the VgH state However, if the first voltage variation of the corresponding storage capacitor line decreases, it is lower than the display signal voltage of the corresponding signal line existing in the period in which the corresponding scan line is in the VgH state.

因此，如果图18中所示的显示信号电压(波形(a)或(b))用“+”号标注，则当存储电容线的电压变化处于比下降状态高时施加到液晶层的方均根电压就较高。另一方面，如果图18中所示的显示信号电压(波形(a)或(b))用“-”号标注，则当存储电容线的电压变化处于比下降状态高时施加到液晶层的方均根电压就较低。Therefore, if the display signal voltage (waveform (a) or (b)) shown in FIG. 18 is marked with "+", the root mean square voltage applied to the liquid crystal layer when the voltage change of the storage capacitor line is higher than the falling state is higher. On the other hand, if the display signal voltage (waveform (a) or (b)) shown in FIG. 18 is marked with "-", the voltage applied to the liquid crystal layer when the voltage change of the storage capacitor line is higher than the falling state The rms voltage is lower.

图17表示垂直扫描周期(在此实例中为幀周期)中象素P(p，q)和子象素SPa(p，q)和SPb(p，q)的状态。下面相对于每个子象素的扫描线对称的三个符号表示子象素的状态。Fig. 17 shows the states of the pixel P(p, q) and the sub-pixels SPa(p, q) and SPb(p, q) during the vertical scanning period (frame period in this example). The three symbols below that are symmetrical with respect to the scanning line of each sub-pixel indicate the state of the sub-pixel.

第一符号H或L表示施加到子象素的方均根电压的大小关系，符号H表示施加的方均根电压很高，符号L表示施加的方均根电压很低。第二符号“+”和“-”表示反电极和子象素电极之间的电压大小关系，换言之，其表示施加到液晶层的电场方向。符号“+”表示子象素电极的电压高于反电极的电压，符号“-”表示子象素电极的电压低于反电极的电压。第三符号A或B表示适当的存储电容线是CS-A或CS-B。The first symbol H or L represents the magnitude relationship of the root mean square voltage applied to the sub-pixel, the symbol H represents the applied root mean square voltage is very high, and the symbol L represents the applied root mean square voltage is very low. The second symbols "+" and "-" indicate the magnitude relationship of the voltage between the counter electrode and the sub-pixel electrode, in other words, they indicate the direction of the electric field applied to the liquid crystal layer. The symbol "+" indicates that the voltage of the sub-pixel electrode is higher than the voltage of the counter electrode, and the symbol "-" indicates that the voltage of the sub-pixel electrode is lower than the voltage of the counter electrode. A third symbol A or B indicates that the appropriate storage capacitor line is CS-A or CS-B.

例如，来看象素P(1，1)的子象素SPa(1，1)和SPb(1，1)的状态。从图18所示的波形(a)～(e)看到，在选择GL-1的周期(扫描电压为VgH的周期PS)中，显示信号电压为“+”。当GL-1的扫描电压从VgH变为VgL时，各个子象素的存储电容线的电压(波形(c)和(d))处于图18所示箭头(从左的第一箭头)表示的状态。因而，在GL-1的扫描电压从VgH变为VgL之后，SPa(1，1)的存储电容反电压的第一电压变化为图18所示的增大(用波形(c)中的“U”表示)。另一方面，GL-1的扫描电压从VgH变为VgL之后，SPa(1，1)的存储电容反电压的第一电压变化为图18所示的减小(用波形(d)中的“D”表示)。因此，SPa(1，1)的方均根电压增大，而SPb(1，1)的方均根电压减小。所以，施加的SPa(1，1)的方均根电压高于SPb(1，1)的方均根电压，并且符号H贴到SPa(1，1)，符号L贴到SPb(1，1)。For example, look at the states of subpixels SPa(1,1) and SPb(1,1) of pixel P(1,1). As can be seen from the waveforms (a) to (e) shown in FIG. 18, the display signal voltage is "+" in the period in which GL-1 is selected (period PS in which the scanning voltage is VgH). When the scanning voltage of GL-1 changes from VgH to VgL, the voltages (waveforms (c) and (d)) of the storage capacitor lines of each sub-pixel are at the arrow (the first arrow from the left) shown in Figure 18 state. Therefore, after the scanning voltage of GL-1 changes from VgH to VgL, the first voltage change of the storage capacitor counter voltage of SPa(1, 1) is the increase shown in FIG. "express). On the other hand, after the scanning voltage of GL-1 changes from VgH to VgL, the first voltage change of the storage capacitor counter voltage of SPa(1, 1) decreases as shown in Fig. 18 (indicated by " D" means). Therefore, the root-mean-square voltage of SPa(1,1) increases, while the root-mean-square voltage of SPb(1,1) decreases. Therefore, the applied RMS voltage of SPa(1,1) is higher than the RMS voltage of SPb(1,1), and the symbol H is attached to SPa(1,1) and the symbol L is attached to SPb(1,1).

根据图18所示的波形(b)，在选择GL-1的周期中，用于P(1，1)的SPa(1，1)和SPb(1，1)的显示信号电压为“-”。当GL-1的扫描电压从VgH变为VgL时，各个子象素的存储电容线的电压(波形(c)和(d))处于图18中箭头(左边的第一箭头)所示的状态。因而，在GL-1的扫描电压从VgH变为VgL之后，SPa(1，2)的存储电容反电压的第一电压变化增大(“U”)，如图18所示。另一方面，GL-1的扫描电压从VgH变为VgL之后，SPb(1，2)的存储电容反电压的第一电压变化减小(“D”)，如图18所示。因此，SPa(1，2)的方均根电压减小而SPb(1，2)的方均根电压增加。所以，施加的SPa(1，2)的方均根电压高于SPb(1，2)的方均根电压，并且符号L贴到SPa(1，2)，符号H贴到SPb(1，2)。According to the waveform (b) shown in Fig. 18, in the cycle of selecting GL-1, the displayed signal voltages of SPa(1,1) and SPb(1,1) for P(1,1) are "-" . When the scanning voltage of GL-1 changes from VgH to VgL, the voltages (waveforms (c) and (d)) of the storage capacitor lines of each sub-pixel are in the state shown by the arrow (the first arrow on the left) in Figure 18 . Thus, after the scanning voltage of GL-1 changes from VgH to VgL, the first voltage change of the storage capacitor counter voltage of SPa(1,2) increases (“U”), as shown in FIG. 18 . On the other hand, after the scanning voltage of GL-1 is changed from VgH to VgL, the first voltage change of the storage capacitor counter voltage of SPb(1,2) decreases (“D”), as shown in FIG. 18 . Therefore, the root mean square voltage of SPa(1,2) decreases and the root mean square voltage of SPb(1,2) increases. Therefore, the applied RMS voltage of SPa(1,2) is higher than the RMS voltage of SPb(1,2), and the symbol L is attached to SPa(1,2), and the symbol H is attached to SPb(1,2).

根据图18所示的波形(a)，在选择GL-2的周期中，用于P(2，1)的S批a(2，1)和S批b(2，1)的显示信号电压为“-”。当GL-2的扫描电压从VgH变为VgL时，各个子象素的存储电容线的电压(波形(c)和(d))处于图18中箭头(左边的第二箭头)所示的状态。因而，在GL-2的扫描电压从VgH变为VgL之后，SPa(2，1)的存储电容反电压的第一电压变化减小(“D”)  ，如图18D所示。另一方面，GL-2的扫描电压从VgH变为VgL之后，SPb(2，1)的存储电容反电压的第一电压变化增大(“D”)，如图18C所示。因此，SPa(2，1)的方均根电压增大而SPb(2，1)的方均根电压减小。所以，施加的SPa(2，1)的方均根电压高于SPb(2，1)的方均根电压，并且符号H贴到SPa(2，1)，符号L贴到SPb(2，1)。图17所示的状态以这种方式出现。According to the waveform (a) shown in Figure 18, in the cycle of selecting GL-2, the display signal voltages of S batch a (2, 1) and S batch b (2, 1) for P (2, 1) for"-". When the scanning voltage of GL-2 changes from VgH to VgL, the voltages (waveforms (c) and (d)) of the storage capacitor lines of each sub-pixel are in the state shown by the arrow (the second arrow on the left) in Figure 18 . Thus, after the scanning voltage of GL-2 changes from VgH to VgL, the first voltage change of the storage capacitor counter voltage of SPa(2,1) decreases (“D”), as shown in FIG. 18D . On the other hand, after the scanning voltage of GL-2 is changed from VgH to VgL, the first voltage change of the storage capacitor counter voltage of SPb(2,1) increases (“D”), as shown in FIG. 18C . Therefore, the root mean square voltage of SPa(2,1) increases and the root mean square voltage of SPb(2,1) decreases. Therefore, the applied RMS voltage of SPa(2,1) is higher than the RMS voltage of SPb(2,1), and the symbol H is attached to SPa(2,1) and the symbol L is attached to SPb(2,1). The state shown in Fig. 17 occurs in this way.

根据本实施例的液晶显示器可以以这种满足第一条件的方式驱动。The liquid crystal display according to the present embodiment can be driven in such a manner that the first condition is satisfied.

因为图17和18表示幀周期中的状态，所以不可能从图中评估第一条件是否满足。但是，通过逐幀移动每条信号线(S-O(图18A)或S-E(图18B))上电压波形的相位180°，可以执行ac驱动，其中施加到每个液晶层的电场方向每个幀周期反转。Since FIGS. 17 and 18 represent states in a frame period, it is impossible to evaluate from the graphs whether the first condition is satisfied. However, ac driving can be performed by shifting the phase of the voltage waveform on each signal line (S-O (Fig. 18A) or S-E (Fig. 18B)) by 180° frame by frame, in which the direction of the electric field applied to each liquid crystal layer is every frame period reverse.

另外，在根据本实施例的液晶显示器中，为了防止象素的子象素的幅值关系即显示屏中子象素的亮度次序(图17中的相对位置“H”和“L”)逐幀变化，存储电容线CS-A和CS-B上电压波形的相位在信号线上的电压波形改变时改变180°。因此，适于图17中的符号“+”和“-”在下一幀中反转(例如(+，H)(-，H)，和(+，L)  (-，L))。上述第一条件可以以此方式满足。In addition, in the liquid crystal display according to the present embodiment, in order to prevent the magnitude relationship of the sub-pixels of the pixel, that is, the brightness order of the sub-pixels in the display screen (relative positions "H" and "L" in FIG. 17) As the frame changes, the phases of the voltage waveforms on the storage capacitor lines CS-A and CS-B change by 180° when the voltage waveforms on the signal lines change. Therefore, the symbols "+" and "-" that fit in Figure 17 are reversed in the next frame (eg (+,H)(-,H), and (+,L)(-,L)). The above-mentioned first condition can be satisfied in this way.

下面我们将检查是否满足第二条件，即每个子象素的液晶层(子象素的存储电容)在不同的场方向充电到相同水平。在根据本实施例的液晶显示器中，不同的方均根电压施加到每个象素中的子象素的液晶层，显示质量例如闪烁受亮度很高的子象素、即图17中符号“H”表示的子象素的决定性影响。因而，第二条件尤其影响符号“H”表示的子象素。Next we will check whether the second condition is fulfilled, ie the liquid crystal layer (storage capacitance of the sub-pixel) of each sub-pixel is charged to the same level in different field directions. In the liquid crystal display according to the present embodiment, different root-mean-square voltages are applied to the liquid crystal layer of the sub-pixels in each pixel, and the display quality such as flicker is affected by the sub-pixels with very high brightness, that is, the symbol "H" in FIG. 17 Deterministic influence of sub-pixels represented. Thus, the second condition especially affects the sub-pixel indicated by the symbol "H".

下面将参考图18所示的电压波形描述第二条件。The second condition will be described below with reference to the voltage waveform shown in FIG. 18 .

在对应扫描线的电压为VgH的周期(选择周期PS)中对子象素的液晶电容和存储电容充电。储存在液晶电容中的电荷量依赖于选择周期中信号线的显示信号电压和反电压(图18中未示出)之间的电压差，而储存在存储电容上的电荷量依赖于选择周期中信号线的显示信号电压与存储电容线的电压(存储电容反电压)之间的电压差。In the period corresponding to the voltage of the scanning line being VgH (selection period PS), the liquid crystal capacitance and the storage capacitance of the sub-pixel are charged. The amount of charge stored in the liquid crystal capacitor depends on the voltage difference between the display signal voltage of the signal line and the reverse voltage (not shown in Figure 18) during the selection period, while the amount of charge stored on the storage capacitor depends on the The voltage difference between the display signal voltage of the signal line and the voltage of the storage capacitor line (reverse voltage of the storage capacitor).

如图18所示，每个选择周期中的显示信号电压可以是图中“+”或“-”号表示的两类中的一种。在任一种情况下，每个选择周期中电压没有变化。无论反电压(未示出)怎样，对所有的子象素都施加不随时间改变的相同DC电压。As shown in FIG. 18, the display signal voltage in each selection period can be one of the two types indicated by "+" or "-" in the figure. In either case, there is no change in voltage during each select cycle. Regardless of the counter voltage (not shown), the same DC voltage that does not change over time is applied to all sub-pixels.

有两类存储电容线CS-A和CS-B。CS-A的电压波形在任何扫描线的选择周期中都相同。类似的，CS-B的电压波形在任何扫描线的选择周期中都相同。换言之，存储电容线的电压的DC成分(DC水平)在任何扫描线的选择周期中取相同值。There are two types of storage capacitor lines CS-A and CS-B. The voltage waveform of CS-A is the same in any scan line selection period. Similarly, the voltage waveform of CS-B is the same in any scan line selection period. In other words, the DC component (DC level) of the voltage of the storage capacitor line takes the same value in the selection period of any scanning line.

因而，可以通过调节以下电压的DC成分(DC水平)来满足第二条件：每个扫描线的显示信号电压、反电极的电压、和每个存储电容线的电压。Thus, the second condition can be satisfied by adjusting the DC components (DC levels) of the display signal voltage of each scanning line, the voltage of the counter electrode, and the voltage of each storage capacitor line.

接下来，我们将证实第三条件是否被满足，即场方向相反的象素是否在每帧周期中被放置成挨在一起。在根据本实施例的液晶显示器中，不同的方均根电压施加到每个象素中子象素的液晶层，第三条件应用到被提供相同方均根电压的子象素与象素之间的关系。尤其重要的是，第三条件通过高亮度的子象素、即图1 7中符号“H”表示的子象素得到满足，如同第二条件的情形。Next, we will verify whether the third condition is satisfied, namely whether pixels with opposite field directions are placed next to each other in each frame period. In the liquid crystal display according to the present embodiment, different RMS voltages are applied to the liquid crystal layer of sub-pixels in each pixel, and the third condition is applied to the relationship between sub-pixels and pixels supplied with the same RMS voltage. It is especially important that the third condition is satisfied by the sub-pixel with high brightness, ie the sub-pixel indicated by the symbol "H" in Fig. 17, as in the case of the second condition.

如图17所示，表示每个象素极性(电场方向)的“+”和“-”在行方向(水平方向)每两个象素(两列)转变一次，如(+，-)、(+，-)、(+，-)，在列方向(竖直方向)每两个象素(两行)转变一次，如(+，-)、(+，-)、(+，-)、(+，-)。依逐个象素看，表现出点反转，满足第三条件。As shown in Figure 17, the "+" and "-" representing the polarity of each pixel (electric field direction) change every two pixels (two columns) in the row direction (horizontal direction), such as (+, -) , (+, -), (+, -), change every two pixels (two rows) in the column direction (vertical direction), such as (+, -), (+, -), (+, - ), (+, -). Viewed pixel by pixel, dot inversion is exhibited, satisfying the third condition.

接下来，我们来看高亮度的子象素，即图17中符号“H”表示的子象素。Next, let's look at the high-brightness sub-pixel, that is, the sub-pixel represented by the symbol "H" in FIG. 17 .

参见图17，在图中所示的行方向不存在极性反转，例如在第一行上关于子象素SPa的+H、+H、+H，但在图中所示的列方向每两个象素(两行)极性转变一次，如第一列中的(+H，-H)、(+H，-H)、(+H，-H)、(+H，-H)。已知为行反转的状态可以在尤其重要的高亮度子象素的水平处观察到，这意味着它们满足第三条件。由符号L表示的子象素也以规则的图案分布，满足第三条件。Referring to FIG. 17, there is no polarity inversion in the row direction shown in the figure, such as +H, +H, +H for the sub-pixel SPa on the first row, but in the column direction shown in the figure every The polarity of two pixels (two rows) is changed once, such as (+H, -H), (+H, -H), (+H, -H), (+H, -H) in the first column . A state known as row inversion can be observed at the level of particularly important high-brightness sub-pixels, which means that they fulfill the third condition. The sub-pixels indicated by symbol L are also distributed in a regular pattern, satisfying the third condition.

接下来，我们将讨论第四条件。第四条件需要子象素中亮度相同的子象素不应挨着放置，这使得亮度有所变化。Next, we will discuss the fourth condition. The fourth condition requires that sub-pixels with the same luminance should not be placed next to each other, which causes the luminance to vary.

根据本实施例，亮度变化的子象素、即施加到其液晶层的方均根电压不同的子象素用图17中的符号“H”或“L”表示。According to the present embodiment, sub-pixels whose luminance varies, that is, sub-pixels whose root-mean-square voltages are different applied to the liquid crystal layer, are represented by symbols "H" or "L" in FIG. 17 .

在图17中，如果子象素分成由行方向的两个子象素和列方向的两个子象素组成的四组(如SPa(1，1)、SPb(1，1)、SPa(1，2)和SPb(1，2))，则整个矩阵由子象素组形成，其中H和L在上部行中从左到右分布，L和H分布在下部行中。因而，在图17中，符号“H”和“L”在子象素水平以棋盘格图案分布，满足第四条件。In Fig. 17, if the sub-pixels are divided into four groups (such as SPa(1,1), SPb(1,1), SPa(1, 2) and SPb(1, 2)), the entire matrix is formed by sub-pixel groups, wherein H and L are distributed from left to right in the upper row, and L and H are distributed in the lower row. Thus, in FIG. 17, symbols "H" and "L" are distributed in a checkerboard pattern at the sub-pixel level, satisfying the fourth condition.

来看矩阵，在象素水平，在任意行的象素情况下每个象素中子象素的亮度顺序和列方向上分布的子象素的位置之间的对应性在行方向上周期性(每个象素)地改变，但在任意列的象素的情况下恒定。因而，在任意行的象素P(p，q)中，最亮的子象素(在此实例中用“H”表示的子象素)在q为奇数时是SPa(p，q)，在q为偶数时是SPb(p，q)。反之，q为奇数时最亮的子象素是SPb(p，q)，q为偶数时是SPa(p，q)。另一方面，在任意列的象素P(p，q)中，最亮的子象素在同一列中总是SPa(p，q)或SPb(p，q)，无论p是奇数还是偶数。此处SPa(p，q)或SPb(p，q)的交替意味着无论p是奇数还是偶数，奇数列中最亮的子象素为SPa(p，q)，而无论p为奇数还是偶数，偶数行中最亮的子象素为SPb(p，q)。Looking at the matrix, at the pixel level, in the case of any row of pixels, the correspondence between the brightness order of the sub-pixels in each pixel and the positions of the sub-pixels distributed in the column direction is periodic in the row direction ( per pixel) but is constant in the case of any column of pixels. Thus, in any row of pixels P(p, q), the brightest sub-pixel (sub-pixel denoted by "H" in this example) is SPa(p, q) when q is an odd number, When q is an even number, it is SPb(p, q). Conversely, when q is an odd number, the brightest sub-pixel is SPb(p, q), and when q is an even number, it is SPa(p, q). On the other hand, in any column of pixels P(p,q), the brightest sub-pixel in the same column is always SPa(p,q) or SPb(p,q), no matter if p is odd or even . Here the alternation of SPa(p, q) or SPb(p, q) means that no matter whether p is odd or even, the brightest sub-pixel in the odd column is SPa(p, q), regardless of whether p is odd or even , the brightest sub-pixel in the even row is SPb(p,q).

如上述参考图17和18所示，根据本实施例的液晶显示器满足上述四个条件，并因而可以实现高质量的显示。As shown above with reference to FIGS. 17 and 18, the liquid crystal display according to the present embodiment satisfies the above-mentioned four conditions, and thus can realize high-quality display.

接下来，参考图19和20描述利用对象素和子象素的不同驱动方法的另一实施例的液晶显示器。图19和20对应于图17和18。Next, a liquid crystal display of another embodiment using different driving methods for pixels and sub-pixels will be described with reference to FIGS. 19 and 20. FIG. 19 and 20 correspond to FIGS. 17 and 18 .

如图20所示，在根据本实施例的液晶显示器中，显示信号电压和存储电容反电压每2H振荡一次。因而振荡周期是4H(四个水平写入时间)。奇数信号线S-O(S-C1、S-C3、S-C5...)和偶数信号线S-E(S-C2、S-C4、S-C6...)的信号电压的振荡相位差为180度(以时间来说为2H)。存储电容线CS-A和CS-B的电压振荡相位差也为180度(以时间来说为2H)。另外，信号线的电压振荡比存储电容线CS-A的电压振荡相位滞后45度(1/8周期，即H/2)。顺便说一下，45度的相位差用于防止扫描线的VgH-VgL电压变化和存储电容线的电压变化重叠，并且此处采用的值不是严格要求，也可以根据需要采用其它值。As shown in FIG. 20, in the liquid crystal display according to the present embodiment, the display signal voltage and the storage capacitor counter voltage oscillate every 2H. The oscillation period is thus 4H (four horizontal writing times). The oscillation phase difference of the signal voltages of odd signal lines S-O (S-C1, S-C3, S-C5...) and even signal lines S-E (S-C2, S-C4, S-C6...) is 180 degrees (2H in terms of time). The voltage oscillation phase difference of the storage capacitor lines CS-A and CS-B is also 180 degrees (2H in terms of time). In addition, the phase of the voltage oscillation of the signal line is 45 degrees (1/8 period, ie H/2) behind the phase of the voltage oscillation of the storage capacitor line CS-A. By the way, the phase difference of 45 degrees is used to prevent the VgH-VgL voltage change of the scan line from overlapping with the voltage change of the storage capacitor line, and the value used here is not strictly required, and other values can also be used as required.

对于根据本实施例的液晶显示器，每个象素由两个亮度变化且由“H”或“L”表示的子象素组成。另外，如图19所示，由符号“H”或“L”表示的子象素以棋盘格图案分布，这意味着满足第四条件，与上面的实施例一样。关于第一条件，可以利用与上述图17和18所示实施例中采用一样的反转法满足。With the liquid crystal display according to this embodiment, each pixel is composed of two sub-pixels whose luminance varies and are indicated by "H" or "L". In addition, as shown in FIG. 19, sub-pixels represented by symbols "H" or "L" are distributed in a checkerboard pattern, which means that the fourth condition is satisfied, as in the above embodiment. Regarding the first condition, it can be satisfied by the same inversion method as that employed in the embodiment shown in FIGS. 17 and 18 described above.

但是，图19和20所示的实施例不能满足上述第二条件。However, the embodiment shown in Figs. 19 and 20 cannot satisfy the above-mentioned second condition.

现在来看图19中第一列的第一至第四行所示象素P(1，1)、P(2，1)、P(3，1)和P(4，1)的较亮子象素Pa(1，1)、Pa(2，1)、Pa(3，1)和Pa(4，1)。当Pa(1，1)被充电时，即当选择G-L1时，对应信号线的极性符号为“+”。当Pa(3，1)被充电时，即当选择G-L3时，对应信号线的极性符号为“-”。另外，当Pa(1，1)被充电时，即当选择G-L1时，对应存储电容线CS-A的电压波形在接近选择周期的中心处开始阶梯式下降。当Pa(3，1)被充电时，即当选择G-L3时，对应存储电容线CS-A的电压波形在接近选择周期的中心处开始阶梯式上升。因而，通过精确控制存储电容线CS-B和扫描线的信号电压波形的相位，可以使存储电容反电极在Pa(1，1)被充电以及Pa(3，1)被充电时具有相同的DC水平。通过将DV水平设置到Pa(1，1)被充电时存储电容反电极的电压(等于子象素电极的电压)与Pa(3，1)被充电时存储电容反电极的电压(等于子象素电极的电压)的平均值，可以使储存在Pa(1，1)和Pa(3，1)中的电荷量相等。接下来来看在Pa(2，1)处，在对应的周期中，即在选择G-L2时，对应信号线的极性符号为“-”(与上述Pa(3，1)的情形相同)，对应存储电容线的电压取固定值(不是象上述一样的振荡波形)。因而，通过使对应于Pa(2，1)的存储电容线的电压值与上述的DC水平关于Pa(1，1)及Pa(3，1)相同，可以使储存在Pa(1，1)、Pa(2，1)及Pa(3，1)中的电荷量相同。但是，由于下列原因，不可能使储存在Pa(4，1)中的电荷量与储存在Pa(1，1)、Pa(2，1)及Pa(3，1)中的电荷量相同。Pa(4，1)的信号线的极性符号与Pa(1，1)的相同，无论什么时刻，对应存储电容线的电压取固定值(不是如上所述的振荡波形)。因此，需要使Pa(4，1)的存储电容线的电压值(上述固定值)与DC水平关于Pa(1，1)及Pa(3，1)相同，与Pa(2，1)的情形相同，即等于Pa(4，1)以及对于Pa(2，1)的存储电容线的电压值(上述固定值)。但是，这是不可能的，因为从图19和20中可以看出，对于Pa(2，1)及Pa(4，1)的存储电容线为CS-B，他们有规律的振荡波形，在Pa(2，1)的选择周期中选择振荡波形的最大值，而在Pa(4，1)的选择周期中选择振荡波形的最小值，使得两个电压必然不同。Now look at the brighter sub-pixels of pixels P(1,1), P(2,1), P(3,1) and P(4,1) shown in the first to fourth rows of the first column in FIG. Pixels Pa(1,1), Pa(2,1), Pa(3,1) and Pa(4,1). When Pa(1,1) is charged, that is, when G-L1 is selected, the polarity sign of the corresponding signal line is "+". When Pa(3,1) is charged, that is, when G-L3 is selected, the polarity sign of the corresponding signal line is "-". In addition, when Pa(1,1) is charged, that is, when G-L1 is selected, the voltage waveform corresponding to the storage capacitor line CS-A starts to drop in steps near the center of the selection period. When Pa(3,1) is charged, that is, when G-L3 is selected, the voltage waveform corresponding to the storage capacitor line CS-A starts to rise in steps near the center of the selection period. Therefore, by precisely controlling the phases of the signal voltage waveforms of the storage capacitor line CS-B and the scan line, the storage capacitor counter electrode can be made to have the same DC when Pa(1, 1) is charged and Pa(3, 1) is charged. level. By setting the DV level to the voltage of the counter electrode of the storage capacitor (equal to the voltage of the sub-pixel electrode) when Pa(1, 1) is charged and the voltage of the counter electrode of the storage capacitor (equal to the voltage of the sub-pixel electrode) when Pa(3, 1) is charged The average value of the voltage of the prime electrode) can make the amount of charge stored in Pa(1,1) and Pa(3,1) equal. Next, look at Pa (2, 1), in the corresponding period, that is, when G-L2 is selected, the polarity sign of the corresponding signal line is "-" (same as the above Pa (3, 1) ), the voltage corresponding to the storage capacitor line takes a fixed value (not the same oscillation waveform as above). Thus, by making the voltage value of the storage capacitor line corresponding to Pa(2,1) the same as the above-mentioned DC level with respect to Pa(1,1) and Pa(3,1), it is possible to make the voltage stored at Pa(1,1) , Pa(2,1) and Pa(3,1) have the same charge. However, it is impossible to make the charge amount stored in Pa(4,1) the same as that stored in Pa(1,1), Pa(2,1) and Pa(3,1) for the following reason. The polarity sign of the signal line of Pa(4,1) is the same as that of Pa(1,1), and the voltage corresponding to the storage capacitor line takes a fixed value (not the oscillating waveform as described above) at any time. Therefore, it is necessary to make the voltage value of the storage capacitor line of Pa(4,1) (the above fixed value) and the DC level the same with respect to Pa(1,1) and Pa(3,1), as in the case of Pa(2,1) The same, that is, equal to Pa(4, 1) and the voltage value of the storage capacitor line for Pa(2, 1) (the above fixed value). However, this is impossible, because it can be seen from Figures 19 and 20 that the storage capacitance lines for Pa(2,1) and Pa(4,1) are CS-B, and they have regular oscillation waveforms. The maximum value of the oscillation waveform is selected in the selection period of Pa(2,1), and the minimum value of the oscillation waveform is selected in the selection period of Pa(4,1), so that the two voltages must be different.

另外，就分布相同极性的子象素以使其尽可能地不彼此相邻的第三条件而言，本实施例劣于图17和18所示的上述实施例。In addition, this embodiment is inferior to the above-described embodiments shown in FIGS. 17 and 18 in terms of the third condition of distributing sub-pixels of the same polarity so as not to be adjacent to each other as much as possible.

参见图19，我们来看有较大电压施加到其液晶层的组成象素的子象素、即符号H表示的子象素的极性反转。在图19中，在图中所示的行方向不存在极性反转，如第一行中对于子象素SPa的+H、+H、+H(如同图17)，但在图中所示的列方向每四个象素极性反转，如第一列中的(+H，-H，-H，+H)、(+H，-H，-H，+H)。在参见图17和18所述的实施例中，每两个象素发生一次极性反转，本实施例的极性反转周期为1/2。换言之，在参见图17和18所述的实施例中，极性反转频率是以上参见图19和20所述实施例的两倍。在这一方面，本实施例(参见图19和20所述)劣于参见图17和18所述的实施例。Referring to FIG. 19, we look at the polarity inversion of the sub-pixels constituting the pixel, that is, the sub-pixel indicated by symbol H, which has a larger voltage applied to its liquid crystal layer. In FIG. 19, there is no polarity inversion in the row direction shown in the figure, such as +H, +H, +H for sub-pixel SPa in the first row (as in FIG. 17), but in the figure The polarity of every four pixels in the indicated column direction is reversed, such as (+H, -H, -H, +H), (+H, -H, -H, +H) in the first column. In the embodiment described with reference to FIGS. 17 and 18, the polarity inversion occurs every two pixels, and the polarity inversion period of this embodiment is 1/2. In other words, in the embodiment described with reference to Figures 17 and 18, the frequency of polarity reversal is twice that of the embodiment described above with reference to Figures 19 and 20. In this respect, the present embodiment (described with reference to FIGS. 19 and 20 ) is inferior to the embodiment described with reference to FIGS. 17 and 18 .

显示质量实际上在实施图17所示象素分布的前一实施例的驱动方法与本实施例的驱动方法之间进行比较，并在显示质量中看出差别。具体地说，例如当用固定的视线观察64/255灰度显示时，两种驱动方法看不出有明显的差异，其中这种灰度在用于改变亮度的子象素中产生较大的亮度差异。但是，当通过移动视线观察显示时，在本实施例的驱动方法中看到水平条文(图19)，而前一实施例(图17)的驱动方法没有这些问题。可以相信，所述的差异是由上述极性反转周期的差异所致。因为每个象素中包含的两个子象素的亮度更显著，所以优选使较亮子象素的极性反转周期最小。在上述实例中每个象素被分成两个子象素，但也可以分成三个或更多个子象素，优选以这样方式分布子象素，即，使最亮子象素的极性反转周期最小。不用说，最好其它所有的子象素都与最亮子象素有相同的极性反转周期。The display quality was actually compared between the driving method of the previous embodiment implementing the pixel distribution shown in FIG. 17 and the driving method of the present embodiment, and a difference was seen in the display quality. Specifically, for example, when observing a 64/255 grayscale display with a fixed line of sight, no significant difference can be seen between the two driving methods, wherein this grayscale produces a large difference in the sub-pixel used to change the brightness. difference in brightness. However, when the display is observed by moving the line of sight, horizontal stripes are seen in the driving method of this embodiment (FIG. 19), whereas the driving method of the previous embodiment (FIG. 17) does not have these problems. It is believed that the difference is due to the difference in the polarity reversal period described above. Since the brightness of the two sub-pixels contained in each pixel is more pronounced, it is preferable to minimize the polarity inversion period of the brighter sub-pixels. In the above example each pixel is divided into two sub-pixels, but could also be divided into three or more sub-pixels, preferably distributed in such a way that the polarity of the brightest sub-pixel is reversed periodically minimum. Needless to say, it is preferable that all other sub-pixels have the same polarity inversion period as the brightest sub-pixel.

接下来，参见图21A和21B对下面的实施例进行描述，该实施例中，即使通过移动视线观察到显示，利用较短极性反转周期的上述水平条文也比图17所示的实施例中更不明显。Next, an embodiment will be described with reference to FIGS. 21A and 21B in which the above-mentioned horizontal stripes using a shorter polarity inversion period are faster than the embodiment shown in FIG. 17 even if the display is observed by moving the line of sight. less obvious in .

根据图17所示的实施例，虽然组成象素的较亮子象素(用符号“H”表示的)在(+，-)、(+，-)、(+，-)和(+，-)所示的列方向上反转，但在+，+，+，+，+，+或-，-，-，-，-，-所示的方向不反转。相反，根据图21所示的实施例，较亮子象素的“+”和“-”不仅在(+，-)、(+，-)、(+，-)、(+，-)所示的列方向上反转，而且也在(+，-)、(+，-)所示的行方向上反转。因而，图20所示的实施例采用了比图17所示实施例短的极性反转周期。在此方面，图20所示的实施例更优于图17所示的实施例。According to the embodiment shown in FIG. 17, although the brighter sub-pixels (indicated by the symbol "H") that make up a pixel are at (+, -), (+, -), (+, -) and (+, - ) in the column direction shown, but not in the directions shown in +, +, +, +, +, + or -, -, -, -, -, -. On the contrary, according to the embodiment shown in FIG. 21, the "+" and "-" of the brighter sub-pixels are not only shown in (+, -), (+, -), (+, -), (+, -) Inverted in the column direction, and also inverted in the row direction indicated by (+, -), (+, -). Thus, the embodiment shown in FIG. 20 employs a shorter polarity inversion period than the embodiment shown in FIG. 17 . In this respect, the embodiment shown in FIG. 20 is superior to the embodiment shown in FIG. 17 .

甚至在图21所示的实施例中，在组成象素的子象素中，符号“H”表示的较亮子象素以棋盘格图案分布，满足第四条件。Even in the embodiment shown in FIG. 21, among sub-pixels constituting a pixel, brighter sub-pixels indicated by symbol "H" are distributed in a checkerboard pattern, satisfying the fourth condition.

可以如下实施图21A所示的象素分布。The pixel distribution shown in Fig. 21A can be implemented as follows.

如图21B所示，每行中用于子象素的存储电容反电极每两列交替连接到存储电容线CS-A或CS-B上。这种结构变化可以通过比较图21所示的本实施例与图17或18所示的前述实施例清楚地看出。具体地说，这可以通过查看行方向子象素处选取的存储电容线看出。例如，在子象素SPa(1，1)～SPa(1，6)行中，从符号“A”或“B”表示的存储电容反电极中为SPa(1，1)选“A”，为SPa(1，2)选“B”，为SPa(1，4)和SPa(1，5)选“A”，为SPa(1，6)选“B”，如图21所示，而对图17或18中所示的所有子象素SPa(1，1)～SPa(1，6)选“A”。As shown in FIG. 21B, the storage capacitor counter electrodes for the sub-pixels in each row are alternately connected to the storage capacitor line CS-A or CS-B every two columns. This structural change can be clearly seen by comparing the present embodiment shown in FIG. 21 with the previous embodiment shown in FIG. 17 or 18 . Specifically, this can be seen by looking at the storage capacitor lines selected at the sub-pixels in the row direction. For example, in the rows of sub-pixels SPa (1, 1) to SPa (1, 6), select "A" for SPa (1, 1) from the storage capacitor counter electrodes represented by symbols "A" or "B", Choose "B" for SPa(1,2), choose "A" for SPa(1,4) and SPa(1,5), choose "B" for SPa(1,6), as shown in Figure 21, and "A" is selected for all sub-pixels SPa(1,1)-SPa(1,6) shown in FIG. 17 or 18 .

根据图21所示的实施例，图18中所示的电压波形(a)～(j)可以用作供给包括存储电容线CSA和CS-B的导线的电压波形。但是，因为显示信号电压每两列转换一次，因此具有图18所示波形(a)的显示信号电压提供给S-C1、S-C2、S-C5、S-C6、…，如图21A所示，而具有图20所示波形(b)的显示信号电压提供给图21A中所示的S-C3、S-C4、S-C7(未示出)、S-C8(未示出)、…。According to the embodiment shown in FIG. 21, the voltage waveforms (a) to (j) shown in FIG. 18 can be used as voltage waveforms supplied to wires including storage capacitor lines CSA and CS-B. However, since the display signal voltage is switched every two columns, the display signal voltage having the waveform (a) shown in FIG. 18 is supplied to S-C1, S-C2, S-C5, S-C6, ..., as shown in FIG. 21A. shown, and a display signal voltage having a waveform (b) shown in FIG. 20 is supplied to S-C3, S-C4, S-C7 (not shown), S-C8 (not shown), …

尽管在上述实施例中，供给存储电容线的存储电容反电压是占空比为1∶1的矩形波振荡电压，但是本发明也可以用频宽比不是1∶1的矩形波。除此之外，还可以用其它波形，例如正弦波或三角形波。在这种情况下，当连接到多个子像素的TFT关闭时，在供给子像素存储电容反电极的电压中产生的变化可以根据子像素来改变。但是，使用矩形波使存储在不同子像素(液晶电容和存储电容)的电荷数量和施加到不同子像素上的电压均方根容易相等。Although in the above embodiments, the storage capacitor counter voltage supplied to the storage capacitor line is a rectangular wave oscillation voltage with a duty ratio of 1:1, the present invention can also use a rectangular wave with a duty ratio other than 1:1. Besides, other waveforms such as sine wave or triangular wave can also be used. In this case, when TFTs connected to a plurality of sub-pixels are turned off, a change generated in a voltage supplied to a counter electrode of a sub-pixel storage capacitor may vary according to sub-pixels. However, using a rectangular wave makes it easy to equalize the amount of charge stored in different sub-pixels (liquid crystal capacitor and storage capacitor) and the RMS voltage applied to different sub-pixels.

而且，尽管在上述参照图17和21所述的实施例中，供给存储电容线(波形(c)和(d))的振荡电压振荡周期是1H，如图18所示，但也可以是1H被自然数除所得到的1H的分数，例如1/1H，1/2H，1/3H，1/4H等。但是，因为振荡电压振荡周期变短，因此难以构成驱动电路或驱动电路的功耗增大。Also, although in the embodiment described above with reference to FIGS. 17 and 21, the oscillation period of the oscillation voltage supplied to the storage capacitor lines (waveforms (c) and (d)) is 1H as shown in FIG. 18, it may be 1H The fraction of 1H obtained by dividing by natural numbers, such as 1/1H, 1/2H, 1/3H, 1/4H, etc. However, since the oscillation period of the oscillation voltage is shortened, it is difficult to configure the drive circuit or the power consumption of the drive circuit increases.

接下来，描述本发明第三方面的实施例。Next, embodiments of the third aspect of the present invention are described.

本发明第三方面的实施例涉及通过将每个像素分成多个不同亮度的子像素来提高视角特性、尤其是提高显示对比度的大或高分辨率液晶显示器和它的驱动方法。Embodiments of the third aspect of the present invention relate to a large or high-resolution liquid crystal display and its driving method for improving viewing angle characteristics, especially display contrast, by dividing each pixel into a plurality of sub-pixels of different brightness.

如上所述，本发明第一方面的实施例是通过将每个像素分成多个不同亮度的子像素而提高视角特性、尤其是显示对比度的液晶显示器或驱动方法。这种类型的显示和驱动这里是指多像素显示、多像素驱动、面积比灰度等级显示、或面积比灰度等级驱动。还有，本发明第二方面的实施例是具有能减小显示“闪烁”的子像素阵列的液晶显示器或它的驱动方法，并且与第一方面实施例适当地组合。As described above, an embodiment of the first aspect of the present invention is a liquid crystal display or a driving method that improves viewing angle characteristics, especially display contrast, by dividing each pixel into a plurality of sub-pixels with different brightness. This type of display and driving is referred to herein as multi-pixel display, multi-pixel driving, area-ratio grayscale display, or area-ratio grayscale driving. Also, an embodiment of the second aspect of the present invention is a liquid crystal display having a sub-pixel array capable of reducing display "flicker" or a driving method thereof, suitably combined with embodiments of the first aspect.

在根据本发明第二方面实施例的液晶显示器中，施加到CS总线(存储电容线)的振荡电压(存储电容反电压)振荡周期等于或短于一个水平扫描周期。如果以这种方式将短振荡周期的振荡电压施加到CS总线上，增加显示板的分辨率和尺寸，所得到的振荡电压的短振荡周期使得振荡发生器电路难(昂贵)以构建，增加功耗，或增加由CS总线电负载阻抗造成的波形钝化的影响。In the liquid crystal display according to the embodiment of the second aspect of the present invention, the oscillation period of the oscillation voltage (storage capacitance counter voltage) applied to the CS bus line (storage capacitance line) is equal to or shorter than one horizontal scanning period. If an oscillating voltage with a short oscillation period is applied to the CS bus in this manner, increasing the resolution and size of the display panel, the resulting short oscillation period of the oscillation voltage makes the oscillation generator circuit difficult (expensive) to construct, increasing power consumption, or increase the effect of waveform blunting caused by the electrical load impedance of the CS bus.

与根据第二方面实施例的液晶显示器比较，描述根据本发明第三方面实施例的液晶显示器，这里再次描述根据本发明第二方面实施例的液晶显示器的具体结构和操作。下面是通过将CS总线振荡电压的振荡周期设定为一个水平扫描周期来实现上述面积比灰度等级的示例。参照附图，集中描述下列三点。第一点涉及液晶显示器的结构，围绕连接子像素的存储电容的存储电容反电极和CS总线之间的连接图案定中心。第二点涉及根据栅极总线电压波形的CS总线振荡周期和相位。第三点涉及子像素的驱动和显示状态。Compared with the liquid crystal display according to the embodiment of the second aspect, the liquid crystal display according to the embodiment of the third aspect of the present invention is described, and the specific structure and operation of the liquid crystal display according to the embodiment of the second aspect of the present invention are described again here. The following is an example of realizing the above-mentioned area-ratio gray scale by setting the oscillation period of the CS bus oscillation voltage to one horizontal scanning period. Referring to the accompanying drawings, the following three points will be described focusing on. The first point concerns the structure of the liquid crystal display, centering around the connection pattern between the storage capacitor counter electrode and the CS bus line connecting the storage capacitors of the sub-pixels. The second point concerns the CS bus oscillation period and phase according to the gate bus voltage waveform. The third point concerns the drive and display state of the sub-pixels.

图22是具有图17所示像素阵列的液晶显示器的一定区域的等效电路图。液晶显示器具有行和列排列成矩阵的像素。每个像素具有两个子像素(用符号A和B表示)。每个子像素包括液晶电容CLCA_n，m或CLCB_n，m和存储电容CCSA_n，m或CCSB_n，m。每个液晶电容由子像素电极、反电极ComLC、和夹在它们之间的液晶层组成。每个存储电容由存储电容电极、绝缘膜和存储电容反电极(ComCSA_n或ComCSB_n)组成。两个子像素经过各个TFTA_n，m和TFTB_n，m连接到公共信号线(电源总线)SBL_m上。通过施加到公共扫描线(栅极总线)GBL_n上的扫描信号电压来开启和关闭TFTA_n，m和TFTB_n，m。当两个TFT开启时，显示器信号电压经过公共信号线供给各个子像素电极和两个子像素的存储电容电极。经过CS总线(CSBL)，两个子像素电极之一的存储电容反电极连接到存储电容干线(CS干线)CSVtypeR1上，其它子像素的存储电容反电极连接到存储电容干线(CS干线)CSVtypeR2上。FIG. 22 is an equivalent circuit diagram of a certain region of the liquid crystal display having the pixel array shown in FIG. 17 . Liquid crystal displays have pixels arranged in rows and columns in a matrix. Each pixel has two sub-pixels (denoted by symbols A and B). Each sub-pixel includes a liquid crystal capacitor CLCA_n,m or CLCB_n,m and a storage capacitor CCSA_n,m or CCSB_n,m. Each liquid crystal capacitor consists of a sub-pixel electrode, a counter electrode ComLC, and a liquid crystal layer sandwiched between them. Each storage capacitor is composed of a storage capacitor electrode, an insulating film, and a storage capacitor counter electrode (ComCSA_n or ComCSB_n). The two sub-pixels are connected to a common signal line (power bus) SBL_m via respective TFTA_n, m and TFTB_n, m. TFTA_n,m and TFTB_n,m are turned on and off by a scan signal voltage applied to a common scan line (gate bus line) GBL_n. When the two TFTs are turned on, the display signal voltage is supplied to each sub-pixel electrode and the storage capacitor electrodes of the two sub-pixels through a common signal line. Through the CS bus (CSBL), the storage capacitor counter electrode of one of the two sub-pixel electrodes is connected to the storage capacitor trunk line (CS trunk line) CSVtypeR1, and the storage capacitor counter electrodes of other sub-pixels are connected to the storage capacitor trunk line (CS trunk line) CSVtypeR2.

应该注意在图22列方向相邻像素的子像素共享电公共CS总线。特别是用于n行中具有CLCB_n，m的子像素的CS总线CSBL和用于列方向相邻行中具有CLCA_n+1，m象素的子像素的CS总线CSBL电共用。It should be noted that subpixels of adjacent pixels in the column direction in FIG. 22 share an electrically common CS bus. In particular, the CS bus line CSBL for sub-pixels with CLCB_n,m in n rows is electrically shared with the CS bus line CSBL for sub-pixels with CLCA_n+1,m pixels in adjacent rows in the column direction.

图23A和23B示出就栅极总线的电压波形和所示子像素电极电压而言供给CS总线的振荡电压的振荡周期和相位。液晶显示器通常反转(以规定时间间隔)施加到每个像素液晶层的电场方向，因此，需要考虑对应电场方向的两个类型驱动电压波形。在图23A和图23B中分别示出两种类型的驱动状态。23A and 23B show the oscillation period and phase of the oscillation voltage supplied to the CS bus with respect to the voltage waveform of the gate bus and the subpixel electrode voltage shown. Liquid crystal displays generally reverse (at regular time intervals) the direction of the electric field applied to the liquid crystal layer of each pixel, and therefore, two types of driving voltage waveforms corresponding to the direction of the electric field need to be considered. Two types of drive states are shown in FIGS. 23A and 23B , respectively.

在图23A和23B中，VSBL_m表示供给m列电源总线SBL_m的显示信号电压(电源信号电压)的波形，同时VGBL_n表示供给n列的栅极总线GBL_n的扫描信号电压(栅极信号电压)的波形。VCSVtypeR1和VCSVtypeR2分别表示供给CS干线CSVtypeR1和CSVtypeR2的振荡电压的波形，作为存储电容反电压。VPEA_m，n和VPEB_m，n表示各个子像素液晶电容的电压波形。In FIGS. 23A and 23B , VSBL_m represents the waveform of the display signal voltage (power signal voltage) supplied to the power supply bus line SBL_m of m columns, while VGBL_n represents the waveform of the scanning signal voltage (gate signal voltage) supplied to the gate bus line GBL_n of n columns. . VCSVtypeR1 and VCSVtypeR2 represent the waveforms of oscillation voltages supplied to the CS trunk lines CSVtypeR1 and CSVtypeR2 , respectively, as storage capacitor counter voltages. VPEA_m, n and VPEB_m, n represent voltage waveforms of liquid crystal capacitors of each sub-pixel.

在图23A和23B中注意的第一点是CSVtypeR1和CSVtypeR2的电压VCSVtypeR1和VCSVtypeR2的振荡周期都等于一个水平扫描周期(1H)。The first point to note in FIGS. 23A and 23B is that the oscillation periods of the voltages VCSVtypeR1 and VCSVtypeR2 of CSVtypeR1 and CSVtypeR2 are both equal to one horizontal scanning period (1H).

在图23A和23B中注意的第二点是VCSVtypeR1和VCSVtypeR2的相位如下。首先，观察CS干线之间的相位差，VCSVtypeR2落后VCSVtypeR1为0.5H。接下来，观察CS干线和栅极总线的电压，CS干线和栅极总线的电压相位如下。从图23A和23B中可以看出，对应各个CS干线的栅极总线电压从VgH变为VgL的时间与CS干线电压的平坦部分到达它们的中心的时间一致。换句话说，在图23A和23B中的Td值是0.25H。但是，Td可以是大于0H但小于0.5H的任何值。The second point to note in FIGS. 23A and 23B is that the phases of VCSVtypeR1 and VCSVtypeR2 are as follows. First, observe the phase difference between the CS trunk lines, VCSVtypeR2 lags behind VCSVtypeR1 by 0.5H. Next, observe the voltages of the CS trunk line and the gate bus line, and the voltage phases of the CS trunk line and the gate bus line are as follows. It can be seen from Figures 23A and 23B that the timing of the gate bus voltage change from VgH to VgL for the respective CS rails coincides with the time when the flat portions of the CS rail voltages reach their centers. In other words, the Td value in FIGS. 23A and 23B is 0.25H. However, Td can be any value greater than 0H but less than 0.5H.

尽管参照图23A和23B描述了CS干线的电压相位和周期，CS干线的电压波形不限于此，CS干线可以是任何波形，只要满足下列两个条件之一。第一个条件是在对应栅极总线的电压从VgH变为HgL后，电压VCSVtypeR1的第一变化是电压增加，而在对应栅极总线的电压从VgH变为HgL后，电压VCSVtypeR2的第一变化是电压减小。第二条件是在对应栅极总线的电压从VgH变为HgL后，电压VCSVtypeR1的第一变化是电压减小，而在对应栅极总线的电压从VgH变为HgL后，电压VCSVtypeR2的第一变化是电压增加。Although the voltage phase and period of the CS rail are described with reference to FIGS. 23A and 23B , the voltage waveform of the CS rail is not limited thereto, and the CS rail may be of any waveform as long as one of the following two conditions is satisfied. The first condition is that after the voltage of the corresponding gate bus line changes from VgH to HgL, the first change of the voltage VCSVtypeR1 is a voltage increase, and after the voltage of the corresponding gate bus line changes from VgH to HgL, the first change of the voltage VCSVtypeR2 is the voltage decrease. The second condition is that after the voltage of the corresponding gate bus line changes from VgH to HgL, the first change of the voltage VCSVtypeR1 is a voltage decrease, and after the voltage of the corresponding gate bus line changes from VgH to HgL, the first change of the voltage VCSVtypeR2 is the voltage increase.

图24A和24B概述液晶显示器的驱动状态。根据图23A和23B所示示例的子像素的多个驱动电压，液晶显示器的驱动状态也分为两种类型。图24A的驱动状态对应图23A的驱动电压波形，而图24B的驱动状态对应图23B的驱动电压波形。24A and 24B outline the driving state of the liquid crystal display. The driving states of the liquid crystal display are also classified into two types according to the multiple driving voltages of the sub-pixels shown in the example of FIGS. 23A and 23B . The driving state of FIG. 24A corresponds to the driving voltage waveform of FIG. 23A, and the driving state of FIG. 24B corresponds to the driving voltage waveform of FIG. 23B.

图24A和24B示意性地表示在按矩阵排列的多个像素中“从n行到n+7行的8行”ד从m列到m+5列的6列”的像素驱动状态。每个像素具有不同亮度的子像素。即表示为“b(亮)”的子像素和表示为“d(暗)”的子像素。图24A和24B基本上与图17相同。24A and 24B schematically show a pixel driving state of "8 rows from n rows to n+7 rows" x "6 columns from m columns to m+5 columns" among a plurality of pixels arranged in matrix. Each pixel has sub-pixels of different brightness. That is, a sub-pixel denoted "b (bright)" and a sub-pixel denoted "d (dark)". 24A and 24B are basically the same as FIG. 17 .

图24A和图24B的注意点是，是否满足面积比灰度等级板的要求。面积比灰度等级板具有五个要求。The point of attention in Fig. 24A and Fig. 24B is whether to meet the requirements of the area ratio gray scale board. The area ratio gray scale board has five requirements.

第一要求是当显示中间灰度等级时，每个像素由不同亮度的多个像素组成。The first requirement is that when displaying intermediate gray levels, each pixel is composed of multiple pixels of different brightness.

第二要求是不考虑时间，不同亮度的子像素亮度级不变。The second requirement is that the luminance levels of sub-pixels with different luminances remain unchanged regardless of time.

第三要求是不同亮度的子像素精巧地排列。The third requirement is the delicate arrangement of sub-pixels with different brightness.

第四要求是在所有帧中相反极性的像素精巧地排列。A fourth requirement is that pixels of opposite polarity be neatly aligned in all frames.

第五要求是在所有帧中相同极性、相同亮度级(特别是最亮的子像素)的子像素精巧地排列。A fifth requirement is the delicate arrangement of sub-pixels of the same polarity and same brightness level (especially the brightest sub-pixel) in all frames.

按照第一要求来验证。这里，每个像素由两个不同亮度的子像素组成。特别是，例如在图24A中，n行和m列的像素由表示为“b(亮)”的高亮度子像素和表示为“d(暗)”的低亮度子像素组成。因此，满足第一要求。Verify according to the first requirement. Here, each pixel consists of two sub-pixels of different brightness. In particular, for example, in FIG. 24A , pixels of n rows and m columns are composed of high-brightness sub-pixels denoted "b (bright)" and low-brightness sub-pixels denoted "d (dark)". Therefore, the first requirement is satisfied.

按照第二要求来验证。液晶显示器以规则的时间间隔交替不同驱动状态的两种显示状态。图24A和24B表示对应于两种显示状态的驱动状态符合高亮度子像素和低亮度子像素的位置。因此，满足第二要求。Verify according to the second requirement. The liquid crystal display alternates two display states of different drive states at regular time intervals. Figures 24A and 24B show where the drive states corresponding to the two display states correspond to the positions of the high-intensity sub-pixels and the low-intensity sub-pixels. Therefore, the second requirement is satisfied.

按照第三要求来验证。在图24A和24B中，不同亮度级(即，表示为“b(亮)”的子像素和表示为“d(暗)”的子像素)的子像素按棋盘格式排列。液晶显示器的可视观察没有出现诸如使用不同亮度子像素降低分辨率的显示问题。因此，满足第三要求。Verify according to the third requirement. In FIGS. 24A and 24B , subpixels of different brightness levels (ie, subpixels denoted "b (bright)" and subpixels denoted "d (dark)") are arranged in a checkerboard format. Visual viewing of LCDs does not present display issues such as reduced resolution using sub-pixels of different brightness. Therefore, the third requirement is satisfied.

按照第四要求来检验。在图24A和24B中相反极性的像素排列成棋盘格式。特别是，例如在图24A中，在n+2行和m+2列中的像素具有“+”极性。从这个像素开始，沿行方向和列方向在“-”和“+”之间每隔一个像素改变极性。对于不能满足第四要求的液晶显示器，认为是与像素的驱动极性在“+”和“-”之间变化同步看到显示器的闪动。但是，当目视检验实施例的液晶显示器时就看不到闪动。因此，满足第四要求。Check according to the fourth requirement. Pixels of opposite polarity are arranged in a checkerboard format in Figures 24A and 24B. In particular, pixels in n+2 rows and m+2 columns have "+" polarity, for example in FIG. 24A. From this pixel, the polarity is changed every other pixel between "-" and "+" in the row direction and column direction. For a liquid crystal display that cannot meet the fourth requirement, it is considered that the flickering of the display is seen synchronously with the change of the driving polarity of the pixel between "+" and "-". However, no flickering was observed when the liquid crystal displays of the examples were visually inspected. Therefore, the fourth requirement is satisfied.

按照第五要求来检验。在图24A和24B中，观察相同亮度级的子像素驱动极性，每两行子像素(即，每隔一个像素宽度)反转驱动极性。特别是，例如在图24A的n_B行中，在m+1、m+3和m+5列中的子像素为“b(亮)”，并且所有这些子像素的极性为“-”。在n+1_A行中，在m、m+2和m+4列的像素为“b(亮)”，并且所有这些子像素的极性为“-”。在n+1_B行中，在m+1、m+3和m+5列中的子像素为“b(亮)”，并且所有这些子像素的极性为“+”。在n+2_A行中，在m、m+2和m+4列的像素为“b(亮)”，并且所有这些子像素的极性为“+”。对于不满足第五要求的液晶显示器，认为是与像素的驱动极性在“+”和“-”之间变化同步看到显示器的闪动。但是，当目视检验根据本发明的液晶显示器时就看不到闪动。因此，满足第五要求。Check according to the fifth requirement. In FIGS. 24A and 24B , looking at the subpixel drive polarity for the same brightness level, the drive polarity is reversed every two rows of subpixels (ie, every other pixel width). In particular, for example, in row n_B of FIG. 24A , subpixels in columns m+1, m+3, and m+5 are "b (bright)", and the polarity of all these subpixels is "-". In row n+1_A, pixels at columns m, m+2, and m+4 are "b (bright)", and the polarity of all these sub-pixels is "-". In the n+1_B row, the sub-pixels in the m+1, m+3, and m+5 columns are "b (bright)", and the polarity of all these sub-pixels is "+". In row n+2_A, pixels at columns m, m+2, and m+4 are "b (bright)", and the polarity of all these sub-pixels is "+". For a liquid crystal display that does not meet the fifth requirement, it is considered that the flickering of the display is seen synchronously with the change of the driving polarity of the pixel between "+" and "-". However, no flickering was observed when the liquid crystal display according to the present invention was visually inspected. Therefore, the fifth requirement is satisfied.

当通过改变CS电压的振幅VCSpp来观察液晶显示器时，在倾斜观察期间，随着显示对比度的提高，视角特性就提高，因为CS电压的振幅VCSpp从0V开始增加(0V用于支持除了根据本发明液晶显示器之外的一般液晶显示器)。尽管根据显示的图像视角特性的提高似乎稍有不同，但是当VCSpp设定为使VLCaddpp值在普通驱动模式(VCSpp为0V)的液晶显示器域值电压的0.5-2倍之内时，则实现最佳提高。When a liquid crystal display is observed by changing the amplitude VCSpp of the CS voltage, during oblique observation, the viewing angle characteristics are improved as the display contrast is improved because the amplitude VCSpp of the CS voltage is increased from 0V (0V is used to support the General liquid crystal display other than liquid crystal display). Although the improvement of viewing angle characteristics seems to be slightly different depending on the displayed image, when VCSpp is set so that the value of VLCaddpp is within 0.5-2 times the threshold voltage of the LCD in the normal drive mode (VCSpp is 0V), the best Good improvement.

因此，根据本发明第二方面实施例的液晶显示器通过施加振荡电压到存储电容计数器电极上而提高视角特性，由此实现多像素显示，其中施加到存储电容反电极上的振荡电压振荡周期等于或短于一个水平扫描周期。但是，当施加到CS总线上的振荡电压的振荡周期短时，就相当难以在CS总线的高负载电容和电阻的大液晶显示器、短水平扫描周期的高分辨率液晶显示器或高速驱动和短垂直、水平扫描周期的显示器上实现多像素显示。Therefore, according to the liquid crystal display of the second embodiment of the present invention, the viewing angle characteristics are improved by applying an oscillating voltage to the counter electrode of the storage capacitor, thereby realizing multi-pixel display, wherein the oscillating period of the oscillating voltage applied to the counter electrode of the storage capacitor is equal to or shorter than one horizontal scan period. However, when the oscillation period of the oscillating voltage applied to the CS bus is short, it is quite difficult to operate a large liquid crystal display with high load capacitance and resistance of the CS bus, a high-resolution liquid crystal display with a short horizontal scanning period, or a high-speed driving and short vertical , Horizontal scanning period of the display to achieve multi-pixel display.

这个问题将参照图25-28来描述。This problem will be described with reference to Figures 25-28.

图25A是表示在根据本发明第二方面实施例的液晶显示器中，用于将振荡电压供给CS总线的的结构示意图。振荡电压从CS干线供给在液晶显示板中设置的多个CS总线。振荡电压经过连接点ContP1和ContP2并经过ContP3和ContP4，从CS总线电压发生器电路供给CS干线。由于增加液晶显示板的尺寸，因此从显示板中心的像素到连接点ContP1和ContP2的距离增加，使它不可能忽略中心像素和连接点之间的负载阻抗。负载阻抗的主要元件包括像素的液晶电容(CLC)和存储电容(CCS)、CS总线的电阻RCS和CS干线的电阻Rtrunk。负载阻抗的第一近似值可以是由图25B所示的上述电容和电阻组成的低通滤波器。负载阻抗的值是液晶显示板位置的函数。例如，它是距连接点ContP1、ContP2、ContP3和ContP4距离的函数。特别是，负载阻抗随距离连接点距离的增加而增加，随距离连接点距离的减小而减小。25A is a schematic diagram showing a structure for supplying an oscillation voltage to a CS bus in a liquid crystal display according to an embodiment of the second aspect of the present invention. The oscillation voltage is supplied from the CS main line to a plurality of CS bus lines provided in the liquid crystal display panel. The oscillating voltage is supplied to the CS rail from the CS bus voltage generator circuit through the junction points ContP1 and ContP2 and through ContP3 and ContP4. As the size of the liquid crystal display panel increases, the distance from the pixel at the center of the panel to the connection points ContP1 and ContP2 increases, making it impossible to ignore the load impedance between the central pixel and the connection points. The main components of the load impedance include the liquid crystal capacitance (CLC) and storage capacitance (CCS) of the pixel, the resistance RCS of the CS bus line, and the resistance Rtrunk of the CS main line. A first approximation of the load impedance can be a low-pass filter consisting of the aforementioned capacitors and resistors shown in Figure 25B. The value of the load impedance is a function of the position of the LCD panel. For example, it is a function of the distance from the connection points ContP1, ContP2, ContP3 and ContP4. In particular, the load impedance increases with increasing distance from the connection point and decreases with decreasing distance from the connection point.

也就是说，由振荡电压发生器电路产生的CS总线电压受CR低通滤波器近似的CS总线负载的影响，CS总线经过波形钝化改变在平板上的位置。That is, the CS bus voltage generated by the oscillating voltage generator circuit is affected by the CS bus load approximated by the CR low-pass filter, and the position of the CS bus on the plate is changed by waveform passivation.

如本发明第一方面的实施例所述，振荡电压施加给CS总线，以便构成两个或更多个子像素的各个像素并改变子像素的亮度。即，根据本发明实施例的液晶显示器使用这样的结构和驱动方法：根据CS总线的振荡电压形成子像素电极的电压波形，并根据CS总线的振荡波形改变有效电压。因此，如果CS总线电压波形从一个位置变到另一个位置，子像素电极的有效电压也是如此。换句话说，如果CS总线电压的波形钝化改变位置，显示亮度也随位置变化，从而得到不规则的显示亮度。As described in the embodiment of the first aspect of the present invention, an oscillating voltage is applied to the CS bus line so as to constitute each pixel of two or more sub-pixels and change the luminance of the sub-pixels. That is, a liquid crystal display according to an embodiment of the present invention uses a structure and a driving method in which a voltage waveform of a sub-pixel electrode is formed according to an oscillating voltage of a CS bus line, and an effective voltage is changed according to an oscillating waveform of the CS bus line. Therefore, if the CS bus voltage waveform changes from one location to another, so does the effective voltage of the subpixel electrode. In other words, if the waveform bluntness of the CS bus voltage changes position, the display brightness also varies with the position, resulting in irregular display brightness.

通过增加CS总线的振荡周期校正显示亮度不规则的能力是根据本发明第三方面液晶显示器的优点。下面将作解释。The ability to correct display brightness irregularities by increasing the oscillation period of the CS bus is an advantage of the liquid crystal display according to the third aspect of the present invention. It will be explained below.

图26和27示意性地表示在CS负载保持不变的情形子像素电极的振荡电压波形。图26和27是假定在CS总线电压不是振荡电压时子像素电极的电压为“0V”，以及由CS总线的振动产生的子像素电极电压的振幅是“1V”的示意图。图26中波形(a)-(e)表示CS电压没有波形钝化的波形，即，CR低通滤波器的CR时间常数是“0H”，而图27中波形(a)-(e)表示当CR低通滤波器的CR时间常数是“0.2H”时的波形钝化。图26和27示意性地表示当CR低通滤波器的CR时间常数分别是“0H”和“0.2H”时子像素电极电压的电压波形，以及CS总线振荡电压的振荡周期被改变。图26和27中的波(a)-(e)表示波形振荡周期分别是1H、2H、4H、8H的情形。26 and 27 schematically show the oscillating voltage waveforms of the sub-pixel electrodes in the case where the CS load remains constant. 26 and 27 are diagrams assuming that the voltage of the subpixel electrode is "0V" when the CS bus voltage is not an oscillation voltage, and the amplitude of the subpixel electrode voltage generated by the oscillation of the CS bus is "1V". Waveforms (a)-(e) in Figure 26 represent the waveforms of the CS voltage without waveform blunting, that is, the CR time constant of the CR low-pass filter is "0H", while waveforms (a)-(e) in Figure 27 represent Waveform blunting when the CR time constant of the CR low-pass filter is "0.2H". 26 and 27 schematically show the voltage waveforms of the sub-pixel electrode voltage when the CR time constant of the CR low-pass filter is "0H" and "0.2H", respectively, and the oscillation period of the CS bus oscillation voltage is changed. Waves (a)-(e) in FIGS. 26 and 27 represent the cases where the waveform oscillation periods are 1H, 2H, 4H, 8H, respectively.

当图26和27相比较时，可以看出图26和27中波形差随振荡周期的增加而减小。这种趋势在图28中定量表示。When comparing Figures 26 and 27, it can be seen that the waveform difference in Figures 26 and 27 decreases as the oscillation period increases. This trend is quantified in Figure 28.

图28表示基于图27的波形比CS总线电压的振荡周期(一个周期对应一个水平扫描周期：1H)计算出的振荡电压的平均值和有效值的关系。从图28中可以看出，在CR时间常数是0H时和CR时间常数是0.2H时之间平均电压和有效电压的偏差随CS总线振荡周期的增加而减小。可以看出，可以很大程度地减小波形钝化的影响，特别是当CS总线振荡电压的振荡周期大于CS总线的CR时间常数(负载阻抗的近似值)的8倍时。FIG. 28 shows the relationship between the average value and the effective value of the oscillation voltage calculated based on the waveform in FIG. 27 compared to the oscillation period of the CS bus voltage (one period corresponds to one horizontal scanning period: 1H). It can be seen from Fig. 28 that the deviation of the average voltage and the effective voltage between when the CR time constant is 0H and when the CR time constant is 0.2H decreases as the CS bus oscillation period increases. It can be seen that the effect of waveform blunting can be greatly reduced, especially when the oscillation period of the CS bus oscillating voltage is greater than 8 times the CR time constant of the CS bus (approximate value of the load impedance).

这样，通过增加CS总线振荡电压的振荡周期，可能降低CS总线波形钝化造成的显示亮度不规则。可以很大程度地降低波形钝化的影响，特别是当CS总线振荡电压的振荡周期大于CS总线的CR时间常数(负载阻抗的近似值)的8倍时。In this way, by increasing the oscillating period of the CS bus oscillating voltage, it is possible to reduce the irregularity of display brightness caused by the blunting of the CS bus waveform. The effect of waveform blunting can be greatly reduced, especially when the oscillation period of the CS bus oscillating voltage is greater than 8 times the CR time constant of the CS bus (approximate value of the load impedance).

由于根据本发明第二方面的液晶显示器具有上述问题，因此提出本发明的第三方面。该方面提供液晶显示器的优选结构和方法，其能增加施加到CS总线上的振荡电压的振荡周期。Since the liquid crystal display according to the second aspect of the present invention has the above-mentioned problems, the third aspect of the present invention is proposed. This aspect provides a preferred structure and method of a liquid crystal display capable of increasing the oscillation period of the oscillation voltage applied to the CS bus.

在根据本发明第三方面实施例的液晶显示器中，电绝缘的CS总线用于在矩阵驱动液晶显示器的同列和沿列方向彼此相邻的子像素中不同亮度级的子像素(例如，第一子像素和第二子像素)。特别是用于n行第一子像素的CS总线和n+1行第二子像素的CS总线彼此电绝缘。这里，在矩阵驱动液晶显示器同列中的像素是被相同信号线(一般为电源总线)驱动的像素。而且，在矩阵驱动液晶显示器的列方向彼此相邻的像素是被在按时间轴顺序选择的扫描线(一般为栅极总线)中相邻时间点选择的扫描线驱动的像素。除此之外，假定有L组CS干线电绝缘，CS总线的振动周期可以是水平扫描周期的L倍。如上所述，优选CS干线的数量大于一个水平扫描周期除以近似等于CS总线最大负载阻抗的CR时间常数而得到的商的8倍。而且，如后面所述，优选该数值除了大于8倍数之外还是偶数。在此，CS干线电绝缘组(L组)的数量可以用电绝缘的CS干线(L干线)的数量来表示。如果电等效的CS干线安装在板两侧，电等效的CS干线的数量则不变。In the liquid crystal display according to the embodiment of the third aspect of the present invention, the electrically insulated CS bus line is used to drive the sub-pixels of different brightness levels in the same column of the liquid crystal display and in the sub-pixels adjacent to each other along the column direction in a matrix (for example, the first subpixel and second subpixel). In particular, the CS bus lines for the first sub-pixels in n rows and the CS bus lines for the second sub-pixels in n+1 rows are electrically insulated from each other. Here, pixels in the same column in a matrix-driven liquid crystal display are pixels driven by the same signal line (typically a power bus). Also, pixels adjacent to each other in the column direction of the matrix-driven liquid crystal display are pixels driven by scanning lines selected at adjacent time points among scanning lines (generally, gate bus lines) selected sequentially on the time axis. In addition, assuming that there are L sets of CS trunk lines electrically isolated, the vibration period of the CS bus lines may be L times the horizontal scanning period. As mentioned above, it is preferred that the number of CS mains is greater than 8 times the quotient of one horizontal scan period divided by the CR time constant approximately equal to the maximum load impedance of the CS bus. Also, as described later, it is preferable that the numerical value is an even number other than a multiple of 8. Here, the number of electrically isolated groups of CS trunks (L groups) can be represented by the number of electrically isolated CS trunks (L trunks). If electrically equivalent CS trunks are installed on both sides of the board, the number of electrically equivalent CS trunks does not change.

下面参照附图，描述根据本发明第三方面实施例的液晶显示器和它的驱动方法。The liquid crystal display and its driving method according to the embodiment of the third aspect of the present invention will be described below with reference to the accompanying drawings.

首先，参照图29-31B，描述液晶显示器通过将CS总线的振荡电压的振荡周期设定为水平扫描周期的4倍来实现面积比灰度等级显示。描述集中在下列几点，并参照附图提供。第一点涉及液晶显示器结构，围绕连接到子像素和CS总线上的存储电容的存储电容反电极之间的连接图案定中心。第二点涉及根据栅极总线电压波形的CS总线的振荡周期和振荡相位。第三点涉及根据本实施例的子像素的驱动和显示状态。First, with reference to FIGS. 29-31B , it will be described that the liquid crystal display realizes area-ratio gray scale display by setting the oscillation period of the oscillation voltage of the CS bus to 4 times the horizontal scanning period. The description focuses on the following points and is provided with reference to the accompanying drawings. The first point concerns the liquid crystal display structure, centering around the connection pattern between the storage capacitor counter-electrodes connected to the sub-pixels and the storage capacitor on the CS bus. The second point concerns the oscillation period and oscillation phase of the CS bus line according to the gate bus voltage waveform. The third point relates to the driving and display states of the sub-pixels according to the present embodiment.

图29是根据本发明第三方面实施例的液晶显示器的等效电路示意图，对应图22。与图22相同的元件用与图22相同的附图标记/符号表示，其描述省略。图29中的液晶显示器不同于图22中的液晶显示器，其中它有四个电绝缘的CS干线CSVtypeA1-CSVtypeA4并且在CS干线和CS总线之间的连接状态。FIG. 29 is a schematic diagram of an equivalent circuit of a liquid crystal display according to an embodiment of the third aspect of the present invention, corresponding to FIG. 22 . The same elements as in FIG. 22 are denoted by the same reference numerals/symbols as in FIG. 22 , and descriptions thereof are omitted. The liquid crystal display in FIG. 29 is different from the liquid crystal display in FIG. 22 in that it has four electrically isolated CS trunk lines CSVtypeA1-CSVtypeA4 and a connection state between the CS trunk lines and the CS bus line.

在图29中要注意的第一点是：在列方向相邻行中像素的相邻子像素(例如，对应CLCB_n，m和CLCA_n+1，m的子像素)的CS总线彼此电绝缘。特别是，例如用于n行子像素CLCB_n，m的CS总线CSBL_B_n和用于列方向相邻行像素的子像素CLCA_n+1，m的总线CSBL_A_n+1彼此电绝缘。The first point to note in FIG. 29 is that the CS bus lines of adjacent sub-pixels (eg, sub-pixels corresponding to CLCB_n,m and CLCA_n+1,m) of pixels in adjacent rows in the column direction are electrically isolated from each other. In particular, for example the CS bus line CSBL_B_n for n rows of sub-pixels CLCB_n,m and the bus line CSBL_A_n+1 for sub-pixels CLCA_n+1,m of adjacent rows of pixels in the column direction are electrically insulated from each other.

在图29中要注意的第二点是：各个CS总线(CSBL)连接到平板端的四根CS干线(CSVtypeA1、CSVtypeA2、CSVtypeA3和CSVtypeA4)之一上。即，在根据本实施例的液晶显示器中，有四组电绝缘的CS干线。The second point to note in Figure 29 is that each CS Bus (CSBL) is connected to one of the four CS Trunks (CSVtypeA1, CSVtypeA2, CSVtypeA3, and CSVtypeA4) on the tablet side. That is, in the liquid crystal display according to the present embodiment, there are four sets of electrically isolated CS trunk lines.

图29中要注意的第三点是：在CS总线和四个CS干线之间的连接状态，即，沿列方向电绝缘的CS总线的分布。根据图29中CS总线和CS干线的连接规则，连接到CS干线CSVtypeA1、CSVtypeA2、CSVtypeA3和CSVtypeA4上的总线在表1中示出。The third point to be noted in FIG. 29 is the connection state between the CS bus line and the four CS trunk lines, that is, the distribution of the CS bus lines electrically insulated in the column direction. The buses connected to the CS trunk lines CSVtypeA1 , CSVtypeA2 , CSVtypeA3 and CSVtypeA4 are shown in Table 1 according to the connection rules of the CS bus and CS trunk lines in FIG. 29 .

[表1][Table 1]

CS干线 CS Trunk 连接到CS干线上的CS总线 Connect to the CS bus on the CS trunk 左边引出的CS总线的通用符号 Generic symbol for the CS bus drawn on the left CSVtypeA1CSVtypeA1     CSBL_A_n，      CSBL_B_n+2，CSBL_A_n+4，    CSBL_B_n+6，CSBL_A_n+8，    CSBL_B_n+10，CSBL_A_n+12，   CSBL_B_n+14，… CSBL_A_n, CSBL_B_n+2, CSBL_A_n+4, CSBL_B_n+6, CSBL_A_n+8, CSBL_B_n+10, CSBL_A_n+12, CSBL_B_n+14,… CSBL_A_n+4·k，CSBL_B_n+2+4·k(k＝0，1，2，3，…)CSBL_A_n+4·k, CSBL_B_n+2+4·k (k=0, 1, 2, 3, ...) CSVtypeA2CSVtypeA2     CSBL_B_n，      CSBL_A_n+2，CSBL_B_n+4，    CSBL_A_n+6，CSBL_B_n+8，    CSBL_A_n+10，CSBL_B_n+12，   CSBL_A_n+14，… CSBL_B_n, CSBL_A_n+2, CSBL_B_n+4, CSBL_A_n+6, CSBL_B_n+8, CSBL_A_n+10, CSBL_B_n+12, CSBL_A_n+14, ... CSBL_B_n+4·k，CSBL_A_n+2+4·k(k＝0，1，2，3，…)CSBL_B_n+4·k, CSBL_A_n+2+4·k (k=0, 1, 2, 3, ...) CSVtypeA3CSVtypeA3     CSBL_A_n+1，    CSBL_B_n+3，CSBL_A_n+5，    CSBL_B_n+7，CSBL_A_n+9，    CSBL_B_n+11，CSBL_A_n+13，   CSBL_B_n+15，… CSBL_A_n+1, CSBL_B_n+3, CSBL_A_n+5, CSBL_B_n+7, CSBL_A_n+9, CSBL_B_n+11, CSBL_A_n+13, CSBL_B_n+15,… CSBL_A_n+1+4·k，CSBL_B_n+3+4·k(k＝0，1，2，3，…)CSBL_A_n+1+4·k, CSBL_B_n+3+4·k (k=0, 1, 2, 3, ...) CSVtypeA4CSVtypeA4     CSBL_B_n+1，    CSBL_A_n+3，CSBL_B_n+5，    CSBL_A_n+7，CSBL_B_n+9，    CSBL_A_n+11，CSBL_B_n+13，   CSBL_A_n+15，… CSBL_B_n+1, CSBL_A_n+3, CSBL_B_n+5, CSBL_A_n+7, CSBL_B_n+9, CSBL_A_n+11, CSBL_B_n+13, CSBL_A_n+15,… CSBL_B_n+1+4·k，CSBL_A_n+3+4·k(k＝0，1，2，3，…)CSBL_B_n+1+4·k, CSBL_A_n+3+4·k (k=0, 1, 2, 3, ...)

四组电绝缘的CS总线分别连接到上述表1中所示的四个CS干线上。Four sets of electrically isolated CS bus lines are respectively connected to the four CS trunk lines shown in Table 1 above.

图30A和30B表示根据栅极总线的电压波形的CS总线振荡周期和相位，以及表示子像素电极的电压。图30A和30B对应上述图23A和23B。与图23A和23B相同的元件用与图23A和23B相同的附图标记/符号表示，在此省略描述。液晶显示器一般以规则的时间间隔反转施加到每个像素的液晶层上的电场方向，因此，需要考虑对应于电场方向的两种类型的驱动电压波形。图30A和30B中分别表示这两种类型的驱动状态。30A and 30B show the CS bus oscillation period and phase according to the voltage waveform of the gate bus line, and show the voltage of the sub-pixel electrode. Figures 30A and 30B correspond to Figures 23A and 23B described above. The same elements as in FIGS. 23A and 23B are denoted by the same reference numerals/symbols as in FIGS. 23A and 23B , and descriptions are omitted here. A liquid crystal display generally reverses the direction of an electric field applied to a liquid crystal layer of each pixel at regular time intervals, and thus, two types of driving voltage waveforms corresponding to the direction of the electric field need to be considered. These two types of driving states are shown in Figs. 30A and 30B, respectively.

图30A和30B中要注意的第一点是：CSVtypeA1、CSVtypeA2、CSVtypeA3和CSVtypeA4的电压VCSVtypeA1、VCSVtypeA2、VCSVtypeA3和VCSVtypeA4的振荡周期全都是水平扫描周期的4倍(4H)。The first point to be noted in FIGS. 30A and 30B is that the oscillation periods of the voltages VCSVtypeA1, VCSVtypeA2, VCSVtypeA3, and VCSVtypeA4 of CSVtypeA1, CSVtypeA2, CSVtypeA3, and CSVtypeA4 are all 4 times (4H) the horizontal scanning period.

图30A和30B中要注意的第二点是：VCSVtypeA1、VCSVtypeA2、VCSVtypeA3和VCSVtypeA4的相位如下。首先，比较CS干线中的相位，VCSVtypeA2比VCSVtypeA1落后2H，VCSVtypeA3比VCSVtypeA1落后3H，VCSVtypeA4比VCSVtypeA1落后1H。接下来，观察CS干线的电压和栅极总线的电压，CS总线电压和栅极总线电压的相位如下。如图30A和30B所示，对应于各个CS干线的栅极总线的电压从VgH变为VgL的时间与CS干线的平坦部分到达它们中心的时间一致。换句话说，图30A和30B中的Td值是1H。但是，Td值是任何大于0H小于2H的值。The second point to note in FIGS. 30A and 30B is that the phases of VCSVtypeA1, VCSVtypeA2, VCSVtypeA3, and VCSVtypeA4 are as follows. First, comparing the phases in the CS trunk, VCSVtypeA2 is 2H behind VCSVtypeA1, VCSVtypeA3 is 3H behind VCSVtypeA1, and VCSVtypeA4 is 1H behind VCSVtypeA1. Next, observe the voltage of the CS trunk line and the voltage of the gate bus line, and the phases of the CS bus voltage and the gate bus voltage are as follows. As shown in FIGS. 30A and 30B , the timing at which the voltage of the gate bus corresponding to each CS rail changes from VgH to VgL coincides with the timing at which the flat portions of the CS rails reach their centers. In other words, the Td value in FIGS. 30A and 30B is 1H. However, the Td value is any value greater than 0H and less than 2H.

这里，对应于各个Cs干线的栅极总线是CS总线经过辅助电容CS和TFT元件连接相同子像素电极的CS干线和栅极总线。根据图29，对应于这个液晶显示器中的每个CS干线的栅极总线和CS总线在下面的表2中表示。Here, the gate bus line corresponding to each Cs main line is that the CS bus line is connected to the CS main line and the gate bus line of the same sub-pixel electrode through the auxiliary capacitor CS and the TFT element. According to FIG. 29, the gate bus lines and CS bus lines corresponding to each CS trunk line in this liquid crystal display are shown in Table 2 below.

[表2][Table 2]

CS干线 CS Trunk 相应的栅极总线 corresponding gate bus 相应的CS总线 Corresponding CS bus CSVtypeA1CSVtypeA1     GBL_n，GBL_n+2，GBL_n+4，GBL_n+6，GBL_n+8，…........................[GBL_n+2·k(k＝0，1，2，3，…)] GBL_n, GBL_n+2, GBL_n+4, GBL_n+6, GBL_n+8, ...................................[GBL_n+2·k( k=0, 1, 2, 3, ...)]   CSBL_A_n，CSBL_B_n+2，CSBL_A_n+4，CSBL_B_n+6，CSBL_A_n+8，…........................[CSBL_A_n+4·k，CSBL_B_n+2+4·k(k＝0，1，2，3，…)] CSBL_A_n, CSBL_B_n+2, CSBL_A_n+4, CSBL_B_n+6, CSBL_A_n+8, ...................................[CSBL_A_n+4·k, CSBL_B_n+2+4·k (k=0, 1, 2, 3, ...)] CSVtypeA2CSVtypeA2     GBL_n，GBL_n+2，GBL_n+4，GBL_n+6，GBL_n+8，….......................[GBL_n+2·k(k＝0，1，2，3，…)] GBL_n, GBL_n+2, GBL_n+4, GBL_n+6, GBL_n+8, ....................[GBL_n+2·k(k = 0, 1, 2, 3, ...)]   CSBL_B_n，CSBL_A_n+2，CSBL_B_n+4，CSBL_A_n+6，CSBL_B_n+8，….......................[CSBL_B_n+4·k，CSBL_A_n+2+4·k(k＝0，1，2，3，…)] CSBL_B_n, CSBL_A_n+2, CSBL_B_n+4, CSBL_A_n+6, CSBL_B_n+8, ...................................[CSBL_B_n+4·k, CSBL_A_n +2+4·k (k=0, 1, 2, 3, ...)] CSVtypeA3CSVtypeA3     GBL_n+1，GBL_n+3，GBL_n+5，GBL_n+7，GBL_n+9，…........................[GBL_n+1+2·k(k＝0，1，2，3，…)] GBL_n+1, GBL_n+3, GBL_n+5, GBL_n+7, GBL_n+9, ...................................[GBL_n+1+ 2·k (k=0, 1, 2, 3, ...)]   CSBL_A_n+1，CSBL_B_n+3，CSBL_A_n+5，CSBL_B_n+7，CSBL_A_n+9，….............................[CSBL_A_n+1+4·k，CSBL_B_n+3+4·k(k＝0，1，2，3，…)] CSBL_A_n+1, CSBL_B_n+3, CSBL_A_n+5, CSBL_B_n+7, CSBL_A_n+9, ................................... [CSBL_A_n+1+4·k, CSBL_B_n+3+4·k (k=0, 1, 2, 3, ...)] CSVtypeA4CSVtypeA4     GBL_n+1，GBL_n+3，GBL_n+5，GBL_n+7，GBL_n+9，…........................[GBL_n+1+2·k(k＝0，1，2，3，…)] GBL_n+1, GBL_n+3, GBL_n+5, GBL_n+7, GBL_n+9, ...................................[GBL_n+1+ 2·k (k=0, 1, 2, 3, ...)]   CSBL_B_n+1，CSBL_A_n+3，CSBL_B_n+5，CSBL_A_n+7，CSBL_B_n+9，…...................[CSBL_B_n+1+4·k，CSBL_A_n+3+4·k(k＝0，1，2，3，…)] CSBL_B_n+1, CSBL_A_n+3, CSBL_B_n+5, CSBL_A_n+7, CSBL_B_n+9, ...................[CSBL_B_n+1+4 k, CSBL_A_n +3+4·k (k=0, 1, 2, 3, ...)]

尽管参照图30A和30B描述了CS干线电压的周期和相位，但是CS干线的电压波形不限于此。CS干线可以是满足下列两个条件的其它波形。Although the cycle and phase of the CS rail voltage are described with reference to FIGS. 30A and 30B , the voltage waveform of the CS rail is not limited thereto. The CS trunk can be other waveforms satisfying the following two conditions.

第一个条件是：对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA1的第一变化是电压升高，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA2的第一变化是电压降低，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA3的第一变化是电压降低，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA4的第一变化是电压升高。图30A所示的驱动电压波形满足这个条件。The first condition is: the first change of the voltage VCSVtypeA1 corresponding to the voltage of the gate bus from VgH to VgL is a voltage rise, and the first change of the voltage VCSVtypeA2 corresponding to the voltage of the gate bus from VgH to VgL is The first change of the voltage VCSVtypeA3 after the voltage of the gate bus is changed from VgH to VgL is a voltage drop, and the first change of the voltage VCSVtypeA4 after the voltage of the gate bus is changed from VgH to VgL is a voltage increase. The driving voltage waveform shown in Fig. 30A satisfies this condition.

第二个条件是：对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA1的第一变化是电压降低，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA2的第一变化是电压升高，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA3的第一变化是电压升高，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeA4的第一变化是电压降低。图30B所示的驱动电压波形满足这个条件。The second condition is: the first change of the voltage VCSVtypeA1 corresponding to the voltage of the gate bus from VgH to VgL is a voltage drop, and the first change of the voltage VCSVtypeA2 corresponding to the voltage of the gate bus from VgH to VgL is a voltage Increase, the first change of the voltage VCSVtypeA3 corresponding to the gate bus voltage changing from VgH to VgL is a voltage rise, and the first change of the voltage VCSVtypeA4 corresponding to the gate bus voltage changing from VgH to VgL is a voltage drop. The drive voltage waveform shown in Fig. 30B satisfies this condition.

但是，出于下面描述的理由，优选使用图30A和30B所示的波形。However, for reasons described below, it is preferable to use the waveforms shown in Figs. 30A and 30B.

在图30A和30B中，振荡周期是不变的。这可以简化信号发生器电路。In Figs. 30A and 30B, the oscillation period is constant. This simplifies the signal generator circuit.

而且，在图30A和30B中，振荡占空比不变。这样可能保持振荡振幅不变，并且当振荡电压用作CS总线电压时，施加到液晶显示层的电压变化量取决于振荡的振幅和占空比，因此简化信号发生器电路。因此，振荡占空比保持不变，就可能使振荡的振幅不变。例如，占空比设定为1∶1。Also, in FIGS. 30A and 30B, the oscillation duty does not change. This makes it possible to keep the oscillation amplitude constant, and when the oscillation voltage is used as the CS bus voltage, the amount of voltage change applied to the liquid crystal display layer depends on the oscillation amplitude and duty cycle, thus simplifying the signal generator circuit. Therefore, keeping the duty cycle of the oscillation constant makes it possible to keep the amplitude of the oscillation constant. For example, the duty ratio is set to 1:1.

而且，在图30A和30B中，对于任何CS振荡电压，存在超出180度相位的振荡电压(相反相位的振荡电压)。即，四个电绝缘CS干线组成CS干线对(两对)，其相互供给超出180度相位的振荡电压。这就可能使流过存储电容反电极的电流量最小，因此简化连接反电极的驱动电路。Also, in FIGS. 30A and 30B , for any CS oscillating voltage, there is an oscillating voltage exceeding a phase of 180 degrees (an oscillating voltage of opposite phase). That is, four electrically insulated CS rails make up a pair of CS rails (two pairs), which mutually supply an oscillating voltage out of 180-degree phase. This makes it possible to minimize the amount of current flowing through the counter electrode of the storage capacitor, thus simplifying the drive circuit connected to the counter electrode.

图31A和31B概述本实施例液晶显示器的驱动状态。根据子像素驱动电压的极性，液晶显示器的驱动状态也分为两种类型，如图30A和30B所示的情形。图31A中的驱动状态对应于图30A的驱动电压波形，同时，图31B中的状态对应于图30B驱动电压波形的驱动状态。图31A和31B对应于上述图24A和24B。31A and 31B outline the driving state of the liquid crystal display of this embodiment. According to the polarity of the sub-pixel driving voltage, the driving state of the liquid crystal display is also divided into two types, as shown in FIGS. 30A and 30B . The driving state in FIG. 31A corresponds to the driving voltage waveform of FIG. 30A, while the state in FIG. 31B corresponds to the driving state of the driving voltage waveform of FIG. 30B. Figs. 31A and 31B correspond to Figs. 24A and 24B described above.

图31A和31B中的注意点是，是否满足面积比灰度等级板的要求。按照下列面积比灰度等级板的五个要求来验证。The point of attention in FIGS. 31A and 31B is whether the requirements of the area ratio gray scale plate are met. Validate according to the following five requirements for area-ratio gray scale panels.

第一要求是当显示中间灰度等级时，每个像素由多个不同亮度子像素组成。The first requirement is that when displaying intermediate gray levels, each pixel consists of a number of sub-pixels of different brightness.

第二要求是不管时间，亮度不同的子像素亮度级不变。The second requirement is that the luminance levels of sub-pixels with different luminances remain unchanged regardless of time.

第三要求是不同亮度的子像素精巧地排列。The third requirement is the delicate arrangement of sub-pixels with different brightness.

第四要求是在所有帧中相反极性的像素精巧地排列。A fourth requirement is that pixels of opposite polarity be neatly aligned in all frames.

第五要求是在所有帧中相同极性、相同亮度级(尤其是最亮的子像素)的子像素精巧地排列。A fifth requirement is a delicate arrangement of sub-pixels of the same polarity, same brightness level (especially the brightest sub-pixel) in all frames.

按照第一要求来验证。在图31A和31B中，每个像素由两个亮度不同的子像素组成。特别是，例如在图31A中，n行和m列的像素由表示为“b(亮)”的高亮度子像素和表示为“d(暗)”的低亮度子像素组成。因此，满足第一要求。Verify according to the first requirement. In FIGS. 31A and 31B, each pixel is composed of two sub-pixels with different brightness. In particular, for example, in FIG. 31A , the pixels of n rows and m columns are composed of high luminance sub-pixels denoted "b (bright)" and low luminance sub-pixels denoted "d (dark)". Therefore, the first requirement is met.

按照第二要求来验证。液晶显示器以规则时间间隔交替不同驱动状态的两种显示状态。图31A和31B表示对应于两个显示状态的驱动状态符合高亮度子像素和低亮度子像素的位置。因此，满足第二要求。Verify according to the second requirement. The liquid crystal display alternates two display states of different drive states at regular time intervals. Figures 31A and 31B show where the drive states corresponding to the two display states correspond to the positions of the high-intensity sub-pixels and the low-intensity sub-pixels. Therefore, the second requirement is satisfied.

按照第三要求来验证。在图31A和31B中，不同亮度级的子像素(即，表示为“b(亮)”的子像素和表示为“d(暗)”的子像素)按棋盘格式排列。液晶显示器的目视观察看不出显示问题，例如由于不同亮度子像素降低分辨率。因此，满足第三要求。Verify according to the third requirement. In FIGS. 31A and 31B , subpixels of different brightness levels (ie, subpixels denoted "b (bright)" and subpixels denoted "d (dark)") are arranged in a checkerboard format. Visual observations of LCDs do not reveal display problems, such as reduced resolution due to different brightness sub-pixels. Therefore, the third requirement is satisfied.

按照第四要求来验证。在图31A和31B中，相反极性的像素排列成棋盘格式。特别是，例如在图31A中，在n+2行和m+2列中的像素具有“+”极性。从这个像素开始，沿行方向和列方向在“-”和“+”之间每隔一个像素改变极性。对于不能满足第四要求的液晶显示器，认为是与像素的驱动极性在“+”和“-”之间变化同步看到显示器的闪动。但是，当目视检验实施例的液晶显示器时看不到闪动。因此，满足第四要求。Verify according to the fourth requirement. In FIGS. 31A and 31B, pixels of opposite polarity are arranged in a checkerboard format. In particular, pixels in rows n+2 and columns m+2 have "+" polarity, for example in FIG. 31A. From this pixel, the polarity is changed every other pixel between "-" and "+" in the row direction and column direction. For a liquid crystal display that cannot meet the fourth requirement, it is considered that the flickering of the display is seen synchronously with the change of the driving polarity of the pixel between "+" and "-". However, flickering was not seen when the liquid crystal displays of Examples were visually inspected. Therefore, the fourth requirement is satisfied.

按照第五要求来验证。在图31A和31B中，观察相同亮度级的子像素驱动极性，每两行子像素(即，每隔一个像素宽度)反转驱动极性。特别是，例如在n_B行中，在m+1、m+3和m+5列中的子像素为“b(亮)”，并且所有这些子像素的极性为“-”。在n+1_A行中，在m、m+2和m+4列的像素为“b(亮)”，并且所有这些子像素的极性为“-”。在n+1_B行中，在m+1、m+3和m+5列中的子像素为“b(亮)”，并且所有这些子像素的极性为“+”。在n+2_A行中，在m、m+2和m+4列的像素为“b(亮)”，并且所有这些子像素的极性为“+”。对于不满足第五要求的液晶显示器，认为是与像素的驱动极性在“+”和“-”之间变化同步看到显示器的闪动。但是，当目视检验根据本发明的液晶显示器时看不到闪动。因此，满足第五要求。Verify according to the fifth requirement. In FIGS. 31A and 31B , looking at the subpixel drive polarity for the same brightness level, the drive polarity is reversed every two rows of subpixels (ie, every other pixel width). In particular, for example, in row n_B, subpixels in columns m+1, m+3, and m+5 are "b (bright)", and the polarity of all these subpixels is "-". In row n+1_A, pixels at columns m, m+2, and m+4 are "b (bright)", and the polarity of all these sub-pixels is "-". In the n+1_B row, the sub-pixels in the m+1, m+3, and m+5 columns are "b (bright)", and the polarity of all these sub-pixels is "+". In row n+2_A, pixels at columns m, m+2, and m+4 are "b (bright)", and the polarity of all these sub-pixels is "+". For a liquid crystal display that does not meet the fifth requirement, it is considered that the flickering of the display is seen synchronously with the change of the driving polarity of the pixel between "+" and "-". However, flickering was not seen when the liquid crystal display according to the present invention was visually inspected. Therefore, the fifth requirement is satisfied.

当通过改变CS电压的振幅VCSpp来观察根据本实施例的液晶显示器时，在倾斜观察期间，随着显示对比度的抑制(surpressed)，视角特性提高，因为CS电压的振幅VCSpp从0V增加(0V用于支持除了根据本发明液晶显示器之外的普通液晶显示器)。尽管根据显示的图像，视角特性的提高似乎稍有不同，但是当设定VCSpp以使VLCaddpp值在普通驱动模式(VCSpp为0V)的液晶显示器域值电压的0.5-2倍之内时，则实现最佳提高。When the liquid crystal display according to the present embodiment is observed by changing the amplitude VCSpp of the CS voltage, during oblique observation, the viewing angle characteristics are improved as the display contrast is suppressed because the amplitude VCSpp of the CS voltage is increased from 0V (for 0V for supporting general liquid crystal displays other than the liquid crystal display according to the present invention). Although the improvement of the viewing angle characteristics seems to be slightly different depending on the displayed image, when VCSpp is set so that the value of VLCaddpp is within 0.5-2 times the threshold voltage of the LCD in the normal drive mode (VCSpp is 0V), it is achieved Best Improvement.

概括而言，本实施例有可能设定施加给存储电容反电极的振荡电压的振荡周期为液晶显示器水平扫描周期的4倍，液晶显示器通过施加振荡电压给存储电容反电极而提高视角特性，因此，实现多像素显示。甚至在具有CS总线的高负载电容和电阻的大液晶显示器上、在具有短水平扫描周期的高分辨率液晶显示器上、或具有高速驱动和短垂直、水平扫描周期的液晶显示器上，也容易实现多像素显示。In general, in this embodiment, it is possible to set the oscillation period of the oscillating voltage applied to the counter electrode of the storage capacitor as 4 times the horizontal scanning period of the liquid crystal display, and the liquid crystal display improves the viewing angle characteristics by applying the oscillating voltage to the counter electrode of the storage capacitor, so , to achieve multi-pixel display. Even on large LCDs with high load capacitance and resistance of the CS bus, on high-resolution LCDs with short horizontal scan periods, or on LCDs with high-speed drive and short vertical and horizontal scan periods Multi-pixel display.

接下来，参照图32来描述根据本发明第三方面实施例的液晶显示器的结构和操作。Next, the structure and operation of a liquid crystal display according to an embodiment of the third aspect of the present invention will be described with reference to FIG. 32 .

该实施例通过将CS总线的振荡电压的振荡周期设定为水平扫描周期的两倍来实现面积比灰度等级显示。描述将参照附图集中在下列几点上。第一点涉及液晶显示器的结构，围绕连接子像素的存储电容的存储电容反电极和CS总线之间的连接图案定中心。第二点涉及根据栅极总线电压波形的CS总线振荡周期和相位。第三点涉及根据本实施例的子像素的驱动和显示状态。This embodiment realizes area-ratio grayscale display by setting the oscillation period of the oscillation voltage of the CS bus line to twice the horizontal scanning period. The description will focus on the following points with reference to the drawings. The first point concerns the structure of the liquid crystal display, centering around the connection pattern between the storage capacitor counter electrode and the CS bus line connecting the storage capacitors of the sub-pixels. The second point concerns the CS bus oscillation period and phase according to the gate bus voltage waveform. The third point relates to the driving and display states of the sub-pixels according to the present embodiment.

图32是表示根据本发明第三方面实施例的液晶显示器的等效电路的示意图，对应图29。与图29相同的元件用与图29相同的附图标记/符号表示，其中描述省略。图32中的液晶显示器不同于图29中的液晶显示器，其中它具有两个电绝缘的CS干线CSVtypeB1和CSVtypeB2以及在CS干线和CS总线之间的连接状态。FIG. 32 is a schematic diagram showing an equivalent circuit of a liquid crystal display according to an embodiment of the third aspect of the present invention, corresponding to FIG. 29 . The same elements as in FIG. 29 are denoted by the same reference numerals/symbols as in FIG. 29 , and descriptions thereof are omitted. The liquid crystal display in FIG. 32 is different from the liquid crystal display in FIG. 29 in that it has two electrically isolated CS trunk lines CSVtypeB1 and CSVtypeB2 and a connection state between the CS trunk line and the CS bus line.

图32中要注意的第一点是：在列方向相邻行中像素的相邻子像素的CS总线彼此电绝缘。特别是用于n行子像素CLCB_n，m的CS总线CSBL_B_n和用于列方向相邻行像素的子像素CLCA_n+1，m的总线CSBL_A_n+1彼此电绝缘。The first point to be noted in FIG. 32 is that the CS bus lines of adjacent sub-pixels of pixels in adjacent rows in the column direction are electrically insulated from each other. In particular the CS bus line CSBL_B_n for n rows of sub-pixels CLCB_n,m and the bus line CSBL_A_n+1 for sub-pixels CLCA_n+1,m of adjacent rows of pixels in the column direction are electrically insulated from each other.

图32中要注意的第二点是：每个CS总线(CSBL)连接在平板端的两个CS干线(CSVtypeB1和CSVtypeB2)上。即，在根据本实施例的液晶显示器中，有两组电绝缘的CS干线。The second point to note in Figure 32 is that each CS bus (CSBL) is connected to two CS trunks (CSVtypeB1 and CSVtypeB2) on the panel side. That is, in the liquid crystal display according to the present embodiment, there are two sets of electrically insulated CS trunk lines.

图32中要注意的第三点是：在CS总线和两个CS干线(trunk)之间的连接状态，即，沿列方向电绝缘的CS总线的分布。根据图32中CS总线和CS干线的连接规则，连接到CS干线CSVtypeB1和CSVtypeB2上的CS总线如下面的表3所示。The third point to be noted in FIG. 32 is the connection state between the CS bus line and two CS trunk lines (trunks), that is, the distribution of the CS bus lines electrically insulated in the column direction. According to the connection rules of the CS bus and the CS trunk line in FIG. 32, the CS buses connected to the CS trunk lines CSVtypeB1 and CSVtypeB2 are shown in Table 3 below.

[表3][table 3]

CS干线 CS Trunk 连接CS干线的CS总线 CS bus connected to CS trunk 左边引出的CS总线的通用符号 Generic symbol for the CS bus drawn on the left CSVtypeB1CSVtypeB1     CSBL_A_n，CSBL_A_n+1，CSBL_A_n+2，CSBL_A_n+3，… CSBL_A_n, CSBL_A_n+1, CSBL_A_n+2, CSBL_A_n+3,... CSBL_A_n+k，(k＝0，1，2，3，…)CSBL_A_n+k, (k=0, 1, 2, 3, ...) CSVtypeB2CSVtypeB2     CSBL_B_n，CSBL_B_n+1，CSBL_B_n+2，CSBL_B_n+3，… CSBL_B_n, CSBL_B_n+1, CSBL_B_n+2, CSBL_B_n+3,... CSBL_B_n+k，(k＝0，1，2，3，…)CSBL_B_n+k, (k=0, 1, 2, 3, ...)

两组电绝缘的CS总线分别连接到上面表3中所示的两个CS干线上。Two sets of galvanically isolated CS buses are respectively connected to the two CS trunks shown in Table 3 above.

图33A和33B表示根据栅极总线电压波形的CS总线振荡周期和相位，并示出子像素电极的电压。图33A和33B对应于前面实施例的图30A和30B。与图30A和30B相同的元件用与图30A和30B相同的附图标记/符号表示，其中描述省略。液晶显示器一般以规则的时间间隔反转施加到每个像素的液晶层上的电场方向，因此，需要考虑对应于电场方向的两种类型的驱动电压波形。图33A和33B中分别表示这两种类型的驱动状态。33A and 33B show the CS bus oscillation cycle and phase according to the gate bus voltage waveform, and show the voltage of the sub-pixel electrode. 33A and 33B correspond to FIGS. 30A and 30B of the previous embodiment. The same elements as in FIGS. 30A and 30B are denoted by the same reference numerals/symbols as in FIGS. 30A and 30B , and descriptions thereof are omitted. A liquid crystal display generally reverses the direction of an electric field applied to a liquid crystal layer of each pixel at regular time intervals, and thus, two types of driving voltage waveforms corresponding to the direction of the electric field need to be considered. These two types of driving states are shown in Figs. 33A and 33B, respectively.

在图33A和33B中要注意的第一点是：CSVtypeB1和CSVtypeB2的电压VCSVtypeB1和VCSVtypeB2的振荡周期全都是水平扫描周期的2倍(2H)。The first point to be noted in FIGS. 33A and 33B is that the oscillation periods of the voltages VCSVtypeB1 and VCSVtypeB2 of CSVtypeB1 and CSVtypeB2 are both twice (2H) the horizontal scanning period.

在图33A和33B中要注意的第二点是：VCSVtypeB1和VCSVtypeB2的相位如下。首先，比较CS干线中的相位，VCSVtypeB2比VCSVtypeB1落后1H。接下来，观察CS干线的电压和栅极总线的电压，CS干线电压和栅极总线电压的相位如下。如图33A和33B所示，对应于各个CS干线的栅极总线的电压从VgH变为VgL的时间与CS干线的平坦部分到达它们中心的时间一致。换句话说，图33A和33B中的Td值是0.5H。但是，Td值是大于0H小于1H的任何值。The second point to note in FIGS. 33A and 33B is that the phases of VCSVtypeB1 and VCSVtypeB2 are as follows. First, comparing the phases in the CS trunk, VCSVtypeB2 is 1H behind VCSVtypeB1. Next, observing the voltage of the CS rail and the voltage of the gate bus, the phases of the CS rail voltage and the gate bus voltage are as follows. As shown in Figures 33A and 33B, the timing of the voltage of the gate bus corresponding to the respective CS rails from VgH to VgL coincides with the time when the flat portions of the CS rails reach their centers. In other words, the Td value in FIGS. 33A and 33B is 0.5H. However, the Td value is any value greater than 0H and less than 1H.

这里，对应于各个CS干线的栅极总线是CS总线经过辅助电容CS和TFT元件连接相同子像素电极的CS干线和栅极总线。根据图33A和33B，对应于这个液晶显示器中的每个CS干线的栅极总线和CS总线在下面的表2中表示。Here, the gate bus line corresponding to each CS main line is the CS main line and the gate bus line connected to the same sub-pixel electrode via the auxiliary capacitor CS and the TFT element. According to FIGS. 33A and 33B, the gate bus lines and CS bus lines corresponding to each CS trunk line in this liquid crystal display are shown in Table 2 below.

[表4][Table 4]

CS干线 CS Trunk 相应的栅极总线 corresponding gate bus 相应的CS总线 Corresponding CS bus CSVtypeB1CSVtypeB1 GBL_n，GBL_n+1，GBL_n+2，GBL_n+3，GBL_n+4，….....................[GBL_n+k(k＝0，1，2，3，…)]GBL_n, GBL_n+1, GBL_n+2, GBL_n+3, GBL_n+4, ...................[GBL_n+k(k=0, 1 ,2,3,…)] CSBL_A_n，CSBL_A_n+1，CSBL_A_n+2，CSBL_A_n+3，CSBL_A_n+4，….....................[CSBL_A_n+k(k＝0，1，2，3，…)]CSBL_A_n, CSBL_A_n+1, CSBL_A_n+2, CSBL_A_n+3, CSBL_A_n+4, ...................[CSBL_A_n+k(k=0, 1 ,2,3,…)] CSVtypeB2CSVtypeB2   GBL_n，GBL_n+1，GBL_n+2，GBL_n+3，GBL_n+4，…....................[GBL_n+k(k＝0，1，2，3，…)] GBL_n, GBL_n+1, GBL_n+2, GBL_n+3, GBL_n+4, ...................[GBL_n+k(k=0, 1, 2, 3, ...)]     CSBL_B_n，CSBL_B_n+1，CSBL_B_n+2，CSBL_B_n+3，CSBL_B_n+4，…...................................[CSBL_B_n+k(k＝0，1，2，3，…)] CSBL_B_n, CSBL_B_n+1, CSBL_B_n+2, CSBL_B_n+3, CSBL_B_n+4, ................................... ....[CSBL_B_n+k(k=0, 1, 2, 3,...)]

尽管参照图33A和33B描述了CS干线的电压周期和相位，但是CS干线的电压波形不限于此。CS干线可以是满足下列两个条件的其它波形。Although the voltage period and phase of the CS main line are described with reference to FIGS. 33A and 33B , the voltage waveform of the CS main line is not limited thereto. The CS trunk can be other waveforms satisfying the following two conditions.

第一个条件是：对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeB1的第一变化是电压升高，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeB2的第一变化是电压降低。图33A满足这个条件。The first condition is: the first change of the voltage VCSVtypeB1 after the voltage of the gate bus line changes from VgH to VgL is a voltage rise, and the first change of the voltage VCSVtypeB2 after the voltage of the gate bus line changes from VgH to VgL is The voltage drops. Figure 33A satisfies this condition.

第二个条件是：对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeB1的第一变化是电压降低，对应栅极总线的电压从VgH变为VgL后的电压VCSVtypeB2的第一变化是电压升高。图33B满足这个条件。The second condition is: the first change of the voltage VCSVtypeB1 corresponding to the voltage of the gate bus from VgH to VgL is a voltage drop, and the first change of the voltage VCSVtypeB2 corresponding to the voltage of the gate bus from VgH to VgL is a voltage raised. Figure 33B satisfies this condition.

图34A和34B概述根据本实施例的液晶显示器的驱动状态。根据子像素驱动电压的极性，液晶显示器的驱动状态也分为两种类型，如图34A和34B所示的情形。图34A中的驱动状态对应于图33A的驱动电压波形，而图34B中的状态对应于图33B驱动电压波形的驱动状态。图34A和34B对应于前述实施例的图31A和31B。34A and 34B outline the driving state of the liquid crystal display according to this embodiment. According to the polarity of the sub-pixel driving voltage, the driving state of the liquid crystal display is also divided into two types, as shown in FIGS. 34A and 34B . The driving state in FIG. 34A corresponds to the driving voltage waveform of FIG. 33A, and the state in FIG. 34B corresponds to the driving state of the driving voltage waveform of FIG. 33B. 34A and 34B correspond to FIGS. 31A and 31B of the foregoing embodiment.

图34A和34B的注意点是，是否满足面积比灰度等级板的要求。面积比灰度等级板具有五个要求The attention point of Fig. 34A and Fig. 34B is whether to satisfy the requirement of area ratio gray level plate. Area ratio gray scale board has five requirements

第一要求是当显示中间灰度等级时，每个像素由多个不同亮度子像素组成。The first requirement is that when displaying intermediate gray levels, each pixel consists of a number of sub-pixels of different brightness.

第二要求是不管时间，亮度不同的子像素亮度级不变。The second requirement is that the luminance levels of sub-pixels with different luminances remain unchanged regardless of time.

第三要求是不同亮度的子像素精巧地排列。The third requirement is the delicate arrangement of sub-pixels with different brightness.

第四要求是在所有帧中相反极性的像素精巧地排列。A fourth requirement is that pixels of opposite polarity be neatly aligned in all frames.

第五要求是在所有帧中相同极性、相同亮度级(尤其是最亮的子像素)的子像素精巧地排列。A fifth requirement is a delicate arrangement of sub-pixels of the same polarity, same brightness level (especially the brightest sub-pixel) in all frames.

按照第一要求来验证。在图34A和34B中，每个像素由两个亮度不同的子像素组成。特别是，例如在图34A中，n行和m列的像素由表示为“b(亮)”的高亮度子像素和表示为“d(暗)”的低亮度子像素组成。因此，满足第一要求。Verify according to the first requirement. In FIGS. 34A and 34B, each pixel is composed of two sub-pixels with different brightness. In particular, for example, in FIG. 34A , the pixels of n rows and m columns are composed of high-brightness sub-pixels denoted "b (bright)" and low-brightness sub-pixels denoted "d (dark)". Therefore, the first requirement is met.

按照第二要求来验证。本实施例的液晶显示器以规则时间间隔交替不同驱动状态的两种显示状态。图34A和34B表示对应于两个显示状态的驱动状态符合高亮度子像素和低亮度子像素的位置。因此，满足第二要求。Verify according to the second requirement. The liquid crystal display of this embodiment alternates between two display states of different drive states at regular time intervals. Figures 34A and 34B show that the drive states corresponding to the two display states correspond to the positions of the high-intensity sub-pixels and the low-intensity sub-pixels. Therefore, the second requirement is satisfied.

按照第三要求来验证。在图34A和34B中，不同亮度级的子像素(即，表示为“b(亮)”的子像素和表示为“d(暗)”的子像素)按棋盘格式排列。液晶显示器的目视观察看不出显示问题，例如由于不同亮度子像素降低分辨率。因此，满足第三要求。Verify according to the third requirement. In FIGS. 34A and 34B , subpixels of different brightness levels (ie, subpixels denoted "b (bright)" and subpixels denoted "d (dark)") are arranged in a checkerboard format. Visual observations of LCDs do not reveal display problems, such as reduced resolution due to different brightness sub-pixels. Therefore, the third requirement is satisfied.

按照第四要求来验证。在图34A和34B中，相反极性的像素排列成棋盘格式。特别是，例如在图34A中，在n+2行和m+2列中的像素具有“+”极性。从这个像素开始，沿行方向和列方向在“-”和“+”之间每隔一个像素改变极性。对于不能满足第四要求的液晶显示器，认为是与像素的驱动极性在“+”和“-”之间变化同步看到显示器的闪动。但是，当目视检验本实施例的液晶显示器时看不到闪动。因此，满足第四要求。Verify according to the fourth requirement. In Figures 34A and 34B, pixels of opposite polarity are arranged in a checkerboard format. In particular, pixels in rows n+2 and columns m+2 have "+" polarity, such as in FIG. 34A. From this pixel, the polarity is changed every other pixel between "-" and "+" in the row direction and column direction. For a liquid crystal display that cannot meet the fourth requirement, it is considered that the flickering of the display is seen synchronously with the change of the driving polarity of the pixel between "+" and "-". However, flickering was not seen when the liquid crystal display of this example was visually inspected. Therefore, the fourth requirement is satisfied.

按照第五要求来验证。在图34A和34B中，观察相同亮度级的子像素驱动极性，每两行子像素(即，每隔一个像素宽度)反转驱动极性。特别是，例如在n_B行中，在m+1、m+3和m+5列中的子像素为“b(亮)”，并且所有这些子像素的极性为“-”。在n+1_A行中，在m、m+2和m+4列的像素为“b(亮)”，并且所有这些子像素的极性为“-”。在n+1_B行中，在m+1、m+3和m+5列中的子像素为“b(亮)”，并且所有这些子像素的极性为“+”。在n+2_A行中，在m、m+2和m+4列的像素为“b(亮)”，并且所有这些子像素的极性为“+”。对于不满足第五要求的液晶显示器，认为是与像素的驱动极性在“+”和“-”之间变化同步看到显示器的闪动。但是，当目视检验根据本发明的液晶显示器时看不到闪动。因此，满足第五要求。Verify according to the fifth requirement. In FIGS. 34A and 34B , looking at the subpixel drive polarity for the same brightness level, the drive polarity is reversed every two rows of subpixels (ie, every other pixel width). In particular, for example, in row n_B, subpixels in columns m+1, m+3, and m+5 are "b (bright)", and the polarity of all these subpixels is "-". In row n+1_A, pixels at columns m, m+2, and m+4 are "b (bright)", and the polarity of all these sub-pixels is "-". In the n+1_B row, the sub-pixels in the m+1, m+3, and m+5 columns are "b (bright)", and the polarity of all these sub-pixels is "+". In row n+2_A, pixels at columns m, m+2, and m+4 are "b (bright)", and the polarity of all these sub-pixels is "+". For a liquid crystal display that does not meet the fifth requirement, it is considered that the flickering of the display is seen synchronously with the change of the driving polarity of the pixel between "+" and "-". However, flickering was not seen when the liquid crystal display according to the present invention was visually inspected. Therefore, the fifth requirement is satisfied.

当根据本实施例的液晶显示器被发明者等人改变CS电压的振幅VCSpp时，在倾斜观察期间，随着显示对比度的抑制，视角特性提高，因为CS电压的振幅VCSpp从0V增加(0V用于支持除了根据本发明液晶显示器之外的普通液晶显示器)。但是，进一步增加VSCpp值存在降低显示对比度的问题。因此，VSCpp值仅设定到充分提高视角特性不出现问题的范围。尽管根据显示的图像，视角特性的提高似乎稍有不同，但是当设定VCSpp以使VLCaddpp值在普通驱动模式(VCSpp为0V)的液晶显示器域值电压的0.5-2倍之内时，则实现最佳提高。When the liquid crystal display according to the present embodiment is changed by the inventor et al., the amplitude VCSpp of the CS voltage, during oblique observation, the viewing angle characteristics are improved with the suppression of the display contrast because the amplitude VCSpp of the CS voltage is increased from 0V (0V is used for Ordinary liquid crystal displays other than the liquid crystal display according to the present invention are supported). However, further increasing the value of VSCpp has a problem of lowering display contrast. Therefore, the VSCpp value is set only to a range in which the viewing angle characteristics are sufficiently improved without causing problems. Although the improvement of the viewing angle characteristics seems to be slightly different depending on the displayed image, when VCSpp is set so that the value of VLCaddpp is within 0.5-2 times the threshold voltage of the LCD in the normal drive mode (VCSpp is 0V), it is achieved Best Improvement.

概括而言，本实施例有可能设定施加给存储电容反反电极振荡电压的振荡周期为液晶显示器水平扫描周期的2倍，液晶显示器通过施加振荡电压给存储电容反电极而提高视角特性，因此，实现多像素显示。即使在具有CS总线的高负载电容和电阻的大液晶显示器上、在具有短水平扫描周期的高分辨率液晶显示器上、或具有高速驱动和短垂直、水平扫描周期的液晶显示器上，也容易实现多像素显示。In general, in this embodiment, it is possible to set the oscillation period of the oscillating voltage applied to the storage capacitor’s counter electrode as twice the horizontal scan period of the liquid crystal display, and the liquid crystal display improves the viewing angle characteristics by applying the oscillating voltage to the storage capacitor’s counter electrode, so , to achieve multi-pixel display. Easy implementation even on large LCDs with high load capacitance and resistance of the CS bus, on high-resolution LCDs with short horizontal scan periods, or on LCDs with high-speed drive and short vertical and horizontal scan periods Multi-pixel display.

尽管在上述实施例中，CS干线电绝缘(组)数是4或2，但是根据发明第三方面实施例的液晶显示器的CS干线电绝缘(组)数不限于这些，可以是3、5或大于5。但是，优选电绝缘CS干线数L是偶数。这是因为当电绝缘CS干线组成CS干线对并相互供给超出180度相位的振荡电压(意味着L是偶数)时，可能使流过存储电容反电极的电流量最小。Although in the above-mentioned embodiment, the number of electrical insulation (groups) of CS trunk lines is 4 or 2, the number of electrical insulation (groups) of CS trunk lines of the liquid crystal display according to the embodiment of the third aspect of the invention is not limited to these, and may be 3, 5 or greater than 5. However, it is preferable that the number L of electrically isolated CS trunk lines is an even number. This is because it is possible to minimize the amount of current flowing through the storage capacitor counter-electrodes when electrically isolated CS rails form pairs of CS rails and mutually supply oscillating voltages out of 180 degree phase (meaning that L is an even number).

下面的表5和6表示在电绝缘CS干线的数量L是6或8的情形，对应栅极总线和CS总线的CS干线关系。当L是偶数时，对应栅极总线和CS总线的CS干线的关系粗略地分成L/2是奇数(L＝2，6，10，14...)的情形和L/2是偶数(L＝4，8，12，16...)的情形。在L/2是奇数的情形中的一般关系在下面的表5中描述，而在L/2是偶数的情形中的一般关系在下面的表6中描述，其中L＝8。Tables 5 and 6 below show the relationship of the CS rails corresponding to the gate bus line and the CS bus line in the case where the number L of electrically isolated CS rail lines is 6 or 8. When L is an even number, the relationship of the CS trunk line corresponding to the gate bus line and the CS bus line is roughly divided into the case where L/2 is an odd number (L=2, 6, 10, 14...) and the case where L/2 is an even number (L = 4, 8, 12, 16...). The general relationship in the case where L/2 is odd is described in Table 5 below, and the general relationship in the case where L/2 is even is described in Table 6 below, where L=8.

[表5][table 5]

CS干线 CS Trunk   对应的栅极总线 Corresponding gate bus     对应的CS总线 Corresponding CS bus CSVtypeC1CSVtypeC1   GBL_n，GBL_n+3，GBL_n+6，GBL_n+9，GBL_n+12，…......................[GBL_n+3·k(k＝0，1，2，3，…)] GBL_n, GBL_n+3, GBL_n+6, GBL_n+9, GBL_n+12, ...................[GBL_n+3·k(k= 0, 1, 2, 3, ...)]     CSBL_A_n，CSBL_A_n+3，CSBL_A_n+6，CSBL_A_n+9，CSBL_A_n+12，…............................[CSBL_A_n+3·k，(k＝0，1，2，3，…)] CSBL_A_n, CSBL_A_n+3, CSBL_A_n+6, CSBL_A_n+9, CSBL_A_n+12, ...................................[CSBL_A_n+ 3·k, (k=0, 1, 2, 3, ...)] CSVtypeC2CSVtypeC2   GBL_n，GBL_n+3，GBL_n+6，GBL_n+9，GBL_n+12，…......................[GBL_n+3·k(k＝0，1，2，3，…)] GBL_n, GBL_n+3, GBL_n+6, GBL_n+9, GBL_n+12, ...................[GBL_n+3·k(k= 0, 1, 2, 3, ...)]     CSBL_B_n，CSBL_B_n+3，CSBL_B_n+G，CSBL_B_n+9，CSBL_B_n+12，…............................[CSBL_B_n+3·k(k＝0，1，2，3，…)] CSBL_B_n, CSBL_B_n+3, CSBL_B_n+G, CSBL_B_n+9, CSBL_B_n+12, ...................................[CSBL_B_n+ 3·k (k=0, 1, 2, 3, ...)] CSVtypeC3CSVtypeC3   GBL_n+1，GBL_n+4，GBL_n+7，GBL_n+10，GBL_n+13，….......................[GBL_n+1+3·k(k＝0，1，2，3，…)] GBL_n+1, GBL_n+4, GBL_n+7, GBL_n+10, GBL_n+13, ....................[GBL_n+1+3 k (k=0, 1, 2, 3, ...)]     CSBL_A_n+1，CSBL_A_n+4，CSBL_A_n+7，CSBL_A_n+10，CSBL_A_n+13，…...........................[CSBL_A_n+1+3·k(k＝0，1，2，3，…)] CSBL_A_n+1, CSBL_A_n+4, CSBL_A_n+7, CSBL_A_n+10, CSBL_A_n+13, ...................................[CSBL_A_n +1+3·k(k=0, 1, 2, 3,...)] CSVtypeC4CSVtypeC4   GBL_n+1，GBL_n+4，GBL_n+7，GBL_n+10，GBL_n+13，…......................[GBL_n+1+3·k(k＝0，1，2，3，…)] GBL_n+1, GBL_n+4, GBL_n+7, GBL_n+10, GBL_n+13, ...................[GBL_n+1+3· k(k=0,1,2,3,...)]     CSBL_B_n+1，CSBL_B_n+4，CSBL_B_n+7，CSBL_B_n+10，CSBL_B_n+13，….........................[CSBL_B_n+1+3·k(k＝0，1，2，3，…)] CSBL_B_n+1, CSBL_B_n+4, CSBL_B_n+7, CSBL_B_n+10, CSBL_B_n+13, ...................................[CSBL_B_n+1 +3·k (k=0, 1, 2, 3, ...)] CSVtypeC5CSVtypeC5   GBL_n+2，GBL_n+5，GBL_n+8，GBL_n+11，GBL_n+14，….......................[GBL_n+2+3·k(k＝0，1，2，3，…)] GBL_n+2, GBL_n+5, GBL_n+8, GBL_n+11, GBL_n+14, ....................[GBL_n+2+3 k (k=0, 1, 2, 3, ...)]     CSBL_A_n+2，CSBL_A_n+5，CSBL_A_n+8，CSBL_A_n+11，CSBL_A_n+14，…..........................[CSBL_A_n+2+3·k(k＝0，1，2，3，…)] CSBL_A_n+2, CSBL_A_n+5, CSBL_A_n+8, CSBL_A_n+11, CSBL_A_n+14, ...................................[CSBL_A_n+ 2+3·k (k=0, 1, 2, 3, ...)] CSVtypeC6CSVtypeC6   GBL_n+2，GBL_n+5，GBL_n+8，GBL_n+11，GBL_n+14，….........................[GBL_n+2+3·k(k＝0，1，2，3，…)] GBL_n+2, GBL_n+5, GBL_n+8, GBL_n+11, GBL_n+14, ...................................[GBL_n+2 +3·k (k=0, 1, 2, 3, ...)]     CSBL_B_n+2，CSBL_B_n+5，CSBL_B_n+8，CSBL_B_n+11，CSBL_B_n+14，…..........................[CSBL_B_n+2+3·k(k＝0，1，2，3，…)] CSBL_B_n+2, CSBL_B_n+5, CSBL_B_n+8, CSBL_B_n+11, CSBL_B_n+14, ...................................[CSBL_B_n+ 2+3·k (k=0, 1, 2, 3, ...)]

当电绝缘CS干线数L的1/2是奇数时，即L＝2，6，10等，如果连接到像素的第一子像素的存储电容反电极上的存储电容线表示为CSBL_A_n，其中像素位于任意列和在按行列矩阵排列的多个像素形成的行中给定行n的交叉点处，如果连接到第二子像素的存储电容反电极上的存储电容线表示为CSBL_B_n，和如果k是自然数(包括0)：When 1/2 of the number L of electrically insulated CS main lines is an odd number, that is, L=2, 6, 10, etc., if the storage capacitor line connected to the storage capacitor counter electrode of the first sub-pixel of the pixel is represented as CSBL_A_n, wherein the pixel At the intersection of any column and a given row n in a row formed by a plurality of pixels arranged in a row-column matrix, if the storage capacitor line connected to the storage capacitor counter electrode of the second subpixel is denoted as CSBL_B_n, and if k are natural numbers (including 0):

CSBL_A_n+(L/2)*k连接到第一存储电容干线上，CSBL_A_n+(L/2)*k is connected to the first storage capacitor rail,

CSBL_B_n+(L/2)*k连接到第二存储电容干线上，CSBL_B_n+(L/2)*k is connected to the second storage capacitor rail,

CSBL_A_n+1+(L/2)*k连接到第三存储电容干线上，CSBL_A_n+1+(L/2)*k is connected to the third storage capacitor rail,

CSBL_B_n+1+(L/2)*k连接到第四存储电容干线上，CSBL_B_n+1+(L/2)*k is connected to the fourth storage capacitor rail,

CSBL_A_n+2+(L/2)*k连接到第五存储电容干线上，CSBL_A_n+2+(L/2)*k is connected to the fifth storage capacitor rail,

CSBL_B_n+2+(L/2)*k连接到第六存储电容干线上，CSBL_B_n+2+(L/2)*k is connected to the sixth storage capacitor rail,

...重复类似的连接，...repeating similar connections,

CSBL_A_n+(L/2)-2+(L/2)*k连接到第(L-3)存储电容干线上，CSBL_A_n+(L/2)-2+(L/2)*k is connected to the (L-3)th storage capacitor rail,

CSBL_B_n+(L/2)-2+(L/2)*k连接到第(L-2)存储电容干线上，CSBL_B_n+(L/2)-2+(L/2)*k is connected to the (L-2)th storage capacitor rail,

CSBL_A_n+(L/2)-1+(L/2)*k连接到第(L-1)存储电容干线上，CSBL_A_n+(L/2)-1+(L/2)*k is connected to the (L-1)th storage capacitor rail,

CSBL_B_n+(L/2)-1+(L/2)*k连接到第L存储电容干线上。CSBL_B_n+(L/2)-1+(L/2)*k is connected to the Lth storage capacitor rail.

[表6][Table 6]

  CS干线 CS Trunk  相应的栅极总线 corresponding gate bus   相应的CS总线 Corresponding CS bus CSVtypeD1CSVtypeD1  GBL_n，GBL_n+4，GBL_n+8，GBL_n+12，GBL_n+16，….......................[GBL_n+4·k(k＝0，1，2，3，…)] GBL_n, GBL_n+4, GBL_n+8, GBL_n+12, GBL_n+16, ...................................[GBL_n+4·k(k = 0, 1, 2, 3, ...)]   CSBL_A_n，CSBL_B_n+4，CSBL_A_n+8，CSBL_B_n+12，CSBL_A_n+16，….............................[CSBL_A_n+8·k，CSBL_B_n+4+8·k，(k＝0，1，2，3，…)] CSBL_A_n, CSBL_B_n+4, CSBL_A_n+8, CSBL_B_n+12, CSBL_A_n+16, ...................................[CSBL_A_n +8·k, CSBL_B_n+4+8·k, (k=0, 1, 2, 3, ...)] CSVtypeD2CSVtypeD2  GBL_n，GBL_n+4，GBL_n+8，GBL_n+12，GBL_n+16，….......................[GBL_n+4·k(k＝0，1，2，3，…)] GBL_n, GBL_n+4, GBL_n+8, GBL_n+12, GBL_n+16, ...................................[GBL_n+4·k(k = 0, 1, 2, 3, ...)]   CSBL_B_n，CSBL_A_n+4，CSBL_B_n+8，CSBL_A_n+12，CSBL_B_n+16，…..............................[CSBL_B_n+8·k，CSBL_A_n+4+8·k(k＝0，1，2，3，…)] CSBL_B_n, CSBL_A_n+4, CSBL_B_n+8, CSBL_A_n+12, CSBL_B_n+16, ...................................[ CSBL_B_n+8·k, CSBL_A_n+4+8·k (k=0, 1, 2, 3, ...)] CSVtypeD3CSVtypeD3  GBL_n+1，GBL_n+5，GBL_n+9，GBL_n+13，GBL_n+17，…........................[GBL_n+1+4·k(k＝0，1，2，3，…)] GBL_n+1, GBL_n+5, GBL_n+9, GBL_n+13, GBL_n+17, ...................................[GBL_n+1+ 4·k (k=0, 1, 2, 3, ...)]   CSBL_A_n+1，CSBL_B_n+5，CSBL_A_n+9，CSBL_B_n+13，CSBL_A_n+17，…..................................[CSBL_A_n+1+8·k，CSBL_B_n+5+8·k，(k＝0，1，2，3，…)] CSBL_A_n+1, CSBL_B_n+5, CSBL_A_n+9, CSBL_B_n+13, CSBL_A_n+17, ................................... .....[CSBL_A_n+1+8·k, CSBL_B_n+5+8·k, (k=0, 1, 2, 3, ...)] CSVtypeD4CSVtypeD4  GBL_n+1，GBL_n+5，GBL_n+9，GBL_n+13，GBL_n+17，….......................[GBL_n+1+4·k(k＝0，1，2，3，…)] GBL_n+1, GBL_n+5, GBL_n+9, GBL_n+13, GBL_n+17, ....................[GBL_n+1+4 k (k=0, 1, 2, 3, ...)]   CSBL_B_n+1，CSBL_A_n+5，CSBL_B_n+9，CSBL_A_n+13，CSBL_B_n+17，…...............................[CSBL_B_n+1+8·k，CSBL_A_n+5+8·k(k＝0，1，2，3，…)] CSBL_B_n+1, CSBL_A_n+5, CSBL_B_n+9, CSBL_A_n+13, CSBL_B_n+17, ................................... ..[CSBL_B_n+1+8·k, CSBL_A_n+5+8·k(k=0, 1, 2, 3, ...)] CSVtypeD5CSVtypeD5  GBL_n+2，GBL_n+6，GBL_n+10，GBL_n+14，GBL_n+18，…......................[GBL_n+2+4·k(k＝0，1，2，3，…)] GBL_n+2, GBL_n+6, GBL_n+10, GBL_n+14, GBL_n+18, ...................[GBL_n+2+4· k(k=0,1,2,3,...)]   CSBL_A_n+2，CSBL_B_n+6，CSBL_A_n+10，CSBL_B_n+14，CSBL_A_n+18，…................................[CSBL_A_n+2+8·k，CSBL_B_n+6+8·k(k＝0，1，2，3，…)] CSBL_A_n+2, CSBL_B_n+6, CSBL_A_n+10, CSBL_B_n+14, CSBL_A_n+18, ................................... ...[CSBL_A_n+2+8·k, CSBL_B_n+6+8·k(k=0, 1, 2, 3, ...)] CSVtypeD6CSVtypeD6  GBL_n+2，GBL_n+6，GBL_n+10，GBL_n+14，GBL_n+18，…....................[GBL_n+2+4·k(k＝0，1，2，3，…)] GBL_n+2, GBL_n+6, GBL_n+10, GBL_n+14, GBL_n+18, ...................[GBL_n+2+4·k( k=0, 1, 2, 3, ...)]   CSBL_B_n+2，CSBL_A_n+6，CSBL_B_n+10，CSBL_A_n+14，CSBL_B_n+18，….................................[CSBL_B_n+2+8·k，CSBL_A_n+6+8·k(k＝0，1，2，3，…)] CSBL_B_n+2, CSBL_A_n+6, CSBL_B_n+10, CSBL_A_n+14, CSBL_B_n+18, ................................... ....[CSBL_B_n+2+8·k, CSBL_A_n+6+8·k(k=0, 1, 2, 3, ...)] CSVtypeD7CSVtypeD7  GBL_n+3，GBL_n+7，GBL_n+11，GBL_n+15，GBL_n+19，….........................[GBL_n+3+4·k(k＝0，1，2，3，…)] GBL_n+3, GBL_n+7, GBL_n+11, GBL_n+15, GBL_n+19, ...................................[GBL_n+3 +4·k (k=0, 1, 2, 3, ...)]   CSBL_A_n+3，CSBL_B_n+7，CSBL_A_n+11，CSBL_B_n+15，CSBL_A_n+19，….............................[CSBL_A_n+3+8·k，CSBL_B_n+7+8·k(k＝0，1，2，3，…)] CSBL_A_n+3, CSBL_B_n+7, CSBL_A_n+11, CSBL_B_n+15, CSBL_A_n+19, ................................... [CSBL_A_n+3+8·k, CSBL_B_n+7+8·k (k=0, 1, 2, 3, ...)] CSVtypeC8CSVtypeC8  GBL_n+3，GBL_n+7，GBL_n+11，GBL_n+15，GBL_n+19，…......................[GBL_n+3+4·k(k＝0，1，2，3，…)] GBL_n+3, GBL_n+7, GBL_n+11, GBL_n+15, GBL_n+19, ...................[GBL_n+3+4· k(k=0,1,2,3,...)]   CSBL_B_n+3，CSBL_A_n+7，CSBL_B_n+11，CSBL_A_n+15，CSBL_B_n+19，…...................................[CSBL_B_n+3+8·k，CSBL_A_n+7+8·k(k＝0，1，2，3，…)] CSBL_B_n+3, CSBL_A_n+7, CSBL_B_n+11, CSBL_A_n+15, CSBL_B_n+19, ................................... ......[CSBL_B_n+3+8·k, CSBL_A_n+7+8·k (k=0, 1, 2, 3, ...)]

当电绝缘存储电容干线数L的1/2是偶数时，即，L＝4，8，12等，如果连接到像素的第一子像素的存储电容反电极上的存储电容线表示为CSBL_A_n，其中像素位于任意列和在按行列矩阵排列的多个像素形成的行中给定行n的交叉点处，如果连接到第二子像素的存储电容反电极上的存储电容线表示为CSBL_B_n，和如果k是自然数(包括0)：When 1/2 of the number L of electrically insulating storage capacitor trunk lines is an even number, that is, L=4, 8, 12, etc., if the storage capacitor line connected to the storage capacitor counter-electrode of the first sub-pixel of the pixel is represented as CSBL_A_n, where a pixel is located at the intersection of an arbitrary column and a given row n in a row formed by a plurality of pixels arranged in a row-column matrix, if the storage capacitor line connected to the storage capacitor counter electrode of the second sub-pixel is denoted as CSBL_B_n, and If k is a natural number (including 0):

CSBL_A_n+L*k和CSBL_B_n+(L/2)+L*k连接到第一存储电容干线上，CSBL_A_n+L*k and CSBL_B_n+(L/2)+L*k are connected to the first storage capacitor rail,

CSBL_B_n+L*k和CSBL_A_n+(L/2)+L*k连接到第二存储电容干线上，CSBL_B_n+L*k and CSBL_A_n+(L/2)+L*k are connected to the second storage capacitor rail,

CSBL_A_n+1+L*k和CSBL_B_n+(L/2)+1+L*k连接到第三存储电容干线上，CSBL_A_n+1+L*k and CSBL_B_n+(L/2)+1+L*k are connected to the third storage capacitor rail,

CSBL_B_n+1+L*k和CSBL_A_n+(L/2)+1+L*k连接到第四存储电容干线上，CSBL_B_n+1+L*k and CSBL_A_n+(L/2)+1+L*k are connected to the fourth storage capacitor rail,

CSBL_A_n+2+L*k和CSBL_B_n+(L/2)+2+L*k连接到第五存储电容干线上，CSBL_A_n+2+L*k and CSBL_B_n+(L/2)+2+L*k are connected to the fifth storage capacitor rail,

CSBL_B_n+2+L*k和CSBL_A_n+(L/2)+2+L*k连接到第六存储电容干线上，CSBL_B_n+2+L*k and CSBL_A_n+(L/2)+2+L*k are connected to the sixth storage capacitor rail,

CSBL_A_n+3+L*k和CSBL_B_n+(L/2)+3+L*k连接到第七存储电容干线上，CSBL_A_n+3+L*k and CSBL_B_n+(L/2)+3+L*k are connected to the seventh storage capacitor rail,

CSBL_B_n+3+L*k和CSBL_A_n+(L/2)+3+L*k连接到第八存储电容干线上，CSBL_B_n+3+L*k and CSBL_A_n+(L/2)+3+L*k are connected to the eighth storage capacitor rail,

…重复类似的连接，...repeating similar connections,

CSBL_A_n+(L/2)-2+(L/2)*k和CSBL_B_n+L-2+L*k连接到第(L-3)存储电容干线上，CSBL_A_n+(L/2)-2+(L/2)*k and CSBL_B_n+L-2+L*k are connected to the (L-3)th storage capacitor rail,

CSBL_B_n+(L/2)-2+(L/2)*k和CSBL_A_n+L-2+L*k连接到第(L-2)存储电容干线上，CSBL_B_n+(L/2)-2+(L/2)*k and CSBL_A_n+L-2+L*k are connected to the (L-2)th storage capacitor rail,

CSBL_A_n+(L/2)-1+(L/2)*k和CSBL_B_n+L-1+L*k连接到第(L-1)存储电容干线上，CSBL_A_n+(L/2)-1+(L/2)*k and CSBL_B_n+L-1+L*k are connected to the (L-1)th storage capacitor rail,

CSBL_B_n+(L/2)-1+(L/2)*k和CSBL_A_n+L-1+L*k连接到第L存储电容干线上。CSBL_B_n+(L/2)−1+(L/2)*k and CSBL_A_n+L−1+L*k are connected to the Lth storage capacitor rail.

如上所述，本发明的第三方面使得容易应用多像素液晶显示器，其在倾斜观看大液晶显示器、高分辨率液晶显示器和高速驱动及短垂直、水平扫描周期的液晶显示器期间，能大大地提高显示对比度。因为通过增加施加到CS总线上的电压振荡周期，可能容易有下列问题：增加将振荡电压施加到CS总线的多像素液晶显示器的尺寸、增加CS总线的负载电容和电阻、钝化CS总线电压的波形；和增加液晶显示器的分辨率和驱动速度、减小CS总线的振荡周期、增加波形钝化的影响并造成显示屏中VLCadd的有效值明显变化，因此造成显示不规则。As described above, the third aspect of the present invention makes it easy to apply multi-pixel liquid crystal displays, which can greatly improve the performance of liquid crystal displays during oblique viewing of large liquid crystal displays, high-resolution liquid crystal displays, and liquid crystal displays driven at high speed and short vertical and horizontal scanning periods. Display contrast. Because by increasing the oscillation period of the voltage applied to the CS bus, the following problems may easily occur: increasing the size of the multi-pixel LCD that applies the oscillation voltage to the CS bus, increasing the load capacitance and resistance of the CS bus, passivating the CS bus voltage waveform; and increase the resolution and driving speed of the liquid crystal display, reduce the oscillation cycle of the CS bus, increase the impact of waveform passivation and cause the effective value of VLCadd in the display screen to change significantly, thus causing irregular display.

在根据本发明第二方面实施例的液晶显示器中，其使用电公共CS总线用于相邻行中像素的相邻子像素，并采用两组电绝缘的CS干线，CS总线电压的振荡周期是1H。另一方面，根据本发明第三方面实施例的液晶显示器，其使用电绝缘CS总线用于相邻行像素的相邻子像素，当使用两组电绝缘的CS干线时，可以将CS总线电压的振荡周期设定为2H，当使用四组电绝缘的CS干线时，可以将CS总线电压的振荡周期设定为4H。In the liquid crystal display according to the embodiment of the second aspect of the present invention, it uses an electrically common CS bus for adjacent sub-pixels of pixels in adjacent rows, and adopts two sets of electrically insulated CS main lines, and the oscillation period of the CS bus voltage is 1H. On the other hand, according to the liquid crystal display of the embodiment of the third aspect of the present invention, it uses an electrically isolated CS bus line for adjacent sub-pixels of adjacent rows of pixels. When two sets of electrically isolated CS main lines are used, the CS bus voltage can be The oscillation period of the CS bus voltage is set to 2H. When using four groups of electrically insulated CS trunk lines, the oscillation period of the CS bus voltage can be set to 4H.

根据本发明第三方面实施例的液晶显示器的结构或驱动波形，通过使用电绝缘CS干线，用于相邻行像素的相邻子像素，并采用L组绝缘CS干线，可以将CS总线的振荡周期设定为水平扫描周期(LHs)的L倍。According to the structure or driving waveform of the liquid crystal display of the embodiment of the third aspect of the present invention, by using electrically isolated CS main lines for adjacent sub-pixels of adjacent rows of pixels, and using L groups of isolated CS main lines, the oscillation of the CS bus can be The period is set to be L times the horizontal scanning period (LHs).

下面将描述根据本发明第四方面实施例的液晶显示器和它的驱动方法。A liquid crystal display and its driving method according to an embodiment of the fourth aspect of the present invention will be described below.

如上所述，根据本发明第三方面实施例的液晶显示器，使用L组电绝缘的存储电容反电极(L电绝缘的CS干线)，可以将施加到存储电容反电极上的振荡电压振荡周期设定为水平扫描周期的L倍。这样用重电负载的存储电容反电极线，可能在大的高分辨率液晶显示器上实现多像素显示。As mentioned above, according to the liquid crystal display of the embodiment of the third aspect of the present invention, by using L groups of electrically isolated storage capacitor counter electrodes (L electrically isolated CS main lines), the oscillation period of the oscillating voltage applied to the storage capacitor counter electrodes can be set to Set as L times of the horizontal scanning period. In this way, it is possible to realize multi-pixel display on a large high-resolution liquid crystal display with the storage capacitor counter electrode line of heavy electric load.

但是，第三方面的实施例需要使用电绝缘的存储电容反电极，用于在列方向两个相邻像素中的子像素(即，相邻行的两个像素)(例如，参见图29)，意谓着每个像素需要两个CS总线。这样存在降低像素孔径比的问题。特别是，例如，如图35A所示，使用用于子像素的CS总线排列在各个子像素的中心的结构，使它需要提供黑矩阵BM1来防止通过列方向相邻像素之间的漏光。因此，两个CS总线与黑矩阵交迭的面积不能用于显示。这就降低了像素孔径比。However, embodiments of the third aspect require the use of electrically isolated storage capacitor counter electrodes for sub-pixels in two adjacent pixels in the column direction (i.e., two pixels in adjacent rows) (see, for example, FIG. 29 ) , meaning that each pixel requires two CS buses. This has the problem of reducing the pixel aperture ratio. In particular, using a structure in which CS bus lines for subpixels are arranged at the center of each subpixel as shown in FIG. 35A, for example, makes it necessary to provide a black matrix BM1 to prevent light leakage through between adjacent pixels in the column direction. Therefore, the area where the two CS buses overlap with the black matrix cannot be used for display. This reduces the pixel aperture ratio.

相反，根据第四方面的实施例，如图35B所示，相邻列方向两个不同像素的两个相邻子像素具有连接公共CS总线的存储电容反电极，CS总线允许设置在列方向相邻像素之间，因此使CS总线也起黑矩阵的作用。与图35A的结构相比，具有能够减小CS总线数的优点，通过省略另外分开提供的黑矩阵BM1而提高了像素的孔径比。On the contrary, according to the embodiment of the fourth aspect, as shown in FIG. 35B, two adjacent sub-pixels of two different pixels in the adjacent column direction have storage capacitor counter electrodes connected to a common CS bus line, and the CS bus line allows to be arranged in the same column direction. between adjacent pixels, so that the CS bus also acts as a black matrix. Compared with the structure of FIG. 35A , there is an advantage that the number of CS bus lines can be reduced, and the aperture ratio of the pixel is improved by omitting the black matrix BM1 provided separately.

就根据第三方面实施例的液晶显示器而言，为了将施加到CS总线的振荡电压振荡周期设定为水平扫描周期的L倍，要求使用L个电绝缘CS干线，要求L个驱动电源供给存储电容反电极。结果，按需要增加施加给CS总线的振荡电压振荡周期，因而需要增加CS干线的数量和供给存储电容反电极的驱动电源数。这样，用根据第三方面实施例的液晶显示器，在增加施加到CS总线上的振荡电压的周期方面有一定的限制，因为需要增加CS干线数和供给存储电容反电极的驱动电源数。As far as the liquid crystal display according to the embodiment of the third aspect is concerned, in order to set the oscillating period of the oscillating voltage applied to the CS bus to be L times the horizontal scanning period, it is required to use L electrically insulated CS trunk lines, and L driving power supplies for storage Capacitor counter electrode. As a result, the oscillation period of the oscillating voltage applied to the CS bus line is increased as needed, and thus the number of CS main lines and the number of driving power supplies to the counter electrode of the storage capacitor need to be increased. Thus, with the liquid crystal display according to the embodiment of the third aspect, there is a limit in increasing the period of the oscillating voltage applied to the CS bus line because of the need to increase the number of CS main lines and the number of driving power supplies to the counter electrode of the storage capacitor.

相反，就根据本发明第四方面实施例的液晶显示器而言，当电绝缘CS干线数为L(L是偶数)时，振荡电压的振荡周期可以设定为水平扫描周期的2*K*L倍(K是正整数)。On the contrary, in terms of the liquid crystal display according to the embodiment of the fourth aspect of the present invention, when the number of electrically insulated CS trunk lines is L (L is an even number), the oscillation period of the oscillation voltage can be set to 2*K*L of the horizontal scanning period times (K is a positive integer).

因此，根据本发明第四方面实施例的液晶显示器比根据第三方面实施例的液晶显示器更适合大的高分辨率液晶显示器。Therefore, the liquid crystal display according to the embodiment of the fourth aspect of the present invention is more suitable for a large high-resolution liquid crystal display than the liquid crystal display according to the embodiment of the third aspect.

下面将描述涉及本发明第四方面的实施例，引入实现如36A和36B所示驱动状态的液晶显示器示例。施加到像素液晶层上的电场方向在分别对应于图24A和24B的图36A和36B之间是相反的。下面将描述用于实现图36A所示驱动状态的结构。顺便提及，为了实施图36B所示的驱动状态，施加到电源线的电压极性和存储电容电压极性可以用参照图23A和23B描述的相同方式从图36A所示的极性反转。这样有可能将第一和第二子像素固定就位(图中为“b(亮)”或“d(暗)”)，同时，反转象素的显示极性(图中为“+”或“-”)。但是，本发明不限于此，仅允许施加到电源总线的电压反转。在这种情况下，因为第一和第二子像素随同像素极性的反转改变位置(图中为“b(亮)”或“d(暗)”)，因此当像素位置固定时，可能减轻在中间灰度等级显示过程中遇到的渗色等问题。Embodiments relating to the fourth aspect of the present invention will be described below, introducing an example of a liquid crystal display realizing the drive states shown in 36A and 36B. The direction of the electric field applied to the pixel liquid crystal layer is reversed between FIGS. 36A and 36B corresponding to FIGS. 24A and 24B, respectively. The structure for realizing the drive state shown in Fig. 36A will be described below. Incidentally, to implement the drive state shown in FIG. 36B, the polarity of the voltage applied to the power supply line and the storage capacitor voltage can be reversed from the polarity shown in FIG. 36A in the same manner as described with reference to FIGS. 23A and 23B. This makes it possible to fix the first and second sub-pixels in place ("b (bright)" or "d (dark)" in the figure), and at the same time, reverse the display polarity of the pixel ("+" in the figure or"-"). However, the present invention is not limited thereto and only allows the voltage applied to the power bus to be reversed. In this case, since the first and second sub-pixels change position ("b (bright)" or "d (dark)" in the figure) along with the inversion of the pixel polarity, when the pixel position is fixed, it may Alleviates problems such as color bleeding encountered during mid-grayscale display.

在根据下述实施例的液晶显示器中，如图35B所示，在列方向两相邻像素(第n行和第(n+1)行)公用第n行像素的子像素电极18b和第n+1行像素的子像素电极18a之间设置的公共CS总线CSBL，以便将存储电容反电压(振荡电压)供给子像素的辅助电容。公共CS总线CSBL也起到黑矩阵的作用，以阻挡第n行和第(n+1)行像素之间的光通过。公共CS总线CSBL这样设置：即，经过绝缘膜部分交迭子像素电极18a和18b。In the liquid crystal display according to the following embodiments, as shown in FIG. 35B, two adjacent pixels in the column direction (row n and row (n+1)) share the subpixel electrode 18b and the nth pixel electrode 18b of the nth row pixel. The common CS bus line CSBL is provided between the sub-pixel electrodes 18a of the pixels in the +1 row to supply the storage capacitor counter voltage (oscillating voltage) to the auxiliary capacitor of the sub-pixel. The common CS bus line CSBL also functions as a black matrix to block the passage of light between the nth row and the (n+1)th row of pixels. The common CS bus line CSBL is arranged so as to partially overlap the sub-pixel electrodes 18a and 18b via an insulating film.

在根据下面引作示例的实施例的液晶显示器中，当施加到CS总线的振荡电压振荡周期长于水平扫描周期并且电绝缘CS干线数量为L(L是偶数)时，施加到CS总线的振荡电压振荡周期可以设定为一个水平扫描周期(K是正整数)的2*K*L倍。即，尽管根据本发明第三方面实施例的液晶显示器允许振荡电压的振荡周期仅设定到L倍，但是根据本发明第四方面实施例的液晶显示器具有让振荡周期进一步通过系数2*K增加的优点，其中K不取决于电绝缘CS干线的数量。K是取决于单个电绝缘CS干线和CS总线之间连接图案的参数，并等于连接连续CS总线中的公共CS干线的CS总线数(电等效CS总线)的1/2，CS总线构成连接CS干线的一个周期。In the liquid crystal display according to the embodiments cited below as examples, when the oscillation period of the oscillation voltage applied to the CS bus line is longer than the horizontal scanning period and the number of electrically isolated CS trunk lines is L (L is an even number), the oscillation voltage applied to the CS bus line The oscillation period can be set as 2*K*L times of a horizontal scanning period (K is a positive integer). That is, although the liquid crystal display according to the embodiment of the third aspect of the present invention allows the oscillation period of the oscillation voltage to be set only to L times, the liquid crystal display according to the embodiment of the fourth aspect of the present invention has the ability to further increase the oscillation period by the coefficient 2*K of advantage, where K does not depend on the number of electrically isolated CS trunks. K is a parameter that depends on the connection pattern between a single electrically isolated CS trunk and a CS bus, and is equal to 1/2 the number of CS buses (electrically equivalent CS buses) connected to a common CS trunk in consecutive CS buses that make up the connection One cycle of the CS trunk.

根据本发明实施例的液晶显示器的多像素驱动将每个像素分成两个子像素，将不同的振荡电压(存储电容反电压)供给连接各个子像素的辅助电容，因此获得亮子像素和暗子像素。例如，如果TFT关闭后振荡电压的第一变化是电压升高，则出现亮子像素，相反，如果TFT关闭后振荡电压的第一变化是电压降低，则出现暗子像素。因此，如果用于在TFT关闭后振荡电压应该升高的子像素的CS总线连接到公共CS干线上，而用于在TFT关闭后振荡电压应该降低的子像素的CS总线就连接到另一公共CS干线上，则可能减少CS干线数量。K是表示通过CS总线和CS干线之间连接图案增加周期效果的参数。According to the multi-pixel drive of the liquid crystal display of the embodiment of the present invention, each pixel is divided into two sub-pixels, and different oscillation voltages (reverse voltages of storage capacitors) are supplied to the auxiliary capacitors connected to each sub-pixel, thus obtaining bright sub-pixels and dark sub-pixels. For example, if the first change of the oscillating voltage after the TFT is turned off is a voltage increase, a bright sub-pixel appears; on the contrary, if the first change of the oscillating voltage after the TFT is turned off is a voltage decrease, a dark sub-pixel appears. Therefore, if the CS bus for the sub-pixel whose oscillation voltage should be raised after the TFT is turned off is connected to a common CS rail, the CS bus for the sub-pixel whose oscillation voltage should be lowered after the TFT is turned off is connected to another common On the CS trunk, the number of CS trunks may be reduced. K is a parameter representing the effect of increasing the period by the connection pattern between the CS bus and the CS trunk.

通过增加K值，可能相应地增加振荡电压。但是，优选K值不太大。下面将描述理由。By increasing the value of K, it is possible to correspondingly increase the oscillation voltage. However, it is preferred that the value of K is not too large. The reason will be described below.

K值的增大增加了连接公共CS干线的子像素数。它们连接不同的TFT，其以不同的间隔(1H的倍数)关闭。因此，连接到公共CS干线上以增加(或减少)子像素TFT关闭后的第一时间的子像素振荡电压所需的时间，不同于连接到公共CS干线上以增加(或减少)子像素TFT关闭后的第一时间的另一子像素振荡电压所需的时间。这个时间差随K值的增加而增加，即，随连接到公共CS干线上的CS总线数量的增加而增加。这会造成线性亮度不规则的视觉。为了防止这种亮度不规则，用经验法优选时间差不大于扫描线数(像素行数)的5％。例如，在XGA情形，优选K值设定成时间差不大于768行的5％或不大于38H。相同地，振荡电压周期的较低限度应该参照图28等来设定，这样不会产生由于波形钝化而造成的亮度不规则。例如，在45英寸XGA显示器的情形，如果振荡周期是12H或更大，则没有波形钝化的问题。因此，在45英寸液晶显示器的情形，如果K设定为1或2，L设定为6，8，10，或12，振荡电压的周期设定在12H-48H之内，则可能实现没有亮度不规则的高质量显示。相同地，考虑振荡电压电源(供给存储电容反电极的驱动电源)数，电绝缘CS干线数L应该规定板(TFT衬底)上等的布线。Increasing the value of K increases the number of sub-pixels connected to a common CS trunk. They connect different TFTs, which are turned off at different intervals (multiples of 1H). Therefore, connecting to the common CS rail to increase (or decrease) the subpixel oscillation voltage for the first time after the subpixel TFT is turned off differs from the time required to connect to the common CS rail to increase (or decrease) the subpixel TFT The time required for another subpixel to oscillate the voltage after the first time off. This time difference increases with the value of K, ie with the number of CS buses connected to a common CS trunk. This creates a visual perception of linear brightness irregularities. In order to prevent such luminance irregularities, it is preferred that the time difference is not greater than 5% of the number of scanning lines (number of pixel rows) by an empirical method. For example, in the case of XGA, it is preferable to set the K value so that the time difference is not more than 5% of 768 lines or not more than 38H. Likewise, the lower limit of the oscillation voltage period should be set with reference to FIG. 28 and the like so that brightness irregularities due to waveform blunting are not generated. For example, in the case of a 45-inch XGA display, if the oscillation period is 12H or more, there is no problem of waveform blunting. Therefore, in the case of a 45-inch LCD display, if K is set to 1 or 2, L is set to 6, 8, 10, or 12, and the cycle of the oscillation voltage is set within 12H-48H, it is possible to achieve no brightness Irregular high-quality display. Similarly, considering the number of oscillating voltage power supplies (drive power supply to the counter electrode of the storage capacitor), the number L of electrically insulated CS trunk lines should define the wiring on the board (TFT substrate) and the like.

下面将描述根据本发明第四方面实施例的液晶显示器及其驱动方法，在引用示例中，K＝1，L＝4，6，8，10，或12，在实例中，K＝2，L＝4或6。为了避免重复前面实施例已经描述的内容，下面的描述集中在CS总线和CS干线之间的布局。A liquid crystal display and a driving method thereof according to an embodiment of the fourth aspect of the present invention will be described below. In the cited example, K=1, L=4, 6, 8, 10, or 12, and in the example, K=2, L = 4 or 6. In order to avoid repeating what has been described in the previous embodiments, the following description focuses on the layout between the CS bus and the CS trunk.

[K＝1，L＝4，振荡周期＝8H][K=1, L=4, oscillation period=8H]

根据本发明液晶显示器的矩阵结构(CS总线的连接图案)如图37所示，用于驱动液晶显示器的信号波形如图38所示。而且，用于图37的连接图案在表7中示出。用图37所示的矩阵结构，因为使用如38所示的定时将振荡电压施加到CS总线上，因此实现了图35A所示的驱动状态。The matrix structure (connection pattern of the CS bus) of the liquid crystal display according to the present invention is shown in FIG. 37 , and the signal waveforms for driving the liquid crystal display are shown in FIG. 38 . Also, the connection pattern used in FIG. 37 is shown in Table 7. With the matrix structure shown in FIG. 37, since the oscillation voltage is applied to the CS bus line using the timing shown in 38, the driving state shown in FIG. 35A is realized.

在图37中，每个CS总线连接到设置在图左、右两端的所有四个CS干线上。因此，有四组电绝缘CS总线，因此L＝4。而且，在图37中，连接CS总线和CS干线之间的图案有某些规则，即，在图中每8个CS总线重复相同的图案。因此，K＝1(＝8/(2L))。In FIG. 37, each CS bus is connected to all four CS trunks provided at the left and right ends of the figure. Thus, there are four sets of electrically isolated CS buses, so L=4. Also, in FIG. 37, the pattern connecting the CS buses and the CS trunk lines has certain rules, that is, the same pattern is repeated every 8 CS buses in the figure. Therefore, K=1 (=8/(2L)).

[表7][Table 7]

L＝4，K＝1L=4, K=1

 CS干线 CS Trunk 连接CS干线的CS总线 CS bus connected to CS trunk M1aM1a   CSBL_(n-1)  B，(n  )ACSBL_(n+4)  B，(n+5)A CSBL_(n-1) B, (n )ACSBL_(n+4) B, (n+5)A M2aM2a   CSBL_(n  )  B，(n+1)ACSBL_(n+3)  B，(n+4)A CSBL_(n ) B, (n+1)ACSBL_(n+3) B, (n+4)A M3aM3a   CSBL_(n+1)  B，(n+2)ACSBL_(n+6)  B，(n+7)A CSBL_(n+1) B, (n+2)ACSBL_(n+6) B, (n+7)A M4aM4a   CSBL_(n+2)  B，(n+3)ACSBL_(n+5)  B，(n+6)  A CSBL_(n+2) B, (n+3)ACSBL_(n+5) B, (n+6) A

其中n＝1，9，17，...where n=1, 9, 17, ...

从表7中可以看出，图37中的CS总线分为两种类型，即：As can be seen from Table 7, the CS bus in Figure 37 is divided into two types, namely:

对任何p满足下列表达式的α型α-type satisfying the following expression for any p

CSBL_(p)B，(p+1)ACSBL_(p)B, (p+1)A

CSBL_(p+5)B，(p+6)ACSBL_(p+5)B, (p+6)A

和对任何p满足下列表达式的β型and β-forms satisfying the expression for any p

CSBL_(p+1)B，(p+2)ACSBL_(p+1)B, (p+2)A

CSBL_(p+4)B，(p+5)ACSBL_(p+4)B, (p+5)A

特别是，连接CS干线M1a和M3a的CS总线是α型，而连接CS干线M2a和M4a的CS总线是β型。In particular, the CS bus connecting the CS trunk lines M1a and M3a is of alpha type, while the CS bus connecting the CS trunk lines M2a and M4a is of beta type.

用于一个连接周期的8个连续CS总线由4个α型总线(连接M1a的两个总线和连接M3a的两个连接总线)和4个β型总线(连接M2a的两个总线和连接M4a的两个连接总线)组成。The 8 consecutive CS buses for one connection cycle consist of 4 α-type buses (two buses connected to M1a and two connected buses connected to M3a) and 4 β-type buses (two buses connected to M2a and two connecting buses).

利用参数L和K，上面的表达式对任何p可以如下给出：Using the parameters L and K, the above expression for any p can be given as follows:

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

因此，使由上述表达式组的每个表示的每个CS总线组内的CS总线电相等是足够的，其中P＝1，3，5，...或p＝0，2，4，...。因为没有CS总线满足两个α型和β型，因此引入这个条件。Therefore, it is sufficient to make the CS buses within each CS bus group represented by each of the above expression groups electrically equal, where p=1, 3, 5, . . . or p=0, 2, 4, . ... This condition is introduced because no CS bus satisfies both types α and β.

相同地，在图38中可以看出施加到CS总线的振荡电压振荡周期是8H，即，水平扫描周期的2*K*L倍。Similarly, it can be seen in FIG. 38 that the oscillation period of the oscillation voltage applied to the CS bus line is 8H, that is, 2*K*L times of the horizontal scanning period.

[K＝1，L＝6，振荡周期＝12H][K=1, L=6, oscillation period=12H]

假定有6组电绝缘CS总线，连接图案如图39所示，驱动波形如图40所示。而且，用于图39的连接图案在表8中示出。Assume that there are 6 groups of electrically insulated CS buses, the connection patterns are shown in Figure 39, and the driving waveforms are shown in Figure 40. Also, the connection pattern used in FIG. 39 is shown in Table 8.

在图40中，每个CS总线连接到设置在图左、右两端的所有6个CS干线上。因此，有6组电绝缘CS总线，结果L＝6。In FIG. 40, each CS bus is connected to all 6 CS trunks provided at the left and right ends of the figure. Thus, there are 6 sets of electrically isolated CS buses, resulting in L=6.

而且，在图39中，在CS总线和CS干线之间的连接图案有些规则，即，在图中每12个CS总线重复相同的连接图案。因此，K＝1(＝12/(2L))。Also, in FIG. 39, the connection pattern between the CS bus and the CS trunk is somewhat regular, ie, the same connection pattern is repeated every 12 CS buses in the figure. Therefore, K=1 (=12/(2L)).

[表8][Table 8]

L＝4，K＝1L=4, K=1

 CS干线 CS Trunk 连接CS干线的CS总线 CS bus connected to CS trunk M1aM1a   CSBL_(n-1)  B，(n   )ACSBL_(n+4)  B，(n +5)A CSBL_(n-1) B, (n )ACSBL_(n+4) B, (n +5)A M2aM2a   CSBL_(n  )  B，(n +1)ACSBL_(n+3)  B，(n+4)A CSBL_(n ) B, (n +1)ACSBL_(n+3) B, (n+4)A M3aM3a   CSBL_(n+1)  B，(n+2)ACSBL_(n+6)  B，(n+7)A CSBL_(n+1) B, (n+2)ACSBL_(n+6) B, (n+7)A M4aM4a   CSBL_(n+2)  B，(n+3)ACSBL_(n+5)  B，(n+6)A CSBL_(n+2) B, (n+3)ACSBL_(n+5) B, (n+6)A

其中n＝1，9，17，...where n=1, 9, 17, ...

从表8中可以看出，图39中的CS总线在由所有下列表达式组表示的每个组内是电相等的：As can be seen from Table 8, the CS buses in Figure 39 are electrically equal within each group represented by all of the following expression groups:

CSBL_(p)B，(p+1)ACSBL_(p)B, (p+1)A

CSBL_(p+7)B，(p+8)ACSBL_(p+7)B, (p+8)A

或or

CSBL_(p+1)B，(p+2)ACSBL_(p+1)B, (p+2)A

CSBL_(p+6)B，(p+7)ACSBL_(p+6)B, (p+7)A

其中P＝1，3，5，...或P＝0，2，4，...where P = 1, 3, 5, ... or P = 0, 2, 4, ...

利用参数L和K，对于任何p，上述表达式可以给定如下：Using parameters L and K, for any p, the above expression can be given as follows:

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

因此，使由上述表达式组的每个表示的每个CS总线组内的CS总线电相等是足够的，其中P＝1，3，5，...或p＝0，2，4，...。Therefore, it is sufficient to make the CS buses within each CS bus group represented by each of the above expression groups electrically equal, where p=1, 3, 5, . . . or p=0, 2, 4, . ...

相同地，在图40中，可以看出施加到CS总线上的振荡电压振荡周期是12H，即，水平扫描周期的2*K*L倍。Similarly, in FIG. 40 , it can be seen that the oscillation period of the oscillation voltage applied to the CS bus line is 12H, that is, 2*K*L times of the horizontal scanning period.

[K＝1，L＝8，振荡周期＝16H][K=1, L=8, oscillation period=16H]

假定有8组电绝缘CS总线，连接图案如图41所示，驱动波形如图42所示。而且，用于图41的连接图案在表9中示出。Assume that there are 8 groups of electrically insulated CS buses, the connection patterns are shown in Figure 41, and the driving waveforms are shown in Figure 42. Also, the connection patterns used in FIG. 41 are shown in Table 9.

在图41中，每个CS总线连接到设置在图左、右两端的所有8个CS干线上。因此，有8组电绝缘CS总线，结果L＝8。In FIG. 41, each CS bus is connected to all 8 CS trunks provided at the left and right ends of the figure. Therefore, there are 8 sets of electrically isolated CS buses, resulting in L=8.

而且，在图41中，在CS总线和CS干线之间的连接图案有某些规则，即，在图中每16个CS总线重复相同的连接图案。因此，K＝1(＝16/(2L))。Also, in FIG. 41, there are certain rules for the connection pattern between the CS buses and the CS trunk lines, that is, the same connection pattern is repeated every 16 CS buses in the figure. Therefore, K=1 (=16/(2L)).

[表9][Table 9]

L＝8，K＝1L=8, K=1

 CS干线 CS Trunk   连接CS干线的CS总线 CS bus connected to CS trunk M1cM1c   CSBL_(n-1)  B，(n  )ACSBL_(n+8)  B，(n+9)A CSBL_(n-1) B, (n )ACSBL_(n+8) B, (n+9)A M2cM2c   CSBL_(n  )  B，(n+1)ACSBL_(n+7)  B，(n+8)A CSBL_(n ) B, (n+1)ACSBL_(n+7) B, (n+8)A M3cM3c   CSBL_(n+1)  B，(n+2)ACSBL_(n+10) B，(n+11)A CSBL_(n+1) B, (n+2)ACSBL_(n+10) B, (n+11)A M4cM4c   CSBL_(n+2)  B，(n+3)ACSBL_(n+9)  B，(n+10)A CSBL_(n+2) B, (n+3)ACSBL_(n+9) B, (n+10)A M5cM5c   CSBL_(n+3)  B，(n+4)ACSBL_(n+12) B，(n+13)A CSBL_(n+3) B, (n+4)ACSBL_(n+12) B, (n+13)A M6cM6c   CSBL_(n+4)  B，(n+5)ACSBL_(n+11) B，(n+12)A CSBL_(n+4) B, (n+5)ACSBL_(n+11) B, (n+12)A M7cM7c   CSBL_(n+5)  B，(n+6)ACSBL_(n+14) B，(n+15)A CSBL_(n+5) B, (n+6)ACSBL_(n+14) B, (n+15)A M8cM8c   CSBL_(n+6)  B，(n+7)ACSBL_(n+13) B，(n+14)A CSBL_(n+6) B, (n+7)ACSBL_(n+13) B, (n+14)A

其中n＝1，17，33，...where n=1, 17, 33,...

从表9中可以看出，图41中的CS总线在由所有下列表达式组表示的每个组内是电相等的：As can be seen from Table 9, the CS buses in Figure 41 are electrically equal within each group represented by all of the following expression groups:

CSBL_(p)B，(p+1)ACSBL_(p)B, (p+1)A

CSBL_(p+9)B，(p+10)ACSBL_(p+9)B, (p+10)A

或or

CSBL_(p+1)B，(p+2)ACSBL_(p+1)B, (p+2)A

CSBL_(p+8)B，(p+9)ACSBL_(p+8)B, (p+9)A

其中P＝1，3，5，...或P＝0，2，4，...where P = 1, 3, 5, ... or P = 0, 2, 4, ...

利用参数L和K，对于任何p，上述表达式可以给定如下：Using parameters L and K, for any p, the above expression can be given as follows:

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

因此，使由上述表达式组的每个表示的每个CS总线组内的CS总线电相等是足够的，其中P＝1，3，5，...或p＝0，2，4，...。Therefore, it is sufficient to make the CS buses within each CS bus group represented by each of the above expression groups electrically equal, where p=1, 3, 5, . . . or p=0, 2, 4, . ...

相同地，在图42中，可以看出施加到CS总线上的振荡电压振荡周期是16H，即，水平扫描周期的2*K*L倍。Similarly, in FIG. 42 , it can be seen that the oscillation period of the oscillation voltage applied to the CS bus line is 16H, that is, 2*K*L times of the horizontal scanning period.

[K＝1，L＝10，振荡周期＝20H][K=1, L=10, oscillation period=20H]

假定有10组电绝缘CS总线，连接图案如图43所示，驱动波形如图44所示。而且，用于图43的连接图案在表10中示出。Assume that there are 10 sets of electrically insulated CS buses, the connection patterns are shown in Figure 43, and the driving waveforms are shown in Figure 44. Also, the connection pattern used in FIG. 43 is shown in Table 10.

在图43中，每个CS总线连接到设置在图左、右两端的所有10个CS干线上。因此，有10组电绝缘CS总线，结果L＝10。而且，在图43中，在CS总线和CS干线之间的连接图案有某些规则，即，在图中每20个CS总线重复相同的连接图案。因此，K＝1(＝20/(2L))。In FIG. 43, each CS bus is connected to all 10 CS trunks provided at the left and right ends of the figure. Thus, there are 10 sets of electrically isolated CS buses, resulting in L=10. Also, in FIG. 43, the connection pattern between the CS bus and the CS trunk has certain rules, that is, the same connection pattern is repeated every 20 CS buses in the figure. Therefore, K=1 (=20/(2L)).

[表10][Table 10]

L＝10，K＝1L=10, K=1

 CS干线 CS Trunk   连接CS干线的CS总线 CS bus connected to CS trunk M1dM1d   CSBL_(n-1)  B，(n   )ACSBL_(n+10) B，(n+11)A CSBL_(n-1) B, (n )ACSBL_(n+10) B, (n+11)A M2dM2d   CSBL_(n  )  B，(n+1) ACSBL_(n+9)  B，(n+10)A CSBL_(n ) B, (n+1) ACSBL_(n+9) B, (n+10)A M3dM3d   CSBL_(n+1)  B，(n+2)ACSBL_(n+12) B，(n+13)A CSBL_(n+1) B, (n+2)ACSBL_(n+12) B, (n+13)A M4dM4d   CSBL_(n+2)  B，(n+3)ACSBL_(n+11) B，(n+12)A CSBL_(n+2) B, (n+3)ACSBL_(n+11) B, (n+12)A M5dM5d   CSBL_(n+3)  B，(n+4)ACSBL_(n+14) B，(n+15)A CSBL_(n+3) B, (n+4)ACSBL_(n+14) B, (n+15)A M6dM6d   CSBL_(n+4)  B，(n+5)ACSBL_(n+13) B，(n+14)A CSBL_(n+4) B, (n+5)ACSBL_(n+13) B, (n+14)A M7dM7d   CSBL_(n+5)  B，(n+6)ACSBL_(n+16) B，(n+17)A CSBL_(n+5) B, (n+6)ACSBL_(n+16) B, (n+17)A M8dM8d   CSBL_(n+6)  B，(n+7)ACSBL_(n+15) B，(n+16)A CSBL_(n+6) B, (n+7)ACSBL_(n+15) B, (n+16)A M9dM9d   CSBL_(n+7)  B，(n+6)ACSBL_(n+18) B，(n+19)A CSBL_(n+7) B, (n+6)ACSBL_(n+18) B, (n+19)A M10dM10d   CSBL_(n+8)  B，(n+7)ACSBL_(n+17) B，(n+18)A CSBL_(n+8) B, (n+7)ACSBL_(n+17) B, (n+18)A

其中n＝1，21，41，...Where n = 1, 21, 41, ...

从表10中可以看出，图43中的CS总线在由所有下列表达式组表示的每个组内是电相等的：As can be seen from Table 10, the CS buses in Figure 43 are electrically equal within each group represented by all of the following expression groups:

CSBL_(p)B，(p+1)ACSBL_(p)B, (p+1)A

CSBL_(p+11)B，(p+12)ACSBL_(p+11)B, (p+12)A

或or

CSBL_(p+1)B，(p+2)ACSBL_(p+1)B, (p+2)A

CSBL_(p+10)B，(p+11)ACSBL_(p+10)B, (p+11)A

其中P＝1，3，5，...或P＝0，2，4，...where P = 1, 3, 5, ... or P = 0, 2, 4, ...

利用参数L和K，对于任何p，上述表达式可以给定如下：Using parameters L and K, for any p, the above expression can be given as follows:

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

因此，使由上述表达式组的每个表示的每个CS总线组内的CS总线电相等是足够的，其中P＝1，3，5，...或p＝0，2，4，...。Therefore, it is sufficient to make the CS buses within each CS bus group represented by each of the above expression groups electrically equal, where p=1, 3, 5, . . . or p=0, 2, 4, . ...

相同地，在图44中，可以看出施加到CS总线上的振荡电压振荡周期是20H，即，水平扫描周期的2*K*L倍。Similarly, in FIG. 44, it can be seen that the oscillation period of the oscillation voltage applied to the CS bus line is 20H, that is, 2*K*L times of the horizontal scanning period.

[K＝1，L＝12，振荡周期＝24H][K=1, L=12, oscillation period=24H]

假定有12组电绝缘CS总线，连接图案如图45所示，驱动波形如图46所示。而且，用于图45的连接图案在表11中示出。Assume that there are 12 sets of electrically insulated CS buses, the connection pattern is shown in Figure 45, and the driving waveform is shown in Figure 46. Also, the connection pattern used in FIG. 45 is shown in Table 11.

在图45中，每个CS总线连接到设置在图左、右两端的所有12个CS干线上。因此，有12组电绝缘CS总线，结果L＝12。而且，在图45中，在CS总线和CS干线之间的连接图案有某些规则，即，在图中每24个CS总线重复相同的连接图案。因此，K＝1(＝24/(2L))。In FIG. 45, each CS bus is connected to all 12 CS trunks provided at the left and right ends of the figure. Thus, there are 12 sets of electrically isolated CS buses, resulting in L=12. Also, in FIG. 45, there are certain rules for the connection pattern between the CS buses and the CS trunk lines, that is, the same connection pattern is repeated every 24 CS buses in the figure. Therefore, K=1 (=24/(2L)).

[表11][Table 11]

L＝12，K＝1L=12, K=1

 CS干线 CS Trunk   连接CS干线的CS总线 CS bus connected to CS trunk M1eM1e   CSBL_(n-1)   B，(n   )ACSBL_(n+12)  B，(n+13)A CSBL_(n-1) B, (n )ACSBL_(n+12) B, (n+13)A M2eM2e   CSBL_(n   )  B，(n+1)ACSBL_(n+11)  B，(n+12)A CSBL_(n ) B, (n+1)ACSBL_(n+11) B, (n+12)A M3eM3e   CSBL_(n+1)   B，(n+2)ACSBL_(n+14)  B，(n+15)A CSBL_(n+1) B, (n+2)ACSBL_(n+14) B, (n+15)A M4eM4e   CSBL_(n+2)   B，(n+3)ACSBL_(n+13)  B，(n+14)A CSBL_(n+2) B, (n+3)ACSBL_(n+13) B, (n+14)A M5eM5e   CSBL_(n+3)   B，(n+4)ACSBL_(n+16)  B，(n+17)A CSBL_(n+3) B, (n+4)ACSBL_(n+16) B, (n+17)A M6eM6e   CSBL_(n+4)   B，(n+5)ACSBL_(n+15)  B，(n+16)A CSBL_(n+4) B, (n+5)ACSBL_(n+15) B, (n+16)A M7eM7e   CSBL_(n+5)   B，(n+6) ACSBL_(n+18)  B，(n+19)A CSBL_(n+5) B, (n+6) ACSBL_(n+18) B, (n+19)A M8eM8e   CSBL_(n+6)   B，(n+7)ACSBL_(n+17)  B，(n+18)A CSBL_(n+6) B, (n+7)ACSBL_(n+17) B, (n+18)A M9eM9e   CSBL_(n+7)   B，(n+6)ACSBL_(n+20)  B，(n+21)A CSBL_(n+7) B, (n+6)ACSBL_(n+20) B, (n+21)A M10eM10e   CSBL_(n+8)   B，(n+7)ACSBL_(n+19)  B，(n+20)A CSBL_(n+8) B, (n+7)ACSBL_(n+19) B, (n+20)A M11eM11e   CSBL_(n+9)   B，(n+10)ACSBL_(n+22)  B，(n+23)A CSBL_(n+9) B, (n+10)ACSBL_(n+22) B, (n+23)A M12eM12e   CSBL_(n+10)  B，(n+11)ACSBL_(n+21)  B，(n+22)A CSBL_(n+10) B, (n+11)ACSBL_(n+21) B, (n+22)A

其中n＝1，25，49，...where n=1, 25, 49,  …

从表11中可以看出，图45中的CS总线在由所有下列表达式组表示的每个组内是电相等的：As can be seen from Table 11, the CS buses in Figure 45 are electrically equal within each group represented by all of the following expression groups:

CSBL_(p)B，(p+1)ACSBL_(p)B, (p+1)A

CSBL_(p+13)B，(p+14)ACSBL_(p+13)B, (p+14)A

或or

CSBL_(p+1)B，(p+2)ACSBL_(p+1)B, (p+2)A

CSBL_(p+12)B，(p+13)ACSBL_(p+12)B, (p+13)A

其中P＝1，3，5，...或P＝0，2，4，...where P = 1, 3, 5, ... or P = 0, 2, 4, ...

利用参数L和K，对于任何p，上述表达式可以给定如下：Using parameters L and K, for any p, the above expression can be given as follows:

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

因此，使由上述表达式组的每个表示的每个CS总线组内的CS总线电相等是足够的，其中P＝1，3，5，...或p＝0，2，4，...。Therefore, it is sufficient to make the CS buses within each CS bus group represented by each of the above expression groups electrically equal, where p=1, 3, 5, . . . or p=0, 2, 4, . ...

相同地，在图46中，可以看出施加到CS总线上的振荡电压振荡周期是24H，即，水平扫描周期的2*K*L倍。Similarly, in FIG. 46 , it can be seen that the oscillation period of the oscillation voltage applied to the CS bus line is 24H, that is, 2*K*L times of the horizontal scanning period.

在所有上述情形中，参数K＝1。现在，描述参数值K为2的情形。In all the above cases the parameter K=1. Now, a case where the parameter value K is 2 is described.

[K＝2，L＝4，振荡周期＝16H][K=2, L=4, oscillation period=16H]

假定参数值K为2并且有4组电绝缘CS总线，连接图案如图47所示，驱动波形如图48所示。而且，用于图47的连接图案在表12中示出。Assuming that the parameter value K is 2 and there are 4 groups of electrically isolated CS buses, the connection pattern is shown in Figure 47, and the driving waveform is shown in Figure 48. Also, the connection pattern used in FIG. 47 is shown in Table 12.

在图47中，每个CS总线连接到设置在图左、右两端的所有4个CS干线上。因此，有4组电绝缘CS总线，结果L＝4。而且，在图47中，在CS总线和CS干线之间的连接图案有某些规则，即，在图中每16个CS总线重复相同的连接图案。因此，K＝1(＝16/(2L))。In FIG. 47, each CS bus is connected to all 4 CS trunks provided at the left and right ends of the figure. Therefore, there are 4 sets of electrically isolated CS buses, resulting in L=4. Also, in FIG. 47, there are certain rules for the connection pattern between the CS buses and the CS trunk lines, that is, the same connection pattern is repeated every 16 CS buses in the figure. Therefore, K=1 (=16/(2L)).

[表12][Table 12]

L＝4，K＝2L=4, K=2

  CS干线 CS Trunk   连接CS干线的CS总线 CS bus connected to CS trunk M1fM1f   CSBL_(n-1)   B，(n  )    ACSBL_(n+1)   B，(n+2)    ACSBL_(n+8)   B，(n+9)    ACSBL_(n+10)  B  (n+11)   A CSBL_(n-1) B, (n ) ACSBL_(n+1) B, (n+2) ACSBL_(n+8) B, (n+9) ACSBL_(n+10) B (n+11) A M2fM2f   CSBL_(n  )   B，(n+1)    ACSBL_(n+2)   B，(n+3)    ACSBL_(n+7)   B，(n+8)    ACSBL_(n+9)   B  (n+10)   A CSBL_(n ) B, (n+1) ACSBL_(n+2) B, (n+3) ACSBL_(n+7) B, (n+8) ACSBL_(n+9) B (n+10) A M3fM3f   CSBL_(n+3)   B，(n+4)    ACSBL_(n+5)   B，(n+6)    ACSBL_(n+12)  B，(n+13)   ACSBL_(n+14)  B  (n+15)   A CSBL_(n+3) B, (n+4) ACSBL_(n+5) B, (n+6) ACSBL_(n+12) B, (n+13) ACSBL_(n+14) B (n+15 ) A M4fM4f   CSBL_(n+4)   B，(n+5)    ACSBL_(n+6)   B，(n+7)    ACSBL_(n+11)  B，(n+12)  ACSBL_(n+13)  B  (n+14)  A CSBL_(n+4) B, (n+5) ACSBL_(n+6) B, (n+7) ACSBL_(n+11) B, (n+12) ACSBL_(n+13) B (n+14 ) A

其中n＝1，17，33，...where n=1, 17, 33,...

从表12中可以看出，图47中的CS总线在由所有下列表达式组表示的每个组内是电相等的：As can be seen from Table 12, the CS buses in Figure 47 are electrically equal within each group represented by all of the following expression groups:

CSBL_(p)B，(p+1)ACSBL_(p)B, (p+1)A

CSBL_(p+2)B，(p+3)ACSBL_(p+2)B, (p+3)A

和and

CSBL_(p+9)B，(p+10)ACSBL_(p+9)B, (p+10)A

CSBL_(p+11)B，(p+12)ACSBL_(p+11)B, (p+12)A

或or

CSBL_(p+1)B，(p+2)ACSBL_(p+1)B, (p+2)A

CSBL_(p+3)B，(p+4)ACSBL_(p+3)B, (p+4)A

和and

CSBL_(p+8)B，(p+9)ACSBL_(p+8)B, (p+9)A

CSBL_(p+10)B，(p+11)ACSBL_(p+10)B, (p+11)A

其中P＝1，3，5，...或P＝0，2，4，...where P = 1, 3, 5, ... or P = 0, 2, 4, ...

利用参数L和K，对于任何p，上述表达式可以给定如下：Using parameters L and K, for any p, the above expression can be given as follows:

CSBL_(p+2*(1-1))B，(p+2*(1-1)+1)ACSBL_(p+2*(1-1))B, (p+2*(1-1)+1)A

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

和and

CSBL_(p+2*(1-1)+K*L+1)B，(p+2*(1-1)+K*L+2)ACSBL_(p+2*(1-1)+K*L+1)B, (p+2*(1-1)+K*L+2)A

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(1-1)+1)B，(p+2*(1-1)+2)ACSBL_(p+2*(1-1)+1)B, (p+2*(1-1)+2)A

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

和and

CSBL_(p+2*(1-1)+K*L)B，(p+2*(1-1)+K*L+1)ACSBL_(p+2*(1-1)+K*L)B, (p+2*(1-1)+K*L+1)A

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

因此，使由上述表达式组的每个表示的每个CS总线组内的CS总线电相等是足够的，其中P＝1，3，5，...或p＝0，2，4，...。Therefore, it is sufficient to make the CS buses within each CS bus group represented by each of the above expression groups electrically equal, where p=1, 3, 5, . . . or p=0, 2, 4, . ...

相同地，在图48中，可以看出施加到CS总线上的振荡电压振荡周期是16H，即，水平扫描周期的2*K*L倍。Similarly, in FIG. 48, it can be seen that the oscillation period of the oscillation voltage applied to the CS bus line is 16H, that is, 2*K*L times of the horizontal scanning period.

[K＝2，L＝6，振荡周期＝24H][K=2, L=6, oscillation period=24H]

假定参数值K为2并且有6组电绝缘CS总线，连接图案如图49所示，驱动波形如图50所示。而且，用于图49的连接图案在表13中示出。Assuming that the parameter value K is 2 and there are 6 groups of electrically isolated CS buses, the connection pattern is shown in Figure 49, and the driving waveform is shown in Figure 50. Also, the connection pattern used in FIG. 49 is shown in Table 13.

在图49中，每个CS总线连接到设置在图左、右两端的所有6个CS干线上。因此，有6组电绝缘CS总线，结果L＝6。而且，在图47中，在CS总线和CS干线之间的连接图案有某些规则，即，在图中每24个CS总线重复相同的连接图案。因此，K＝1(＝24/(2L))。In FIG. 49, each CS bus is connected to all 6 CS trunks provided at the left and right ends of the figure. Thus, there are 6 sets of electrically isolated CS buses, resulting in L=6. Also, in FIG. 47, there are certain rules for the connection pattern between the CS buses and the CS trunk lines, that is, the same connection pattern is repeated every 24 CS buses in the figure. Therefore, K=1 (=24/(2L)).

[表13][Table 13]

L＝6，K＝2L=6, K=2

  CS干线 CS Trunk   连接CS干线的CS总线 CS bus connected to CS trunk M1gM1g   CSBL_(n-1) B，(n)   ACSBL_(n+1) B，(n+2) ACSBL_(n+12)B，(n+13)ACSBL_(n+14)B  (n+15)A CSBL_(n-1) B, (n) ACSBL_(n+1) B, (n+2) ACSBL_(n+12)B, (n+13)ACSBL_(n+14)B (n+15)A M2gM2g   CSBL_(n)   B，(n+1) ACSBL_(n+2) B，(n+3) ACSBL_(n+11)B，(n+12)ACSBL_(n+13)B  (n+14)A CSBL_(n) B, (n+1) ACSBL_(n+2) B, (n+3) ACSBL_(n+11)B, (n+12)ACSBL_(n+13)B (n+14)A M3gM3g   CSBL_(n+3) B，(n+4) ACSBL_(n+5) B，(n+6) ACSBL_(n+16)B，(n+17)ACSBL_(n+18)B  (n+19)A CSBL_(n+3) B, (n+4) ACSBL_(n+5) B, (n+6) ACSBL_(n+16)B, (n+17)ACSBL_(n+18)B (n+19 )A M4gM4g   CSBL_(n+4) B，(n+5) ACSBL_(n+6) B，(n+7) ACSBL_(n+15)B，(n+16)ACSBL_(n+17)B  (n+18)A CSBL_(n+4) B, (n+5) ACSBL_(n+6) B, (n+7) ACSBL_(n+15)B, (n+16)ACSBL_(n+17)B (n+18 )A N5gN5g   CSBL_(n+7) B，(n+8) ACSBL_(n+9) B，(n+10)ACSBL_(n+20)B，(n+21)ACSBL_(n+22)B  (n+23)A CSBL_(n+7) B, (n+8) ACSBL_(n+9) B, (n+10)ACSBL_(n+20)B, (n+21)ACSBL_(n+22)B (n+23 )A N6gN6g   CSBL_(n+8) B，(n+9) ACSBL_(n+10)B，(n+11)ACSBL_(n+19)B，(n+20)ACSBL_(n+21)B  (n+22)A CSBL_(n+8) B, (n+9) ACSBL_(n+10)B, (n+11)ACSBL_(n+19)B, (n+20)ACSBL_(n+21)B (n+22 )A

其中n＝1，25，49，…Where n = 1, 25, 49, ...

从表13中可以看出，图49中的CS总线在由所有下列表达式组表示的每个组内是电相等的：As can be seen from Table 13, the CS buses in Figure 49 are electrically equal within each group represented by all of the following expression groups:

CSBL_(p)B，(p+1)ACSBL_(p)B, (p+1)A

CSBL_(p+2)B，(p+3)ACSBL_(p+2)B, (p+3)A

和and

CSBL_(p+13)B，(p+14)ACSBL_(p+13)B, (p+14)A

CSBL_(p+15)B，(p+16)ACSBL_(p+15)B, (p+16)A

或or

CSBL_(p+1)B，(p+2)ACSBL_(p+1)B, (p+2)A

CSBL_(p+3)B，(p+4)ACSBL_(p+3)B, (p+4)A

和and

CSBL_(p+12)B，(p+13)ACSBL_(p+12)B, (p+13)A

CSBL_(p+14)B，(p+15)ACSBL_(p+14)B, (p+15)A

其中p＝1，3，5，...或P＝0，2，4，...Where p = 1, 3, 5, ... or P = 0, 2, 4, ...

利用参数L和K，对于任何p，上述表达式可以给定如下：Using parameters L and K, for any p, the above expression can be given as follows:

CSBL_(p+2*(1-1))B，(p+2*(1-1)+1)ACSBL_(p+2*(1-1))B, (p+2*(1-1)+1)A

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

和and

CSBL_(p+2*(1-1)+K*L+1)B，(p+2*(1-1)+K*L+2)ACSBL_(p+2*(1-1)+K*L+1)B, (p+2*(1-1)+K*L+2)A

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(1-1)+1)B，(p+2*(1-1)+2)ACSBL_(p+2*(1-1)+1)B, (p+2*(1-1)+2)A

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

和and

CSBL_(p+2*(1-1)+K*L)B，(p+2*(1-1)+K*L+1)ACSBL_(p+2*(1-1)+K*L)B, (p+2*(1-1)+K*L+1)A

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

因此，使由上述表达式组的每个表示的每个CS总线组内的CS总线电相等是足够的，其中P＝1，3，5，...或p＝0，2，4，...。Therefore, it is sufficient to make the CS buses within each CS bus group represented by each of the above expression groups electrically equal, where p=1, 3, 5, . . . or p=0, 2, 4, . ...

相同地，在图50中，可以看出施加到CS总线上的振荡电压振荡周期是24H，即，水平扫描周期的2*K*L倍。Similarly, in FIG. 50 , it can be seen that the oscillation period of the oscillation voltage applied to the CS bus line is 24H, that is, 2*K*L times of the horizontal scanning period.

关于参数K和L，尽管上面已经描述了在K＝1和L＝4，6，8，10，或12的情形以及在K＝2和L＝4或6的情形，但是本发明第四方面实施例不限于此。Regarding the parameters K and L, although the above has described the situation at K=1 and L=4, 6, 8, 10, or 12 and the situation at K=2 and L=4 or 6, the fourth aspect of the present invention Embodiments are not limited thereto.

K值仅需是正整数，即K＝1，2，3，4，5，6，7，8，9等，L值仅需是偶数，即L＝2，4，6，8，10，12，14，16，18等。此外，K值和L值可以独立地设定在各自的范围。The K value only needs to be a positive integer, that is, K=1, 2, 3, 4, 5, 6, 7, 8, 9, etc., and the L value only needs to be an even number, that is, L=2, 4, 6, 8, 10, 12 , 14, 16, 18, etc. In addition, the K value and the L value can be independently set in respective ranges.

关于CS干线和CS总线之间的连接，遵循上述规则。Regarding the connection between the CS trunk and the CS bus, the above rules are followed.

特别是当参数K和L的值分别(K＝K，L＝L)是K和L时，连接到相同干线上的CS总线，即，电等效CS总线应该如下：Especially when the values of parameters K and L are K and L respectively (K=K, L=L), the CS bus connected to the same trunk, that is, the electrically equivalent CS bus should be as follows:

CSBL_(p+2*(1-1))B，(p+2*(1-1)+1)ACSBL_(p+2*(1-1))B, (p+2*(1-1)+1)A

CSBL_(p+2*(2-1))B，(p+2*(2-1)+1)ACSBL_(p+2*(2-1))B, (p+2*(2-1)+1)A

CSBL_(p+2*3-1)) B，(p+2*(3-1)+1)ACSBL_(p+2*3-1)) B, (p+2*(3-1)+1)A

……

CSBL_(p+2*(K-1))B，(p+2*(K-1)+1)ACSBL_(p+2*(K-1))B, (p+2*(K-1)+1)A

和and

CSBL_(p+2*(1-1)+K*L+1)B，(p+2*(1-1)+K*L+2)ACSBL_(p+2*(1-1)+K*L+1)B, (p+2*(1-1)+K*L+2)A

CSBL_(p+2*(2-1)+K*L+1)B，(p+2*(2-1)+K*L+2)ACSBL_(p+2*(2-1)+K*L+1)B, (p+2*(2-1)+K*L+2)A

CSBL_(p+2*(3-1)+K*L+1)B，(p+2*(3-1)+K*L+2)ACSBL_(p+2*(3-1)+K*L+1)B, (p+2*(3-1)+K*L+2)A

……

CSBL_(p+2*(K-1)+K*L+1)B，(p+2*(K-1)+K*L+2)ACSBL_(p+2*(K-1)+K*L+1)B, (p+2*(K-1)+K*L+2)A

或or

CSBL_(p+2*(1-1)+1)B，(p+2*(1-1)+2)ACSBL_(p+2*(1-1)+1)B, (p+2*(1-1)+2)A

CSBL_(p+2*(2-1)+1)B，(p+2*(2-1)+2)ACSBL_(p+2*(2-1)+1)B, (p+2*(2-1)+2)A

CSBL_(p+2*(3-1)+1)B，(p+2*(3-1)+2)ACSBL_(p+2*(3-1)+1)B, (p+2*(3-1)+2)A

……

CSBL_(p+2*(K-1)+1)B，(p+2*(K-1)+2)ACSBL_(p+2*(K-1)+1)B, (p+2*(K-1)+2)A

和and

CSBL_(p+2*(1-1)+K*L)B，(p+2*(1-1)+K*L+1)ACSBL_(p+2*(1-1)+K*L)B, (p+2*(1-1)+K*L+1)A

CSBL_(p+2*(2-1)+K*L)B，(p+2*(2-1)+K*L+1)ACSBL_(p+2*(2-1)+K*L)B, (p+2*(2-1)+K*L+1)A

CSBL_(p+2*(3-1)+K*L)B，(p+2*(3-1)+K*L+1)ACSBL_(p+2*(3-1)+K*L)B, (p+2*(3-1)+K*L+1)A

……

CSBL_(p+2*(K-1)+K*L)B，(p+2*(K-1)+K*L+1)ACSBL_(p+2*(K-1)+K*L)B, (p+2*(K-1)+K*L+1)A

其中p＝1，3，5等，或p＝0，2，4等。where p=1, 3, 5, etc., or p=0, 2, 4, etc.

而且，当参数K和L分别(K＝K，L＝L)是K和L时，施加到总线CS上的振荡电压振荡周期可以是水平扫描周期的2*K*L倍。Also, when the parameters K and L are K and L respectively (K=K, L=L), the oscillating period of the oscillating voltage applied to the bus CS may be 2*K*L times the horizontal scanning period.

相同地，尽管在上面的描述中，一个相邻图像元件的第一子像素和另一图像元件的第二子像素公用公共CS总线，当然，它们可以使用电等效的不同CS总线。Likewise, although in the above description, the first sub-pixel of one adjacent image element and the second sub-pixel of another image element share a common CS bus, of course, they may use different CS buses that are electrically equivalent.

本发明的第一方面可以实现降低γ特性的视角依赖性的极高显示质量。本发明的第二方面可以减少在ac驱动过程中造成的液晶显示器的闪烁。The first aspect of the present invention can realize extremely high display quality with reduced viewing angle dependence of the γ characteristic. The second aspect of the present invention can reduce the flickering of the liquid crystal display caused during the ac driving process.

本发明的第三方面可以使根据本发明第一或第二方面的液晶显示器适合大或高分辨率液晶显示器。The third aspect of the present invention makes it possible to adapt the liquid crystal display according to the first or second aspect of the present invention to a large or high resolution liquid crystal display.

本发明的第四方面可以使根据本发明第一或第二方面的液晶显示器适合大或高分辨率液晶显示器，甚至比第三方面更适应。The fourth aspect of the invention makes it possible to adapt the liquid crystal display according to the first or second aspect of the invention to large or high resolution liquid crystal displays, even more so than the third aspect.