CN101673526B - Liquid crystal display device and related driving method - Google Patents

液晶显示装置依据预定周期切换两组栅极驱动电路，通过分时启动的方式，在显示一画面时仅开启两组栅极驱动电路其中之一。两组栅极驱动电路可设置于栅极线的同一侧，或是分别设置于栅极线的两对向侧。切换栅极驱动电路的预定周期可为每隔一个画面进行切换，或是隔数个画面进行切换。

The liquid crystal display device switches two sets of gate driving circuits according to a predetermined cycle, and only one of the two sets of gate driving circuits is turned on when displaying a picture by time-sharing startup. The two sets of gate driving circuits can be arranged on the same side of the gate line, or respectively arranged on two opposite sides of the gate line. The predetermined cycle for switching the gate driving circuit can be switching every other picture, or switching every several pictures.

液晶显示装置及相关驱动方法Liquid crystal display device and related driving method

技术领域technical field

本发明相关于一种液晶显示装置及相关驱动方法，尤指一种利用多组电路来分时驱动的液晶显示装置及相关驱动方法。The present invention relates to a liquid crystal display device and a related driving method, in particular to a liquid crystal display device and a related driving method that utilizes multiple sets of circuits for time-division driving.

背景技术Background technique

液晶显示器(liquid crystal display，LCD)具有低辐射、体积小及低耗能等优点，已逐渐取代传统的阴极射线管(cathode ray tube display，CRT)显示器，因而被广泛地应用在笔记本型计算机、个人数字助理(personaldigital assistant，PDA)、平面电视，或移动电话等信息产品上。传统液晶显示器的方式是利用外部驱动芯片来驱动面板上的像素以显示图像，但为了减少元件数目并降低制造成本，近年来逐渐发展成将驱动电路的结构直接制作于显示面板上，例如应用将栅极驱动电路(gate driver)集成于液晶面板(gate on array，GOA)的技术。Liquid crystal display (liquid crystal display, LCD) has the advantages of low radiation, small size and low energy consumption, and has gradually replaced the traditional cathode ray tube display (CRT) display, so it is widely used in notebook computers, Personal digital assistant (personaldigital assistant, PDA), flat-screen TV, or information products such as mobile phones. The traditional method of liquid crystal display is to use an external driver chip to drive the pixels on the panel to display images. However, in order to reduce the number of components and reduce manufacturing costs, in recent years, it has gradually developed to directly manufacture the structure of the driving circuit on the display panel. For example, the application will The gate driver circuit (gate driver) is integrated in the liquid crystal panel (gate on array, GOA) technology.

请参考图1，图1为先前技术中一液晶显示装置700的简化方块示意图。图1仅显示了液晶显示装置700的部分结构，包含多条栅极线GL(1)～GL(N)、一栅极驱动电路10和一时序控制器(timing controller)20。栅极线GL(1)～GL(N)设于液晶显示装置700的显示区域30内，可分别依据栅极驱动信号GS(1)～GS(N)来驱动像素。栅极驱动电路10设于液晶显示装置700的非显示区域40内，其包含多级移位暂存单元SR(1)～SR(N)，可依据时序控制器20所产生的起始脉冲信号VST(1)和时钟信号CK、XCK来输出栅极驱动信号GS(1)～GS(N)至相对应的栅极线GL(1)～GL(N)，其中N为正整数。液晶显示装置700采用单边布局单端驱动的架构，亦即栅极驱动电路10是设置于栅极线GL(1)～GL(N)的一侧，并从同一侧来驱动栅极线GL(1)～GL(N)。Please refer to FIG. 1 , which is a simplified block diagram of a liquid crystal display device 700 in the prior art. FIG. 1 only shows a partial structure of a liquid crystal display device 700 , including a plurality of gate lines GL( 1 )˜GL(N), a gate driving circuit 10 and a timing controller 20 . The gate lines GL( 1 )˜GL(N) are disposed in the display area 30 of the liquid crystal display device 700 , and can respectively drive the pixels according to the gate driving signals GS( 1 )˜GS(N). The gate drive circuit 10 is disposed in the non-display area 40 of the liquid crystal display device 700, and includes multi-level shift register units SR(1)˜SR(N), which can be generated according to the start pulse signal generated by the timing controller 20 VST( 1 ) and clock signals CK, XCK output gate driving signals GS( 1 )˜GS(N) to corresponding gate lines GL( 1 )˜GL(N), wherein N is a positive integer. The liquid crystal display device 700 adopts a single-side layout single-end driving structure, that is, the gate driving circuit 10 is arranged on one side of the gate lines GL(1)-GL(N), and drives the gate line GL from the same side. (1) ~ GL (N).

请参考图2，图2为先前技术的液晶显示装置700在运作时的时序图。在驱动液晶显示装置700时，第一级移位暂存单元SR(1)依据时序控制器20所产生的起始脉冲信号VST(1)来输出第一级栅极驱动信号GS(1)，而第二级至第N级移位暂存单元SR(2)～SR(N)则分别依据前一级移位暂存单元SR(1)～SR(N-1)所产生的起始脉冲信号VST(2)～VST(N)来输出第二级至第N级栅极驱动信号GS(2)～GS(N)。图2说明了液晶显示装置700在显示多个画面中两相邻画面F(N)和F(N+1)时，起始脉冲信号VST(1)～VST(N)的时序图。Please refer to FIG. 2 , which is a timing diagram of the operation of the prior art liquid crystal display device 700 . When driving the liquid crystal display device 700, the first-stage shift register unit SR(1) outputs the first-stage gate driving signal GS(1) according to the start pulse signal VST(1) generated by the timing controller 20, The shift register units SR(2)～SR(N) of the second stage to the Nth stage are respectively based on the initial pulses generated by the shift register units SR(1)～SR(N-1) of the previous stage The signals VST( 2 )˜VST(N) are used to output the gate driving signals GS( 2 )˜GS(N) of the second stage to the Nth stage. FIG. 2 illustrates a timing diagram of start pulse signals VST(1)-VST(N) when the liquid crystal display device 700 displays two adjacent frames F(N) and F(N+1) among multiple frames.

液晶显示器一般使用无晶硅(amorphous silicon，a-Si)制程来制作各个移位暂存单元内的薄膜晶体管(thin film transistor，TFT)。薄膜晶体管的电特性相关于其栅极电压的应力，施加栅极电压的时间越长，薄膜晶体管的电特性劣化情形越严重，如此会降低液晶显示器的使用期限与可靠度。Liquid crystal displays generally use an amorphous silicon (a-Si) process to manufacture thin film transistors (thin film transistors, TFTs) in each shift register unit. The electrical characteristics of the thin film transistor are related to the stress of the gate voltage. The longer the gate voltage is applied, the worse the electrical characteristics of the thin film transistor will be. This will reduce the service life and reliability of the liquid crystal display.

发明内容Contents of the invention

本发明提供一种液晶显示装置，包含显示区域，其上设有N条互相平行的栅极线，其中N为正整数；第一非显示区域和第二非显示区域，分别位于该显示区域的两对向侧；第一驱动电路，其依据第一组控制信号来运作，该第一驱动电路设于该第一非显示区域内且包含N级串接的第一移位暂存单元，其中该N级第一移位暂存单元中一第n级第一移位暂存单元用来驱动该N条栅极线中一相对应的第n条栅极线以显示多个画面中的第一画面，且n为不大于N的正整数；及第二驱动电路，其依据第二组控制信号来运作且包含N级串接的第二移位暂存单元，其中该N级第二移位暂存单元中一第n级第二移位暂存单元用来驱动该第n条栅极线以显示该多个画面中接续于该第一画面后的第二画面。The invention provides a liquid crystal display device, comprising a display area, on which N gate lines parallel to each other are arranged, wherein N is a positive integer; a first non-display area and a second non-display area are respectively located at the ends of the display area two opposite sides; a first driving circuit, which operates according to a first group of control signals, the first driving circuit is arranged in the first non-display area and includes N stages of first shift register units connected in series, wherein An n-th first shift register unit in the N-stage first shift register unit is used to drive a corresponding n-th gate line among the N gate lines to display the first gate line in a plurality of frames. A frame, and n is a positive integer not greater than N; and a second drive circuit, which operates according to a second set of control signals and includes N stages of second shift register units connected in series, wherein the N stages of second shift An nth second shift register unit in the bit register unit is used to drive the nth gate line to display the second frame following the first frame among the plurality of frames.

本发明还提供一种液晶显示装置，包含一显示区域，其上设有多条互相平行的栅极线；一第一非显示区域和一第二非显示区域，分别位于该显示区域的两对向侧；一第一驱动电路，设于该第一非显示区域内并依据一第一组控制信号来运作，该第一驱动电路包含多级串接的第一移位暂存单元，分别用来驱动该多条栅极线中相对应的奇数条栅极线以显示多个画面中的一第一画面；一第二驱动电路，设于该第二非显示区域内并依据一第二组控制信号来运作，该第二驱动电路包含多级串接的第二移位暂存单元，分别用来驱动该多条栅极线中相对应的偶数条栅极线以显示该第一画面；一第三驱动电路，其依据一第三组控制信号来运作且包含多级串接的第三移位暂存单元，分别用来驱动该相对应的奇数条栅极线以显示该多个画面中接续于该第一画面后的一第二画面；及一第四驱动电路，其依据一第四组控制信号来运作且包含多级串接的第四移位暂存单元，分别用来驱动该相对应的偶数条栅极线以显示该第二画面。The present invention also provides a liquid crystal display device, comprising a display area on which a plurality of gate lines parallel to each other are arranged; a first non-display area and a second non-display area are respectively located in two pairs of the display area. To the side; a first driving circuit, which is set in the first non-display area and operates according to a first group of control signals, the first driving circuit includes a multi-stage serial connection of the first shift temporary storage unit, respectively to drive the corresponding odd-numbered gate lines in the plurality of gate lines to display a first picture in a plurality of pictures; a second driving circuit is arranged in the second non-display area and according to a second group control signal to operate, the second drive circuit includes a multi-stage series-connected second shift temporary storage unit, respectively used to drive the corresponding even-numbered gate lines in the plurality of gate lines to display the first picture; A third driving circuit, which operates according to a third group of control signals and includes a multi-stage series-connected third shift register unit, respectively used to drive the corresponding odd-numbered gate lines to display the multiple frames A second frame following the first frame; and a fourth drive circuit, which operates according to a fourth group of control signals and includes multi-stage serially connected fourth shift register units, respectively used to drive The corresponding even-numbered gate lines are used to display the second frame.

本发明还提供一种液晶显示装置，包含一显示区域，其上设有N条互相平行的栅极线，其中N为正整数；一第一非显示区域和一第二非显示区域，分别位于该显示区域的两对向侧；一第一驱动电路，设于该第一非显示区域内并依据一第一组控制信号来运作，该第一驱动电路包含N级串接的第一移位暂存单元，分别用来驱动该N条栅极线中相对应的栅极线以显示多个画面中的一第一画面；一第二驱动电路，其依据一第二组控制信号来运作，该第二驱动电路包含N级串接的第二移位暂存单元，分别用来驱动相对应的该N条栅极线以显示该第一画面；一第三驱动电路，设于该第一非显示区域内并依据一第三组控制信号来运作，该第三驱动电路包含N级串接的第三移位暂存单元，分别用来驱动相对应的该N条栅极线以显示该多个画面中接续于该第一画面后的一第二画面；及一第四驱动电路，设于该第二非显示区域内并依据一第四组控制信号来运作，该第四驱动电路包含N级串接的第四移位暂存单元，分别用来驱动相对应的该N条栅极线以显示该第二画面。The present invention also provides a liquid crystal display device, comprising a display area on which N gate lines parallel to each other are arranged, wherein N is a positive integer; a first non-display area and a second non-display area are respectively located at The two opposite sides of the display area; a first drive circuit, which is set in the first non-display area and operates according to a first group of control signals, the first drive circuit includes N-stage series-connected first shift a temporary storage unit, which is respectively used to drive corresponding gate lines in the N gate lines to display a first frame in a plurality of frames; a second driving circuit, which operates according to a second group of control signals, The second drive circuit includes N stages of second shift register units connected in series, which are respectively used to drive the corresponding N gate lines to display the first picture; a third drive circuit is arranged on the first In the non-display area and operates according to a third set of control signals, the third drive circuit includes N stages of third shift register units connected in series, respectively used to drive the corresponding N gate lines to display the A second frame following the first frame among the plurality of frames; and a fourth driving circuit disposed in the second non-display area and operating according to a fourth group of control signals, the fourth driving circuit includes N stages of fourth shift register units connected in series are respectively used to drive the corresponding N gate lines to display the second frame.

本发明还提供一种液晶显示装置，包含一显示区域，其上设有多条互相平行的栅极线；一第一非显示区域和一第二非显示区域，分别位于该显示区域的两对向侧；一第一驱动电路，设于该第一非显示区域内并依据一第一组控制信号来运作，该第一驱动电路包含多级串接的第一移位暂存单元，分别用来驱动该多条栅极线中相对应的奇数条栅极线以显示多个画面中的一第一画面；一第二驱动电路，设于该第一非显示区域内并依据一第二组控制信号来运作，该第二驱动电路包含多级串接的第二移位暂存单元，分别用来驱动该多条栅极线中相对应的偶数条栅极线以显示该第一画面；一第三驱动电路，设于该第二非显示区域内并依据一第三组控制信号来运作，该第三驱动电路包含多级串接的第三移位暂存单元，分别用来驱动该相对应的奇数条栅极线以显示该多个画面中接续于该第一画面后的一第二画面；及一第四驱动电路，设于该第二非显示区域内并依据一第四组控制信号来运作，该第四驱动电路包含多级串接的第四移位暂存单元，分别用来驱动该相对应的偶数条栅极线以显示该第二画面。The present invention also provides a liquid crystal display device, comprising a display area on which a plurality of gate lines parallel to each other are arranged; a first non-display area and a second non-display area are respectively located in two pairs of the display area. To the side; a first driving circuit, which is set in the first non-display area and operates according to a first group of control signals, the first driving circuit includes a multi-stage serial connection of the first shift temporary storage unit, respectively to drive the corresponding odd-numbered gate lines in the plurality of gate lines to display a first frame in a plurality of frames; a second driving circuit is arranged in the first non-display area and according to a second group control signal to operate, the second drive circuit includes a multi-stage series-connected second shift temporary storage unit, respectively used to drive the corresponding even-numbered gate lines in the plurality of gate lines to display the first picture; A third drive circuit is set in the second non-display area and operates according to a third set of control signals. The third drive circuit includes a multi-stage series-connected third shift register unit, respectively used to drive the Corresponding odd-numbered gate lines are used to display a second frame following the first frame among the plurality of frames; and a fourth driving circuit is arranged in the second non-display area and according to a fourth group The fourth driving circuit includes multi-stage serially connected fourth shift register units, which are respectively used to drive the corresponding even-numbered gate lines to display the second frame.

本发明还提供一种液晶显示装置的驱动方法，包含以一第一驱动电路来驱动一栅极线以显示多个画面中的一第一画面；及关闭该第一驱动电路并以一第二驱动电路来驱动该栅极线以显示该多个画面中接续于该第一画面后的一第二画面。The present invention also provides a driving method of a liquid crystal display device, including driving a gate line with a first driving circuit to display a first frame in a plurality of frames; and closing the first driving circuit and using a second The driving circuit is used to drive the gate line to display a second frame following the first frame among the plurality of frames.

附图说明Description of drawings

图1为先前技术中一液晶显示装置的简化方块示意图。FIG. 1 is a simplified block diagram of a liquid crystal display device in the prior art.

图2为图1的液晶显示装置在运作时的时序图。FIG. 2 is a timing diagram of the operation of the liquid crystal display device of FIG. 1 .

图3为本发明第一实施例中一液晶显示装置的简化方块示意图。FIG. 3 is a simplified block diagram of a liquid crystal display device in the first embodiment of the present invention.

图4为本发明第二实施例中一液晶显示装置的简化方块示意图。FIG. 4 is a simplified block diagram of a liquid crystal display device in a second embodiment of the present invention.

图5为本发明第一和第二实施例的液晶显示装置在运作时的时序图。FIG. 5 is a timing diagram of the operation of the liquid crystal display device according to the first and second embodiments of the present invention.

图6为本发明第三实施例中一液晶显示装置的简化方块示意图。FIG. 6 is a simplified block diagram of a liquid crystal display device in a third embodiment of the present invention.

图7为本发明第四实施例中一液晶显示装置的简化方块示意图。FIG. 7 is a simplified block diagram of a liquid crystal display device in a fourth embodiment of the present invention.

图8为本发明第五实施例中一液晶显示装置的简化方块示意图。FIG. 8 is a simplified block diagram of a liquid crystal display device in a fifth embodiment of the present invention.

图9为本发明第三至第五实施例的液晶显示装置在运作时的时序图。FIG. 9 is a timing diagram of the operation of the liquid crystal display device according to the third to fifth embodiments of the present invention.

图10为本发明第六实施例中一液晶显示装置的简化方块示意图。FIG. 10 is a simplified block diagram of a liquid crystal display device in a sixth embodiment of the present invention.

图11为本发明第六实施例的液晶显示装置在运作时的时序图。FIG. 11 is a timing diagram of the operation of the liquid crystal display device according to the sixth embodiment of the present invention.

[主要元件标号说明][Description of main component labels]

20  时序控制器                GL(1)～GL(N)  栅极线20 Timing controller GL(1)～GL(N) Gate line

30  显示区域                  40、40L、40R  非显示区域30 display area 40, 40L, 40R non-display area

10、11、10A、10A’、10B、10B’     栅极驱动电路10, 11, 10A, 10A’, 10B, 10B’ gate drive circuit

100、200、300、400、500、600、700  液晶显示装置100, 200, 300, 400, 500, 600, 700 LCD display device

SR(1)、SR(2)、SR(N)、SR’(1)、SR’(2)、SR’(N)、SR_A(1)、SR_A(2)、SR_A(n)、SR_A(N)、SR_A’(1)、SR_A’(2)、SR_A’(n)、SR_A’(N)、SR_B(1)、SR_B(2)、SR_B(n)、SR_B(N)、SR_B’(1)、SR_B’(2)、SR_B’(n)、SR_B’(N)  移位暂存单元SR(1), SR(2), SR(N), SR'(1), SR'(2), SR'(N), SR_A(1), SR_A(2), SR_A(n), SR_A( N), SR_A'(1), SR_A'(2), SR_A'(n), SR_A'(N), SR_B(1), SR_B(2), SR_B(n), SR_B(N), SR_B'( 1), SR_B'(2), SR_B'(n), SR_B'(N) shift temporary storage unit

具体实施方式Detailed ways

请参考图3，图3为本发明第一实施例中一液晶显示装置100的简化方块示意图。图3仅显示了液晶显示装置100的部分结构，包含多条栅极线GL(1)～GL(N)、两栅极驱动电路10和11，以及一时序控制器20。栅极线GL(1)～GL(N)设于液晶显示装置100的显示区域30内，可分别依据栅极驱动信号GS(1)～GS(N)来驱动像素。栅极驱动电路10设于液晶显示装置100的非显示区域40L内，其包含多级移位暂存单元SR(1)～SR(N)，可依据时序控制器20所产生的起始脉冲信号VST(1)和时钟信号CK、XCK来分别输出栅极驱动信号GS(1)～GS(N)至相对应的栅极线GL(1)～GL(N)；栅极驱动电路11设于液晶显示装置100的非显示区域40R内，其包含多级移位暂存单元SR’(1)～SR’(N)，可依据时序控制器20所产生的起始脉冲信号VST’(1)和时钟信号CK’、XCK’来分别输出栅极驱动信号GS(1)～GS(N)至相对应的栅极线GL(1)～GL(N)。其中，非显示区域40L和40R分别位于显示区域30的两对向侧，且N为正整数。在图3中，显示区域30和非显示区域40L、40R的标示范围仅为了说明各元件的位置，并不限定本发明液晶显示装置100中各元件的实际大小比例。Please refer to FIG. 3 , which is a simplified block diagram of a liquid crystal display device 100 in the first embodiment of the present invention. FIG. 3 only shows a partial structure of the liquid crystal display device 100 , including a plurality of gate lines GL( 1 )˜GL(N), two gate driving circuits 10 and 11 , and a timing controller 20 . The gate lines GL( 1 )˜GL(N) are disposed in the display area 30 of the liquid crystal display device 100 , and can respectively drive the pixels according to the gate driving signals GS( 1 )˜GS(N). The gate drive circuit 10 is disposed in the non-display area 40L of the liquid crystal display device 100, and includes multi-stage shift register units SR(1)˜SR(N), which can be generated according to the start pulse signal generated by the timing controller 20. VST(1) and clock signals CK and XCK respectively output gate driving signals GS(1)-GS(N) to corresponding gate lines GL(1)-GL(N); the gate driving circuit 11 is set at In the non-display region 40R of the liquid crystal display device 100 , it includes multi-level shift register units SR′(1)˜SR′(N), which can be generated according to the start pulse signal VST′(1) generated by the timing controller 20 The gate driving signals GS( 1 )˜GS(N) are respectively outputted to the corresponding gate lines GL( 1 )˜GL(N) together with the clock signals CK′, XCK′. Wherein, the non-display areas 40L and 40R are respectively located on opposite sides of the display area 30 , and N is a positive integer. In FIG. 3 , the marked ranges of the display area 30 and the non-display areas 40L, 40R are only for illustrating the positions of the components, and do not limit the actual size ratio of the components in the liquid crystal display device 100 of the present invention.

本发明第一实施例的液晶显示装置100采用双边布局单端驱动的架构，并以分时启动的方式来驱动。换而言之，栅极驱动电路10和11被分别设置于栅极线GL(1)～GL(N)的两对向侧，在显示多个画面中一画面F(N)时，栅极驱动信号GS(1)～GS(N)由图3左侧的栅极驱动电路10来提供(由实线箭头来表示)；在显示接续画面F(N)之后的画面F(N+1)时，栅极驱动信号GS(1)～GS(N)由图3右侧的栅极驱动电路11来提供(由虚线箭头来表示)。The liquid crystal display device 100 of the first embodiment of the present invention adopts a double-sided layout single-ended drive architecture, and is driven in a time-division start-up manner. In other words, the gate driving circuits 10 and 11 are respectively arranged on opposite sides of the gate lines GL(1)-GL(N). Drive signals GS (1) ~ GS (N) are provided by the gate drive circuit 10 on the left side of Fig. 3 (represented by the solid arrow); When , the gate driving signals GS(1)˜GS(N) are provided by the gate driving circuit 11 on the right side of FIG. 3 (indicated by dashed arrows).

请参考图4，图4为本发明第二实施例中一液晶显示装置200的简化方块示意图。图4仅显示了液晶显示装置200的部分结构，包含多条栅极线GL(1)～GL(N)、两栅极驱动电路10和11以及一时序控制器20。栅极线GL(1)～GL(N)设于液晶显示装置200的显示区域30内，可分别依据栅极驱动信号GS(1)～GS(N)来驱动像素。栅极驱动电路10设于液晶显示装置200的非显示区域40内，其包含多级移位暂存单元SR(1)～SR(N)，可依据时序控制器20所产生的起始脉冲信号VST(1)和时钟信号CK、XCK来分别输出栅极驱动信号GS(1)～GS(N)至相对应的栅极线GL(1)～GL(N)；栅极驱动电路11亦设于液晶显示装置200的非显示区域40内，其包含多级移位暂存单元SR’(1)～SR’(N)，可依据时序控制器20所产生的起始脉冲信号VST’(1)和时钟信号CK’、XCK’来分别输出栅极驱动信号GS(1)～GS(N)至相对应的栅极线GL(1)～GL(N)，其中N为正整数。在图4中，显示区域30和非显示区域40的标示范围仅为了说明各元件的位置，并不限定本发明液晶显示装置200中各元件的实际大小比例。Please refer to FIG. 4 , which is a simplified block diagram of a liquid crystal display device 200 in a second embodiment of the present invention. FIG. 4 only shows a partial structure of the liquid crystal display device 200 , including a plurality of gate lines GL( 1 )˜GL(N), two gate driving circuits 10 and 11 and a timing controller 20 . The gate lines GL( 1 )˜GL(N) are disposed in the display area 30 of the liquid crystal display device 200 , and can respectively drive the pixels according to the gate driving signals GS( 1 )˜GS(N). The gate drive circuit 10 is disposed in the non-display area 40 of the liquid crystal display device 200, and includes multi-stage shift register units SR(1)˜SR(N), which can be generated according to the start pulse signal generated by the timing controller 20 VST(1) and clock signals CK and XCK are used to respectively output gate driving signals GS(1)～GS(N) to corresponding gate lines GL(1)～GL(N); the gate driving circuit 11 is also set In the non-display area 40 of the liquid crystal display device 200, it includes multi-level shift register units SR'(1)˜SR'(N), which can be generated according to the start pulse signal VST'(1) generated by the timing controller 20 ) and clock signals CK′, XCK′ to respectively output gate driving signals GS( 1 )˜GS(N) to corresponding gate lines GL( 1 )˜GL(N), wherein N is a positive integer. In FIG. 4 , the marked ranges of the display area 30 and the non-display area 40 are only for illustrating the position of each element, and do not limit the actual size ratio of each element in the liquid crystal display device 200 of the present invention.

本发明第二实施例的液晶显示装置200采用单边布局单端驱动的架构，并以分时启动的方式来驱动。换而言之，栅极驱动电路10和11皆设置于栅极线GL(1)～GL(N)的一侧，并从同一侧来驱动栅极线GL(1)～GL(N)。在显示多个画面中一画面F(N)时，栅极驱动信号GS(1)～GS(N)由栅极驱动电路10来提供(由实线箭头来表示)；在显示接续画面F(N)之后的画面F(N+1)时，栅极驱动信号GS(1)～GS(N)由栅极驱动电路11来提供(由虚线箭头来表示)。The liquid crystal display device 200 of the second embodiment of the present invention adopts a single-side layout and single-end driving architecture, and is driven in a time-sharing start-up manner. In other words, the gate driving circuits 10 and 11 are both disposed on one side of the gate lines GL( 1 )˜GL(N), and drive the gate lines GL( 1 )˜GL(N) from the same side. When displaying a frame F (N) in a plurality of frames, the gate drive signals GS (1) ~ GS (N) are provided by the gate drive circuit 10 (represented by the solid arrow); In frame F(N+1) after N), the gate driving signals GS( 1 )˜GS(N) are provided by the gate driving circuit 11 (indicated by dashed arrows).

请参考图5，图5为本发明第一实施例的液晶显示装置100和本发明第二实施例的液晶显示装置200在运作时的时序图。在栅极驱动电路10中，第一级移位暂存单元SR(1)依据时序控制器20所产生的起始脉冲信号VST(1)来输出第一级栅极驱动信号GS(1)，而第二级至第N级移位暂存单元SR(2)～SR(N)则分别依据前一级移位暂存单元SR(1)～SR(N-1)所产生的起始脉冲信号VST(2)～VST(N)来分别输出第二级至第N级栅极驱动信号GS(2)～GS(N)；在栅极驱动电路11中，第一级移位暂存单元SR’(1)依据时序控制器20所产生的起始脉冲信号VST’(1)来输出第一级栅极驱动信号GS(1)，而第二级至第N级移位暂存单元SR’(2)～SR’(N)则分别依据前一级移位暂存单元SR’(1)～SR’(N-1)所产生的起始脉冲信号VST’(2)～VST’(N)来输出第二级至第N级栅极驱动信号GS(2)～GS(N)。在本发明中的液晶显示装置100和200中，两组栅极驱动电路10和11可依据不同画面而交替地开启和关闭，交替开关的周期可为一个或多个画面。假设多个画面中两相邻画面F(N)和F(N+1)之间为切换栅极驱动电路10和11的时间点，此时起始脉冲信号VST(1)～VST(N)和VST’(1)～VST’(N)的时序图如图5所示。Please refer to FIG. 5 . FIG. 5 is a timing diagram of the operation of the liquid crystal display device 100 according to the first embodiment of the present invention and the liquid crystal display device 200 according to the second embodiment of the present invention. In the gate drive circuit 10, the first-stage shift register unit SR(1) outputs the first-stage gate drive signal GS(1) according to the start pulse signal VST(1) generated by the timing controller 20, The shift register units SR(2)～SR(N) of the second stage to the Nth stage are respectively based on the initial pulses generated by the shift register units SR(1)～SR(N-1) of the previous stage Signals VST(2)~VST(N) to output the gate drive signals GS(2)~GS(N) from the second stage to the Nth stage respectively; in the gate drive circuit 11, the shift register unit of the first stage SR'(1) outputs the first stage gate drive signal GS(1) according to the start pulse signal VST'(1) generated by the timing controller 20, and the shift register unit SR from the second stage to the Nth stage '(2)～SR'(N) are respectively based on the initial pulse signals VST'(2)～VST'( N) to output the gate driving signals GS(2)˜GS(N) of the second stage to the Nth stage. In the liquid crystal display devices 100 and 200 of the present invention, the two sets of gate driving circuits 10 and 11 can be turned on and off alternately according to different frames, and the cycle of alternate switching can be one or more frames. Assuming that the time point between two adjacent frames F(N) and F(N+1) in multiple frames is the time point for switching gate drive circuits 10 and 11, at this time the start pulse signal VST(1)-VST(N) and VST' (1) ~ VST' (N) timing diagram shown in Figure 5.

请参考图6，图6为本发明第三实施例中一液晶显示装置300的简化方块示意图。图6仅显示了液晶显示装置300的部分结构，包含多条栅极线GL(1)～GL(N)、四栅极驱动电路10A、10B、10A’和10B’，以及一时序控制器20。栅极线GL(1)～GL(N)设于液晶显示装置300的显示区域30内，可分别依据栅极驱动信号GS(1)～GS(N)来驱动像素。栅极驱动电路10A设于液晶显示装置300的非显示区域40L内，其包含多级移位暂存单元SR_A(1)～SR_A(n)，可依据时序控制器20所产生的起始脉冲信号VST_A(1)和时钟信号CKA、XCKA来分别输出奇数级栅极驱动信号GS(1)、GS(3)、...、GS(N-1)至相对应的奇数条栅极线GL(1)、GL(3)、...、GL(N-1)。栅极驱动电路10B设于液晶显示装置300的非显示区域40L内，其包含多级移位暂存单元SR_B(1)～SR_B(n)，可依据时序控制器20所产生的起始脉冲信号VST_B(1)和时钟信号CKB、XCKB来分别输出偶数级栅极驱动信号GS(2)、GS(4)、...、GS(N)至相对应的偶数条栅极线GL(2)、GL(4)、...、GL(N)。栅极驱动电路10A’设于液晶显示装置300的非显示区域40R内，其包含多级移位暂存单元SR_A’(1)～SR_A’(n)，可依据时序控制器20所产生的起始脉冲信号VST_A’(1)和时钟信号CKA’、XCKA’来分别输出奇数级栅极驱动信号GS(1)、GS(3)、...、GS(N-1)至相对应的奇数条栅极线GL(1)、GL(3)、...、GL(N-1)。栅极驱动电路10B’设于液晶显示装置300的非显示区域40R内，其包含多级移位暂存单元SR_B’(1)～SR_B’(n)，可依据时序控制器20所产生的起始脉冲信号VST_B’(1)和时钟信号CKB’、XCKB’来分别输出偶数级栅极驱动信号GS(2)、GS(4)、...、GS(N)至相对应的偶数条栅极线GL(2)、GL(4)、...、GL(N)。其中，非显示区域40L和40R分别位于显示区域30的两对向侧，N和n为正整数，且N的值为2n。在图6中，显示区域30和非显示区域40L、40R的标示范围仅为了说明各元件的位置，并不限定本发明液晶显示装置300中各元件的实际大小比例。Please refer to FIG. 6 , which is a simplified block diagram of a liquid crystal display device 300 in a third embodiment of the present invention. FIG. 6 only shows a partial structure of a liquid crystal display device 300, including a plurality of gate lines GL(1)-GL(N), four gate driving circuits 10A, 10B, 10A' and 10B', and a timing controller 20 . The gate lines GL( 1 )˜GL(N) are disposed in the display area 30 of the liquid crystal display device 300 , and can respectively drive the pixels according to the gate driving signals GS( 1 )˜GS(N). The gate drive circuit 10A is disposed in the non-display area 40L of the liquid crystal display device 300 , and includes multi-stage shift register units SR_A(1)˜SR_A(n), which can be generated according to the start pulse signal generated by the timing controller 20 VST_A(1) and clock signals CKA, XCKA respectively output odd-numbered gate drive signals GS(1), GS(3), ..., GS(N-1) to corresponding odd-numbered gate lines GL( 1), GL(3), . . . , GL(N-1). The gate drive circuit 10B is disposed in the non-display area 40L of the liquid crystal display device 300 , and includes multi-stage shift register units SR_B(1)˜SR_B(n), which can be generated according to the start pulse signal generated by the timing controller 20 VST_B(1) and clock signals CKB and XCKB respectively output even-numbered gate drive signals GS(2), GS(4),...,GS(N) to corresponding even-numbered gate lines GL(2) , GL(4), . . . , GL(N). The gate driving circuit 10A' is disposed in the non-display region 40R of the liquid crystal display device 300 , and includes multi-level shift register units SR_A'(1)˜SR_A'(n), which can be generated according to the timing controller 20 Start pulse signal VST_A'(1) and clock signals CKA', XCKA' to respectively output odd-level gate drive signals GS(1), GS(3),...,GS(N-1) to the corresponding odd-numbered Gate lines GL(1), GL(3), . . . , GL(N-1). The gate drive circuit 10B' is located in the non-display region 40R of the liquid crystal display device 300 , and includes multi-level shift register units SR_B'(1)˜SR_B'(n), which can be generated according to the timing controller 20. Start pulse signal VST_B'(1) and clock signals CKB', XCKB' to output even-level gate drive signals GS(2), GS(4),...,GS(N) to corresponding even-numbered grids Epipolar lines GL(2), GL(4), . . . , GL(N). Wherein, the non-display areas 40L and 40R are respectively located on opposite sides of the display area 30 , N and n are positive integers, and the value of N is 2n. In FIG. 6 , the marked ranges of the display area 30 and the non-display areas 40L, 40R are only for illustrating the positions of the components, and do not limit the actual size ratio of the components in the liquid crystal display device 300 of the present invention.

本发明第三实施例的液晶显示装置300采用双边布局单端驱动的架构，并以分时启动的方式来驱动。换而言之，栅极驱动电路10A和10B设置于栅极线GL(1)～GL(N)的一侧，栅极驱动电路10A’和10B’设置于栅极线GL(1)～GL(N)的另一侧，但显示画面时仅会开启设置于栅极线GL(1)～GL(N)其中一侧的栅极驱动电路。举例来说，在显示多个画面中一画面F(N)时，栅极驱动电路10A和10B为开启，而栅极驱动电路10A’和10B’为关闭，此时栅极驱动信号GS(1)～GS(N)由栅极驱动电路10A和10B来提供(由实线箭头来表示)；在显示接续画面F(N)之后的画面F(N+1)时，栅极驱动电路10A’和10B’为开启，而栅极驱动电路10A和10B为关闭，此时栅极驱动信号GS(1)～GS(N)由栅极驱动电路10A’和10B’来提供(由虚线箭头来表示)。The liquid crystal display device 300 of the third embodiment of the present invention adopts a double-sided layout single-ended drive architecture, and is driven in a time-division start-up manner. In other words, the gate driving circuits 10A and 10B are arranged on one side of the gate lines GL(1)˜GL(N), and the gate driving circuits 10A′ and 10B′ are arranged on one side of the gate lines GL(1)˜GL(N). (N), but only the gate driving circuit disposed on one side of the gate lines GL( 1 )˜GL(N) will be turned on when displaying a picture. For example, when displaying a frame F(N) among a plurality of frames, the gate drive circuits 10A and 10B are turned on, and the gate drive circuits 10A' and 10B' are turned off. At this time, the gate drive signal GS(1 )～GS(N) are provided by the gate drive circuits 10A and 10B (represented by solid arrows); when displaying the picture F(N+1) following the picture F(N), the gate drive circuit 10A' and 10B' are turned on, and the gate drive circuits 10A and 10B are turned off. At this time, the gate drive signals GS(1)-GS(N) are provided by the gate drive circuits 10A' and 10B' (represented by dashed arrows ).

请参考图7，图7为本发明第四实施例中一液晶显示装置400的简化方块示意图。图7仅显示了液晶显示装置400的部分结构，包含多条栅极线GL(1)～GL(N)、四栅极驱动电路10A、10B、10A’和10B’，以及一时序控制器20。栅极线GL(1)～GL(N)设于液晶显示装置400的显示区域30内，可分别依据栅极驱动信号GS(1)～GS(N)来驱动像素。栅极驱动电路10A设于液晶显示装置400的非显示区域40L内，其包含多级移位暂存单元SR_A(1)～SR_A(n)，可依据时序控制器20所产生的起始脉冲信号VST_A(1)和时钟信号CKA、XCKA来分别输出奇数级栅极驱动信号GS(1)、GS(3)、...、GS(N-1)至相对应的奇数条栅极线GL(1)、GL(3)、...、GL(N-1)。栅极驱动电路10B设于液晶显示装置400的非显示区域40R内，其包含多级移位暂存单元SR_B(1)～SR_B(n)，可依据时序控制器20所产生的起始脉冲信号VST_B(1)和时钟信号CKB、XCKB来分别输出偶数级栅极驱动信号GS(2)、GS(4)、...、GS(N)至相对应的偶数条栅极线GL(2)、GL(4)、...、GL(N)。栅极驱动电路10A’设于液晶显示装置400的非显示区域40R内，其包含多级移位暂存单元SR_A’(1)～SR_A’(n)，可依据时序控制器20所产生的起始脉冲信号VST_A’(1)和时钟信号CKA’、XCKA’来分别输出奇数级栅极驱动信号GS(1)、GS(3)、...、GS(N-1)至相对应的奇数条栅极线GL(1)、GL(3)、...、GL(N-1)。栅极驱动电路10B’设于液晶显示装置400的非显示区域40L内，其包含多级移位暂存单元SR_B’(1)～SR_B’(n)，可依据时序控制器20所产生的起始脉冲信号VST_B’(1)和时钟信号CKB’、XCKB’来分别输出偶数级栅极驱动信号GS(2)、GS(4)、...、GS(N)至相对应的偶数条栅极线GL(2)、GL(4)、...、GL(N)。其中，非显示区域40L和40R分别位于显示区域30的两对向侧，N和n为正整数，且N的值为2n。在图7中，显示区域30和非显示区域40L、40R的标示范围仅为了说明各元件的位置，并不限定本发明液晶显示装置400中各元件的实际大小比例。Please refer to FIG. 7 , which is a simplified block diagram of a liquid crystal display device 400 in a fourth embodiment of the present invention. FIG. 7 only shows a partial structure of a liquid crystal display device 400, including a plurality of gate lines GL(1)-GL(N), four gate driving circuits 10A, 10B, 10A' and 10B', and a timing controller 20 . The gate lines GL( 1 )˜GL(N) are disposed in the display area 30 of the liquid crystal display device 400 , and can respectively drive the pixels according to the gate driving signals GS( 1 )˜GS(N). The gate drive circuit 10A is disposed in the non-display area 40L of the liquid crystal display device 400, and includes multi-stage shift register units SR_A(1)˜SR_A(n), which can be generated according to the start pulse signal generated by the timing controller 20 VST_A(1) and clock signals CKA, XCKA respectively output odd-numbered gate drive signals GS(1), GS(3), ..., GS(N-1) to corresponding odd-numbered gate lines GL( 1), GL(3), . . . , GL(N-1). The gate drive circuit 10B is disposed in the non-display region 40R of the liquid crystal display device 400 , and includes multi-level shift register units SR_B(1)˜SR_B(n), which can be generated according to the start pulse signal generated by the timing controller 20 VST_B(1) and clock signals CKB and XCKB respectively output even-numbered gate drive signals GS(2), GS(4),...,GS(N) to corresponding even-numbered gate lines GL(2) , GL(4), . . . , GL(N). The gate drive circuit 10A' is disposed in the non-display region 40R of the liquid crystal display device 400 , and includes multi-level shift register units SR_A'(1)˜SR_A'(n), which can be generated according to the timing controller 20. Start pulse signal VST_A'(1) and clock signals CKA', XCKA' to respectively output odd-level gate drive signals GS(1), GS(3),...,GS(N-1) to the corresponding odd-numbered Gate lines GL(1), GL(3), . . . , GL(N-1). The gate drive circuit 10B' is disposed in the non-display area 40L of the liquid crystal display device 400 , and includes multi-stage shift register units SR_B'(1)˜SR_B'(n), which can be generated according to the timing controller 20. Start pulse signal VST_B'(1) and clock signals CKB', XCKB' to output even-level gate drive signals GS(2), GS(4),...,GS(N) to corresponding even-numbered grids Epipolar lines GL(2), GL(4), . . . , GL(N). Wherein, the non-display areas 40L and 40R are respectively located on opposite sides of the display area 30 , N and n are positive integers, and the value of N is 2n. In FIG. 7 , the marked ranges of the display area 30 and the non-display areas 40L, 40R are only for illustrating the positions of the components, and do not limit the actual size ratios of the components in the liquid crystal display device 400 of the present invention.

本发明第四实施例的液晶显示装置400采用双边布局双端驱动的架构，并以分时启动的方式来驱动。换而言之，栅极驱动电路10A和10A’分别设置于栅极线GL(1)～GL(N)的两对向侧，而栅极驱动电路10B和10B’分别设置于栅极线GL(1)～GL(N)的两对向侧，但显示画面时仅会在栅极线GL(1)～GL(N)的两侧各开启一栅极驱动电路。举例来说，在显示多个画面中一画面F(N)时，栅极驱动电路10A和10B为开启，而栅极驱动电路10A’和10B’为关闭，此时栅极驱动信号GS(1)～GS(N)由栅极驱动电路10A和10B来提供(由实线箭头来表示)；在显示接续画面F(N)之后的画面F(N+1)时，栅极驱动电路10A’和10B’为开启，而栅极驱动电路10A和10B为关闭，此时栅极驱动信号GS(1)～GS(N)由栅极驱动电路10A’和10B’来提供(由虚线箭头来表示)。The liquid crystal display device 400 of the fourth embodiment of the present invention adopts a dual-side layout and double-terminal drive architecture, and is driven in a time-sharing start-up manner. In other words, the gate driving circuits 10A and 10A' are respectively disposed on opposite sides of the gate lines GL(1)˜GL(N), and the gate driving circuits 10B and 10B' are respectively disposed on the gate line GL. (1)-GL(N) two opposite sides, but only one gate driving circuit is turned on on both sides of the gate lines GL(1)-GL(N) when displaying a picture. For example, when displaying a frame F(N) among a plurality of frames, the gate drive circuits 10A and 10B are turned on, and the gate drive circuits 10A' and 10B' are turned off. At this time, the gate drive signal GS(1 )～GS(N) are provided by the gate drive circuits 10A and 10B (represented by solid arrows); when displaying the picture F(N+1) following the picture F(N), the gate drive circuit 10A' and 10B' are turned on, and the gate drive circuits 10A and 10B are turned off. At this time, the gate drive signals GS(1)-GS(N) are provided by the gate drive circuits 10A' and 10B' (represented by dashed arrows ).

请参考图8，图8为本发明第五实施例中一液晶显示装置500的简化方块示意图。图8仅显示了液晶显示装置500的部分结构，包含多条栅极线GL(1)～GL(N)、四栅极驱动电路10A、10B、10A’和10B’，以及一时序控制器20。栅极线GL(1)～GL(N)设于液晶显示装置500的显示区域30内，可分别依据栅极驱动信号GS(1)～GS(N)来驱动像素。栅极驱动电路10A设于液晶显示装置500的非显示区域40L内，其包含多级移位暂存单元SR_A(1)～SR_A(n)，可依据时序控制器20所产生的起始脉冲信号VST_A(1)和时钟信号CKA、XCKA来分别输出奇数级栅极驱动信号GS(1)、GS(3)、...、GS(N-1)至相对应的奇数条栅极线GL(1)、GL(3)、...、GL(N-1)。栅极驱动电路10B设于液晶显示装置500的非显示区域40R内，其包含多级移位暂存单元SR_B(1)～SR_B(n)，可依据时序控制器20所产生的起始脉冲信号VST_B(1)和时钟信号CKB、XCKB来分别输出偶数级栅极驱动信号GS(2)、GS(4)、...、GS(N)至相对应的偶数条栅极线GL(2)、GL(4)、...、GL(N)。栅极驱动电路10A’设于液晶显示装置500的非显示区域40L内，其包含多级移位暂存单元SR_A’(1)～SR_A’(n)，可依据时序控制器20所产生的起始脉冲信号VST_A’(1)和时钟信号CKA’、XCKA’来分别输出奇数级栅极驱动信号GS(1)、GS(3)、...、GS(N-1)至相对应的奇数条栅极线GL(1)、GL(3)、...、GL(N-1)。栅极驱动电路10B’设于液晶显示装置500的非显示区域40R内，其包含多级移位暂存单元SR_B’(1)～SR_B’(n)，可依据时序控制器20所产生的起始脉冲信号VST_B’(1)和时钟信号CKB’、XCKB’来分别输出偶数级栅极驱动信号GS(2)、GS(4)、...、GS(N)至相对应的偶数条栅极线GL(2)、GL(4)、...、GL(N)。其中，非显示区域40L和40R分别位于显示区域30的两对向侧，N和n为正整数，且N的值为2n。在图8中，显示区域30和非显示区域40L、40R的标示范围仅为了说明各元件的位置，并不限定本发明液晶显示装置500中各元件的实际大小比例。Please refer to FIG. 8 , which is a simplified block diagram of a liquid crystal display device 500 in a fifth embodiment of the present invention. FIG. 8 only shows a partial structure of a liquid crystal display device 500, including a plurality of gate lines GL(1)-GL(N), four gate driving circuits 10A, 10B, 10A' and 10B', and a timing controller 20 . The gate lines GL( 1 )˜GL(N) are disposed in the display area 30 of the liquid crystal display device 500 , and can respectively drive the pixels according to the gate driving signals GS( 1 )˜GS(N). The gate drive circuit 10A is disposed in the non-display area 40L of the liquid crystal display device 500 , and includes multi-stage shift register units SR_A(1)˜SR_A(n), which can be generated according to the start pulse signal generated by the timing controller 20 VST_A(1) and clock signals CKA, XCKA respectively output odd-numbered gate drive signals GS(1), GS(3), ..., GS(N-1) to corresponding odd-numbered gate lines GL( 1), GL(3), . . . , GL(N-1). The gate drive circuit 10B is disposed in the non-display region 40R of the liquid crystal display device 500 , and includes multi-stage shift register units SR_B(1)˜SR_B(n), which can be generated according to the start pulse signal generated by the timing controller 20 VST_B(1) and clock signals CKB and XCKB respectively output even-numbered gate drive signals GS(2), GS(4),...,GS(N) to corresponding even-numbered gate lines GL(2) , GL(4), . . . , GL(N). The gate driving circuit 10A' is disposed in the non-display area 40L of the liquid crystal display device 500 , and includes multi-level shift register units SR_A'(1)˜SR_A'(n), which can be generated according to the timing controller 20. Start pulse signal VST_A'(1) and clock signals CKA', XCKA' to respectively output odd-level gate drive signals GS(1), GS(3),...,GS(N-1) to the corresponding odd-numbered Gate lines GL(1), GL(3), . . . , GL(N-1). The gate driving circuit 10B' is disposed in the non-display region 40R of the liquid crystal display device 500 , and includes multi-level shift register units SR_B'(1)˜SR_B'(n), which can be generated according to the timing controller 20. Start pulse signal VST_B'(1) and clock signals CKB', XCKB' to output even-level gate drive signals GS(2), GS(4),...,GS(N) to corresponding even-numbered grids Epipolar lines GL(2), GL(4), . . . , GL(N). Wherein, the non-display areas 40L and 40R are respectively located on opposite sides of the display area 30 , N and n are positive integers, and the value of N is 2n. In FIG. 8 , the marked ranges of the display area 30 and the non-display areas 40L, 40R are only for illustrating the positions of the components, and do not limit the actual size ratios of the components in the liquid crystal display device 500 of the present invention.

本发明第五实施例的液晶显示装置500采用双边布局双端驱动的架构，并以分时启动的方式来驱动。换而言之，栅极驱动电路10A和10A’设置于栅极线GL(1)～GL(N)的一侧，而栅极驱动电路10B和10B’则设置于栅极线GL(1)～GL(N)的另一侧，但显示画面时仅会在栅极线GL(1)～GL(N)的两侧各开启一栅极驱动电路。举例来说，在显示多个画面中一画面F(N)时，栅极驱动电路10A和10B为开启，而栅极驱动电路10A’和10B’为关闭，此时栅极驱动信号GS(1)～GS(N)由栅极驱动电路10A和10B来提供(由实线箭头来表示)；在显示接续画面F(N)之后的画面F(N+1)时，栅极驱动电路10A’和10B’为开启，而栅极驱动电路10A和10B为关闭，此时栅极驱动信号GS(1)～GS(N)由栅极驱动电路10A’和10B’来提供(由虚线箭头来表示)。The liquid crystal display device 500 of the fifth embodiment of the present invention adopts a dual-side layout and double-terminal drive architecture, and is driven in a time-sharing start-up manner. In other words, the gate driving circuits 10A and 10A' are disposed on one side of the gate lines GL(1)˜GL(N), while the gate driving circuits 10B and 10B' are disposed on the gate line GL(1) ˜GL(N), but only one gate driving circuit is turned on on both sides of the gate lines GL( 1 )˜GL(N) when a picture is displayed. For example, when displaying a frame F(N) among a plurality of frames, the gate drive circuits 10A and 10B are turned on, and the gate drive circuits 10A' and 10B' are turned off. At this time, the gate drive signal GS(1 )～GS(N) are provided by the gate drive circuits 10A and 10B (represented by solid arrows); when displaying the picture F(N+1) following the picture F(N), the gate drive circuit 10A' and 10B' are turned on, and the gate drive circuits 10A and 10B are turned off. At this time, the gate drive signals GS(1)-GS(N) are provided by the gate drive circuits 10A' and 10B' (represented by dashed arrows ).

请参考图9，图9为本发明第三实施例的液晶显示装置300、本发明第四实施例的液晶显示装置400以及本发明第五实施例的液晶显示装置500在运作时的时序图。在栅极驱动电路10A中，移位暂存单元SR_A(1)依据时序控制器20所产生的起始脉冲信号VST_A(1)来输出第一级栅极驱动信号GS(1)，而移位暂存单元SR_A(2)～SR_A(n)则分别依据前一级移位暂存单元SR_A(1)～SR_A(n-1)所产生的起始脉冲信号VST_A(2)～VST_A(n)来分别输出奇数级栅极驱动信号GS(3)、GS(5)、...、GS(N-1)。在栅极驱动电路10B中，移位暂存单元SR_B(1)依据时序控制器20所产生的起始脉冲信号VST_B(1)来输出第二级栅极驱动信号GS(2)，而移位暂存单元SR_B(2)～SR_B(n)则分别依据前一级移位暂存单元SR_B(1)～SR_B(n-1)所产生的起始脉冲信号VST_B(2)～VST_B(n)来分别输出偶数级栅极驱动信号GS(2)、GS(4)、...、GS(N)。在栅极驱动电路10A’中，移位暂存单元SR_A’(1)依据时序控制器20所产生的起始脉冲信号VST_A’(1)来输出第一级栅极驱动信号GS(1)，而移位暂存单元SR_A’(2)～SR_A’(n)则分别依据前一级移位暂存单元SR_A’(1)～SR_A’(n-1)所产生的起始脉冲信号VST_A’(2)～VST_A’(n)来分别输出奇数级栅极驱动信号GS(3)、GS(5)、...、GS(N-1)。在栅极驱动电路10B’中，移位暂存单元SR_B’(1)依据时序控制器20所产生的起始脉冲信号VST_B’(1)来输出第二级栅极驱动信号GS(2)，而移位暂存单元SR_B(2)～SR_B(n)则分别依据前一级移位暂存单元SR_B’(1)～SR_B’(n-1)所产生的起始脉冲信号VST_B’(2)～VST_B’(n)来分别输出偶数级栅极驱动信号GS(4)、GS(6)、...、GS(N)。在本发明中的液晶显示装置300、400和500中，栅极驱动电路10A/10B和栅极驱动电路10A’/10B’可依据不同画面而交替地开启和关闭，交替开关的周期可为一个或多个画面。假设多个画面中两相邻画面F(N)和F(N+1)之间为切换栅极驱动电路10A/10B和栅极驱动电路10A’/10B’的时间点，此时起始脉冲信号VST_A(1)～VST_A(n)、VST_B(1)～VST_B(n)、VST_A’(1)～VST_A’(n)、和VST_B’(1)～VST_B’(n)的时序图如图9所示。Please refer to FIG. 9 . FIG. 9 is a timing diagram of the operation of the liquid crystal display device 300 according to the third embodiment of the present invention, the liquid crystal display device 400 according to the fourth embodiment of the present invention, and the liquid crystal display device 500 according to the fifth embodiment of the present invention. In the gate drive circuit 10A, the shift register unit SR_A(1) outputs the first stage gate drive signal GS(1) according to the start pulse signal VST_A(1) generated by the timing controller 20, and shifts The temporary storage units SR_A(2)～SR_A(n) are respectively based on the initial pulse signals VST_A(2)～VST_A(n) generated by the previous shift temporary storage units SR_A(1)～SR_A(n-1) to output odd-level gate drive signals GS(3), GS(5), . . . , GS(N-1) respectively. In the gate drive circuit 10B, the shift register unit SR_B(1) outputs the second stage gate drive signal GS(2) according to the start pulse signal VST_B(1) generated by the timing controller 20, and shifts The temporary storage units SR_B(2)～SR_B(n) are respectively based on the initial pulse signals VST_B(2)～VST_B(n) generated by the previous shift temporary storage units SR_B(1)～SR_B(n-1) to output even-level gate driving signals GS(2), GS(4), . . . , GS(N) respectively. In the gate driving circuit 10A', the shift register unit SR_A'(1) outputs the first stage gate driving signal GS(1) according to the start pulse signal VST_A'(1) generated by the timing controller 20, The shift register units SR_A'(2)~SR_A'(n) are respectively based on the start pulse signal VST_A' generated by the previous stage shift register units SR_A'(1)~SR_A'(n-1) (2) to VST_A'(n) to respectively output odd-level gate drive signals GS(3), GS(5), . . . , GS(N-1). In the gate driving circuit 10B', the shift register unit SR_B'(1) outputs the second stage gate driving signal GS(2) according to the start pulse signal VST_B'(1) generated by the timing controller 20, The shift register units SR_B(2)～SR_B(n) are respectively based on the start pulse signal VST_B'(2 )～VST_B'(n) to respectively output the even-level gate driving signals GS(4), GS(6), . . . , GS(N). In the liquid crystal display devices 300, 400 and 500 of the present invention, the gate drive circuit 10A/10B and the gate drive circuit 10A'/10B' can be turned on and off alternately according to different screens, and the cycle of the alternate switch can be one or multiple screens. Assuming that the time point between two adjacent frames F(N) and F(N+1) in multiple frames is the time point for switching the gate drive circuit 10A/10B and the gate drive circuit 10A'/10B', at this time the start pulse The timing diagrams of signals VST_A(1)~VST_A(n), VST_B(1)~VST_B(n), VST_A'(1)~VST_A'(n), and VST_B'(1)~VST_B'(n) are shown in the figure 9.

请参考图10，图10为本发明第六实施例中一液晶显示装置600的简化方块示意图。图10仅显示了液晶显示装置600的部分结构，包含多条栅极线GL(1)～GL(N)、四栅极驱动电路10A、10B、10A’和10B’，以及一时序控制器20。栅极线GL(1)～GL(N)设于液晶显示装置600的显示区域30内，可分别依据栅极驱动信号GS_A(1)～GS_A(N)和GS_B(1)～GS_B(N)来驱动像素。栅极驱动电路10A设于液晶显示装置600的非显示区域40L内，其包含多级移位暂存单元SR_A(1)～SR_A(N)，可依据时序控制器20所产生的起始脉冲信号VST_A(1)和时钟信号CKA、XCKA来分别输出栅极驱动信号GS_A(1)～GS_A(N)至相对应的栅极线GL(1)～GL(N)。栅极驱动电路10B设于液晶显示装置600的非显示区域40R内，其包含多级移位暂存单元SR_B(1)～SR_B(N)，可依据时序控制器20所产生的起始脉冲信号VST_B(1)和时钟信号CKB、XCKB来分别输出栅极驱动信号GS_B(1)～GS_B(N)至相对应的栅极线GL(1)～GL(N)。栅极驱动电路10A’设于液晶显示装置600的非显示区域40L内，其包含多级移位暂存单元SR_A’(1)～SR_A’(N)，可依据时序控制器20所产生的起始脉冲信号VST_A’(1)和时钟信号CKA’、XCKA’来分别输出栅极驱动信号GS_A(1)～GS_A(N)至相对应的栅极线GL(1)～GL(N)。栅极驱动电路10B’设于液晶显示装置600的非显示区域40R内，其包含多级移位暂存单元SR_B’(1)～SR_B’(N)，可依据时序控制器20所产生的起始脉冲信号VST_B’(1)和时钟信号CKB’、XCKB’来分别输出栅极驱动信号GS_B(1)～GS_B(N)至相对应的栅极线GL(1)～GL(N)。其中，非显示区域40L和40R分别位于显示区域30的两对向侧，而N为正整数。在图10中，显示区域30和非显示区域40L、40R的标示范围仅为了说明各元件的位置，并不限定本发明液晶显示装置600中各元件的实际大小比例。Please refer to FIG. 10 , which is a simplified block diagram of a liquid crystal display device 600 in a sixth embodiment of the present invention. FIG. 10 only shows a partial structure of a liquid crystal display device 600, including a plurality of gate lines GL(1)-GL(N), four gate driving circuits 10A, 10B, 10A' and 10B', and a timing controller 20 . The gate lines GL(1)˜GL(N) are arranged in the display area 30 of the liquid crystal display device 600, and can be respectively controlled according to the gate driving signals GS_A(1)˜GS_A(N) and GS_B(1)˜GS_B(N) to drive pixels. The gate drive circuit 10A is disposed in the non-display area 40L of the liquid crystal display device 600 , and includes multi-stage shift register units SR_A(1)˜SR_A(N), which can be generated according to the start pulse signal generated by the timing controller 20 VST_A(1) and clock signals CKA, XCKA respectively output gate driving signals GS_A(1)˜GS_A(N) to corresponding gate lines GL(1)˜GL(N). The gate drive circuit 10B is disposed in the non-display region 40R of the liquid crystal display device 600 , and includes multi-stage shift register units SR_B(1)˜SR_B(N), which can be generated according to the start pulse signal generated by the timing controller 20 VST_B( 1 ) and clock signals CKB and XCKB respectively output gate driving signals GS_B( 1 )˜GS_B(N) to corresponding gate lines GL( 1 )˜GL(N). The gate driving circuit 10A' is disposed in the non-display area 40L of the liquid crystal display device 600 , and includes multi-level shift register units SR_A'(1)˜SR_A'(N), which can be generated according to the timing controller 20 . The start pulse signal VST_A'(1) and the clock signals CKA', XCKA' respectively output the gate driving signals GS_A(1)˜GS_A(N) to the corresponding gate lines GL(1)˜GL(N). The gate driving circuit 10B' is disposed in the non-display region 40R of the liquid crystal display device 600 , and includes multi-level shift register units SR_B'(1)˜SR_B'(N), which can be generated according to the timing controller 20 The start pulse signal VST_B'(1) and the clock signals CKB', XCKB' respectively output the gate driving signals GS_B(1)˜GS_B(N) to the corresponding gate lines GL(1)˜GL(N). Wherein, the non-display areas 40L and 40R are respectively located on opposite sides of the display area 30 , and N is a positive integer. In FIG. 10 , the marked ranges of the display area 30 and the non-display areas 40L, 40R are only for illustrating the position of each element, and do not limit the actual size ratio of each element in the liquid crystal display device 600 of the present invention.

本发明第六实施例的液晶显示装置600采用双边布局双端驱动的架构，并以分时启动的方式来驱动。换而言之，栅极驱动电路10A和10B分别设置于栅极线GL(1)～GL(N)的两对向侧，而栅极驱动电路10A’和10B’分别设置于栅极线GL(1)～GL(N)的两对向侧，显示画面时会在栅极线GL(1)～GL(N)的两侧皆各开启一栅极驱动电路。举例来说，在显示多个画面中一画面F(N)时，栅极驱动电路10A和10B为开启，而栅极驱动电路10A’和10B’为关闭，此时栅极驱动信号GS_A(1)～GS_A(N)和GS_B(1)～GS_B(N)分别由栅极驱动电路10A和10B来提供(由实线箭头来表示)；在显示接续画面F(N)之后的画面F(N+1)时，栅极驱动电路10A’和10B’为开启，而栅极驱动电路10A和10B为关闭，此时栅极驱动信号GS_A(1)～GS_A(N)和GS_B(1)～GS_B(N)分别由栅极驱动电路10A’和10B’来提供(由虚线箭头来表示)。The liquid crystal display device 600 of the sixth embodiment of the present invention adopts a dual-side layout and double-terminal drive architecture, and is driven in a time-sharing start-up manner. In other words, the gate driving circuits 10A and 10B are respectively disposed on two opposite sides of the gate lines GL(1)˜GL(N), and the gate driving circuits 10A′ and 10B′ are respectively disposed on the gate line GL. On the two opposite sides of (1)-GL(N), a gate driving circuit is turned on on both sides of the gate lines GL(1)-GL(N) when a picture is displayed. For example, when displaying a frame F(N) among a plurality of frames, the gate drive circuits 10A and 10B are turned on, while the gate drive circuits 10A' and 10B' are turned off, and the gate drive signal GS_A(1 )～GS_A(N) and GS_B(1)～GS_B(N) are provided by the gate drive circuits 10A and 10B respectively (represented by solid arrows); +1), the gate drive circuits 10A' and 10B' are turned on, and the gate drive circuits 10A and 10B are turned off. At this time, the gate drive signals GS_A(1)～GS_A(N) and GS_B(1)～GS_B (N) are provided by the gate drive circuits 10A' and 10B' respectively (indicated by dashed arrows).

请参考图11，图11为本发明第六实施例的液晶显示装置600在运作时的时序图。在栅极驱动电路10A中，移位暂存单元SR_A(1)依据时序控制器20所产生的起始脉冲信号VST_A(1)来输出栅极驱动信号GS_A(1)，而移位暂存单元SR_A(2)～SR_A(N)则分别依据前一级移位暂存单元SR_A(1)～SR_A(N-1)所产生的起始脉冲信号VST_A(2)～VST_A(N)来分别输出栅极驱动信号GS_A(2)～GS_A(N)。在栅极驱动电路10B中，移位暂存单元SR_B(1)依据时序控制器20所产生的起始脉冲信号VST_B(1)来输出栅极驱动信号GS_B(1)，而移位暂存单元SR_B(2)～SR_B(N)则分别依据前一级移位暂存单元SR_B(1)～SR_B(N-1)所产生的起始脉冲信号VST_B(2)～VST_B(N)来分别输出GS_B(2)～GS_B(N)。在栅极驱动电路10A’中，移位暂存单元SR_A’(1)依据时序控制器20所产生的起始脉冲信号VST_A’(1)来输出栅极驱动信号GS_A(1)，而移位暂存单元SR_A’(2)～SR_A’(N)则分别依据前一级移位暂存单元SR_A’(1)～SR_A’(N-1)所产生的起始脉冲信号VST_A’(2)～VST_A’(N)来分别输出栅极驱动信号GS_A(2)～GS_A(N)。在栅极驱动电路10B’中，移位暂存单元SR_B’(1)依据时序控制器20所产生的起始脉冲信号VST_B’(1)来输出栅极驱动信号GS_B(1)，而移位暂存单元SR_B’(2)～SR_B’(N)则分别依据前一级移位暂存单元SR_B’(1)～SR_B’(N-1)所产生的起始脉冲信号VST_B’(2)～VST_B’(N)来分别输出GS_B(2)～GS_B(N)。在本发明中的液晶显示装置600中，栅极驱动电路10A/10B和栅极驱动电路10A’/10B’可依据不同画面而交替地开启和关闭，交替开关的周期可为一个或多个画面。假设多个画面中两相邻画面F(N)和F(N+1)之间为切换栅极驱动电路10A/10B和栅极驱动电路10A’/10B’的时间点，此时起始脉冲信号VST_A(1)～VST_A(N)、VST_B(1)～VST_B(N)、VST_A’(1)～VST_A’(N)、和VST_B’(1)～VST_B’(N)的时序图如图11所示。Please refer to FIG. 11 , which is a timing diagram of the liquid crystal display device 600 in operation according to the sixth embodiment of the present invention. In the gate drive circuit 10A, the shift register unit SR_A(1) outputs the gate drive signal GS_A(1) according to the start pulse signal VST_A(1) generated by the timing controller 20, and the shift register unit SR_A(2)～SR_A(N) are respectively output according to the start pulse signals VST_A(2)～VST_A(N) generated by the previous shift register units SR_A(1)～SR_A(N-1) Gate driving signals GS_A(2)˜GS_A(N). In the gate drive circuit 10B, the shift register unit SR_B(1) outputs the gate drive signal GS_B(1) according to the start pulse signal VST_B(1) generated by the timing controller 20, and the shift register unit SR_B(2)～SR_B(N) are respectively output according to the start pulse signals VST_B(2)～VST_B(N) generated by the previous shift register units SR_B(1)～SR_B(N-1) GS_B(2)~GS_B(N). In the gate drive circuit 10A', the shift register unit SR_A'(1) outputs the gate drive signal GS_A(1) according to the start pulse signal VST_A'(1) generated by the timing controller 20 to shift The temporary storage units SR_A'(2)~SR_A'(N) are respectively based on the initial pulse signal VST_A'(2) generated by the previous shift temporary storage unit SR_A'(1)~SR_A'(N-1) ~VST_A'(N) to output gate driving signals GS_A(2)~GS_A(N) respectively. In the gate drive circuit 10B', the shift register unit SR_B'(1) outputs the gate drive signal GS_B(1) according to the start pulse signal VST_B'(1) generated by the timing controller 20, and shifts The temporary storage units SR_B'(2)~SR_B'(N) are respectively based on the initial pulse signal VST_B'(2) generated by the previous shift temporary storage unit SR_B'(1)~SR_B'(N-1) ~VST_B'(N) to output GS_B(2)~GS_B(N) respectively. In the liquid crystal display device 600 of the present invention, the gate drive circuit 10A/10B and the gate drive circuit 10A'/10B' can be turned on and off alternately according to different frames, and the cycle of alternate switching can be one or more frames . Assuming that the time point between two adjacent frames F(N) and F(N+1) in multiple frames is the time point for switching the gate drive circuit 10A/10B and the gate drive circuit 10A'/10B', at this time the start pulse The timing diagrams of signals VST_A(1)~VST_A(N), VST_B(1)~VST_B(N), VST_A'(1)~VST_A'(N), and VST_B'(1)~VST_B'(N) are shown in the figure 11.

本发明利用多组栅极驱动电路以分时启动的方式来驱动栅极线，可减少移位暂存单元内薄膜晶体管的栅极电压应力，因此能增加液晶显示器的使用期限与可靠度。The present invention utilizes multiple sets of gate drive circuits to drive the gate lines in a time-division start-up manner, which can reduce the gate voltage stress of the thin film transistor in the shift temporary storage unit, thereby increasing the service life and reliability of the liquid crystal display.

以上所述仅为本发明的较佳实施例，凡依本发明权利要求范围所做的均等变化与修饰，皆应属本发明的涵盖范围。The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.