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CN101867510A - Plate-level double system interconnecting method - Google Patents

  • ️Wed Oct 20 2010

CN101867510A - Plate-level double system interconnecting method - Google Patents

Plate-level double system interconnecting method Download PDF

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Publication number
CN101867510A
CN101867510A CN201010187319A CN201010187319A CN101867510A CN 101867510 A CN101867510 A CN 101867510A CN 201010187319 A CN201010187319 A CN 201010187319A CN 201010187319 A CN201010187319 A CN 201010187319A CN 101867510 A CN101867510 A CN 101867510A Authority
CN
China
Prior art keywords
data
pci
network
function
dma
Prior art date
2010-05-31
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201010187319A
Other languages
Chinese (zh)
Inventor
吴少刚
杨文杰
刘军良
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIANGSU LEMOTE TECHNOLOGY Corp Ltd
Original Assignee
JIANGSU LEMOTE TECHNOLOGY Corp Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
2010-05-31
Filing date
2010-05-31
Publication date
2010-10-20
2010-05-31 Application filed by JIANGSU LEMOTE TECHNOLOGY Corp Ltd filed Critical JIANGSU LEMOTE TECHNOLOGY Corp Ltd
2010-05-31 Priority to CN201010187319A priority Critical patent/CN101867510A/en
2010-10-20 Publication of CN101867510A publication Critical patent/CN101867510A/en
Status Pending legal-status Critical Current

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Abstract

The invention discloses a technology for carrying out intersystem (or interchip) communication on two (or more) processors (CPU) with PCI (Programmable Communication Interfaces), which comprises a hardware design for directly interconnecting systems through the PCI and virtual network card drive software based on the application. A method of the invention can replace the traditional network communication constructed based on an Ethernet card, improves the network bandwidth, reduces the network delay, shortens the circuit board space, lowers the product cost, and can be widely applied to different fields of computer communication, embedded application industry and the like.

Description

Plate-level double system interconnecting method

Technical field

The present invention relates to a kind of system interconnect method, particularly a kind of network interconnection method that directly the chip interconnect operation need not be changed traditional network application software based on pci bus.The interconnected communication means that provides of plate level multicomputer system based on PCI or PCI-E technology is provided, can be widely used in a plurality of fields such as compunication, embedded system and high-performance calculation.

Background technology

At present, in the application in each field of computer, often relate between system or interconnected data transmission applications between processor (CPU).Traditional communication mode is considerable to depend on Ethernet card and this medium of ethernet network is realized.For example CPU connects Ethernet card by pci bus, is connected to an other main frame or processor by ethernet physical layer.Data will be carried out package by the network interface card at communication two ends and be unpacked, and through outside transmission medium such as netting twine or the cabling on printed circuit board (pcb).So just can not satisfy and under specific application environment, realize the low delay network transmission of high bandwidth, waste the corresponding wiring line space of embedded product on PCB that spatial limitation is had relatively high expectations, increase the circuit board size, increase the cost of network card chip.

Summary of the invention

Technical problem to be solved by this invention provides a kind of low delay network transmission of high bandwidth that realizes under specific application environment, in the embedded product that spatial limitation is had relatively high expectations, can save the corresponding wiring line space on PCB, reduce the circuit board size, the plate-level double system interconnecting method that the cost that the saving network card chip brings increases.

In order to solve above-mentioned technical problem, technical scheme of the present invention is: a kind of plate-level double system interconnecting method may further comprise the steps:

(1) by pci bus with two system interconnect;

(2) the Microsoft Loopback Adapter driver is operated in two systems initialization of Microsoft Loopback Adapter driver, registered network equipment respectively;

(3) when upper level applications is opened the network equipment, the open function in the system two ends drive is called accordingly, realizes the application interruption, opens up the DMA buffering, sets up the consistency mapping;

The data transfer procedure that (4) one systems initiate:

A) call the transmission function by protocol layer, and the data that will send are by socket buffered data structure;

B) send function and copy the data in the socket buffering loop buffer of network interface card application to, and enable dma controller unlatching DMA transmission;

C) after a data packet transmission is finished, system end sends PCI and interrupts;

(5) another system begins to receive the process of data:

A) another system end is received among the PCI and is had no progeny, and starts the Interrupt Process function;

B) in the Interrupt Process function, the data that receive in the buffering can be submitted to protocol layer.

1) pci bus:

Pci bus is the abbreviation of peripheral interconnecting interface.It is the interconnected hardware protocol of the chip chamber that is widely used (especially CPU and ancillary equipment, as south bridge, video card, network interface card etc.).It is one 32, is usually operated at the parallel bus of 33/66MHz.In this patent just with pci bus as the hardware system ways of connecting.

2) Linux network-driven:

Network-driven is the software that connects network interface card hardware and linux kernel.It has shielded the realization details of network interface card physical layer, for the network subsystem of kernel provides general interface, so that based on network application program operation network interface card.We have realized driving based on the Microsoft Loopback Adapter of PCI communication at this, and this is the technological core of the present invention.

3)DMA:

The DMA technology is the direct memory access technology.Be a kind of data exchange mechanism that dma controller replaced C PU direct control internal memory comes access data, can significantly improve systematic function like this.In the design that Microsoft Loopback Adapter drives, just be to use the DMA technology to realize the transmitting-receiving transmission of data.

The Microsoft Loopback Adapter driver operates in the two ends of dual system respectively.Driver at first can be to linux kernel registered network equipment, and application is interrupted and initialization DMA register.So be subjected to realize respectively sending function and receiver function.Transmitting terminal takes out user data and is put into pci bus by dma controller and transmits data from internal memory; Receiving terminal is had no progeny in receiving PCI and is started method that DMA reads and have dma controller that data are put into from the PCI memory headroom to receive buffering.

Method of the present invention is simplified the complexity of communicating by letter between dual system more concerning the hardware designs of product, the bandwidth that improves Network Transmission can satisfy the highspeed network applications environment requirement; Dwindling board space makes the product design can be more diversified; Cut down the product cost expense that network card chip itself brings simultaneously.

For software, existing diverse network application software does not relate to any modification.

Description of drawings

The present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.

Fig. 1 is that two PCI between system connect block diagram;

Fig. 2 is the structural representation of two systems of the present invention;

Fig. 3 is system data transmission flow figure of the present invention;

Fig. 4 is the receiving data stream journey figure of system of the present invention.

Embodiment

With communicating by letter between two systems of SMP8635 of homemade Godson 2F processor and a high definition broadcast chip Sigma company as example, the method of attachment of its hardware as shown in Figure 1, Godson 2F processor and high definition play chip Sigma company SMP8635 structural representation as shown in Figure 2.

The initialization procedure that drives:

1) at first in hardware designs, the pci controller of Godson 2F and the pci interface of SMP8635 are linked to each other, perhaps insert by the PCI slot;

2) Microsoft Loopback Adapter driver initialization, registered network equipment.Can see ethX equipment after succeeding in registration;

3) when upper level applications is checked card the network equipment, the open function in the SMP8635 end drives is called accordingly.

Realize the application interruption, open up the DMA buffering, set up the consistency mapping.

The data transfer procedure that SMP8635 initiates:

1) call the transmission function by protocol layer, and the data that will send is by socket buffered data structure;

2) send function and copy the data in the socket buffering loop buffer of network interface card application to, and enable dma controller unlatching DMA transmission;

3) after a data packet transmission is finished, the SMP8635 end sends PCI and interrupts.

Godson 2F begins to receive the process of data

1) Godson 2F end is received to have no progeny among the PCI and is started the Interrupt Process function;

2) in the Interrupt Process function, the data that receive in the buffering can be submitted to protocol layer.

In above process, needn't relate to traditional network interface card drive in to the complex operations of network interface card, got rid of the network delay that the network interface card physical layer is brought.

As shown in Figure 3, Godson 2F data transmission flow is as follows:

1) the Godson data buffer address (source address) that will send sends to 8635;

2) SMP8635 is provided with the DMA register and prepares the DMA visit after read request that receives Godson and data address;

3) start PCI DMA visit, write the destination address of 8635 memory headrooms by the SMP8635DMA controller from Godson address space reading of data again;

4) after SMP8635 finishes receiving, produce a PCI INTA# and interrupt to Godson, illustrate that data receive, can prepare to transmit next time.

As shown in Figure 4, Godson 2F receiving data stream journey is as follows:

1) 8635 sends a PCI INTA# and interrupt receiving data to Godson prompting;

2) Godson transmits data and receives the bus address of buffering area to 8635;

3) 8635 the DMA register is set, beginning DMA transfers data to the Godson memory headroom;

4) after 8635 have transmitted, can produce a PCI interrupt notification Godson.

This invention is the technology that a kind of processor (CPU) that two (or a plurality of) are had a pci interface carries out (or chip chamber) communication between system.Comprise system by the directly interconnected hardware designs of PCI and based on the Microsoft Loopback Adapter drive software of this application.Be intended to solve legacy network and be transmitted in the drawback of using in the specific area, optimize network performance, and the legacy network application program can need not to revise the seamless transplanting of realization.

The foregoing description does not limit the present invention in any way, and every employing is equal to replaces or technical scheme that the mode of equivalent transformation obtains all drops in protection scope of the present invention.

Claims (1)

1. plate-level double system interconnecting method is characterized in that may further comprise the steps:

(1) by pci bus with two system interconnect;

(2) the Microsoft Loopback Adapter driver is operated in two systems initialization of Microsoft Loopback Adapter driver, registered network equipment respectively;

(3) when upper level applications is opened the network equipment, the open function in the system two ends drive is called accordingly, realizes the application interruption, opens up the DMA buffering, sets up the consistency mapping;

The data transfer procedure that (4) one systems initiate:

A) call the transmission function by protocol layer, and the data that will send are by socket buffered data structure;

B) send function and copy the data in the socket buffering loop buffer of network interface card application to, and enable dma controller unlatching DMA transmission;

C) after a data packet transmission is finished, system end sends PCI and interrupts;

(5) another system begins to receive the process of data:

A) another system end is received among the PCI and is had no progeny, and starts the Interrupt Process function;

B) in the Interrupt Process function, the data that receive in the buffering can be submitted to protocol layer.

CN201010187319A 2010-05-31 2010-05-31 Plate-level double system interconnecting method Pending CN101867510A (en)

Priority Applications (1)

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Application Number Priority Date Filing Date Title
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106776398A (en) * 2016-12-20 2017-05-31 广州视源电子科技股份有限公司 Method and device for bidirectional control of dual systems
CN110312266A (en) * 2018-03-20 2019-10-08 成都鼎桥通信技术有限公司 The method and apparatus that the multisystem of terminal realizes WIFI communication
CN113691397A (en) * 2021-08-12 2021-11-23 江苏杰瑞信息科技有限公司 Low-delay 5G wireless transparent transmission method for industrial control data transmission

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1303054A (en) * 1999-10-28 2001-07-11 英业达集团(上海)电子技术有限公司 Virtual network device and its communication method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1303054A (en) * 1999-10-28 2001-07-11 英业达集团(上海)电子技术有限公司 Virtual network device and its communication method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
《程序员》 20090131 李云华 Linux网卡驱动分析一例 第90-93页 , 第01期 2 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106776398A (en) * 2016-12-20 2017-05-31 广州视源电子科技股份有限公司 Method and device for bidirectional control of dual systems
WO2018113112A1 (en) * 2016-12-20 2018-06-28 广州视源电子科技股份有限公司 Two-system two-way control method and device
CN110312266A (en) * 2018-03-20 2019-10-08 成都鼎桥通信技术有限公司 The method and apparatus that the multisystem of terminal realizes WIFI communication
CN113691397A (en) * 2021-08-12 2021-11-23 江苏杰瑞信息科技有限公司 Low-delay 5G wireless transparent transmission method for industrial control data transmission
CN113691397B (en) * 2021-08-12 2023-10-20 江苏杰瑞信息科技有限公司 Low-delay 5G wireless transparent transmission method for industrial control data transmission

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2010-10-20 C06 Publication
2010-10-20 PB01 Publication
2010-12-01 C10 Entry into substantive examination
2010-12-01 SE01 Entry into force of request for substantive examination
2012-12-26 C12 Rejection of a patent application after its publication
2012-12-26 RJ01 Rejection of invention patent application after publication

Application publication date: 20101020