CN102968082A - Method for realizing single line communication of singlechip - Google Patents

The invention discloses a method for realizing single line communication of a singlechip, and belongs to a communication method for the singlechip. The method is used for performing data communication between the singlechip and a central processing unit (CPU) and comprises the following steps of: A, pre-setting high-low electrical level signal time sequence combinations capable of executing different functions in the singlechip; B, sending a first high-low electrical level signal time sequence to the singlechip by the CPU, judging that the signal time sequence is matched with one or more of the pre-set high-low electrical level signal time sequence combinations after the singlechip receives the signal time sequence, and if so, feeding-back to the CPU; and C, sending a control instruction to the singlechip by the CPU through a same input/output (I/O) interface, and executing corresponding functions by the singlechip according to the control instruction. The high-low electrical level signal time sequence combinations with different functions are integrated in advance in a public-version program of the singlechip, and the matching verification of the signal time sequence is carried out, so that the aims that the CPU is wakened up to power on and is used for sending various kinds of control instructions are realized through the same I/O interface on the singlechip; and meanwhile, the method is easy to realize and popularize and the application cost is low.

The implementation method that is used for the single-chip microcomputer single-wire communication

Technical field

The present invention relates to a kind of means of communication of single-chip microcomputer, in particular, the present invention relates generally to a kind of implementation method for the single-chip microcomputer single-wire communication.

Background technology

At present, in all kinds of chip designs, continuous expansion along with its function, and the communication that extends out between the equipment is also more and more, this just inevitably makes the communication modes that carries out various signal instructions on single-chip microcomputer or the chip also increase thereupon, and the chip of existing equipment or the communication between the single-chip microcomputer need two I/O interfaces or plural I/O interface just can realize at least, therefore for some I/O interfaces fewer chip or single-chip microcomputer, can divide to mix at the I/O interface resource and not enough problem occur, thereby making this type of chip or single-chip microcomputer extend out function is restricted, in the situation of especially in guaranteeing set-top box, keeping in communication between standby single-chip microcomputer and the mainboard CPU, existing the problems referred to above of connection that its I/O interface is extended out equipment are more obvious, therefore are necessary to do further improvement for the means of communication between single-chip microcomputer and the CPU.

Summary of the invention

One of purpose of the present invention is to solve above-mentioned deficiency, and a kind of implementation method for the single-chip microcomputer single-wire communication is provided, and solves single-chip processor i/o interface resource deficiency in the prior art with expectation, and a plurality of I/O interface communications take the more technical matters of resource.

For solving above-mentioned technical matters, the present invention by the following technical solutions:

A kind of implementation method for the single-chip microcomputer single-wire communication provided by the present invention, be used for and CPU between data communication, described method may further comprise the steps:

Steps A, the high-low level signal sequence that presets in single-chip microcomputer for the execution difference in functionality make up;

Step B, CPU send the first high-low level signal sequence to single-chip microcomputer, and single-chip microcomputer is received and judged behind this signal sequence when one or more in making up of the high-low level signal sequence that presets with it are complementary, namely makes feedback to CPU;

To the single-chip microcomputer sending controling instruction, single-chip microcomputer is carried out corresponding function according to this steering order by same I/O interface for step C, CPU.

As preferably, further technical scheme is: when the I/O interface of single-chip microcomputer after the start is defaulted as high level, the first high-low level signal sequence that CPU sends to single-chip microcomputer by this I/O interface among the described step B, and the feedback that single-chip microcomputer is made to CPU is the high-low level signal combination that continues different time.

Further technical scheme is: the high-low level signal combination of described lasting different time is for continuing successively 10 milliseconds low level, continuing 5 milliseconds high level, lasting 3 milliseconds low level signal sequence.

Further technical scheme is: CPU is twice to the first high-low level signal sequence that single-chip microcomputer sends among the described step B, and the interval continues the high level of unit interval between twice; The feedback that described single-chip microcomputer is made to CPU also is twice, and the interval continues the high level of unit interval between twice.

Further technical scheme is: the high-low level signal sequence combination that described steps A presets in single-chip microcomputer is integrated in the public version program of single-chip microcomputer.

Further technical scheme is: CPU also is twice to the steering order that single-chip microcomputer sends among the described step C, and the interval continues the high level of unit interval between twice.

Further technical scheme is: described method is applied to the communication between the true stand-by circuit module of set-top box set top box main CPU and the standby single-chip microcomputer.

Further technical scheme is: CPU is that telepilot is treated switch key assignments or standby wakeup time by same I/O interface to the steering order that single-chip microcomputer sends among the described step C.

Further technical scheme is: CPU treats that to the telepilot that single-chip microcomputer sends switch key assignments or standby wakeup time are twice among the described step C, and the interval continues 5 milliseconds high level between twice.

Compared with prior art, one of beneficial effect of the present invention is: by the in advance high-low level signal sequence combination of integrated representative difference in functionality in the public version program of single-chip microcomputer, and by the checking of signal sequence coupling, so that namely realizing waking up by the same I/O interface on the single-chip microcomputer, CPU powers on and the operations such as transmission of all kinds of steering orders, and when method of the present invention is used in set-top box, the telepilot code value of single-chip microcomputer and stand-by time all are to download in real time after powering on by set top box main CPU, therefore can realize that the single-chip microcomputer in different set-top box or other electronic equipments uses the public version of same program, improve consistance, and by in public version program, presetting integrated different signal sequences combination, can realize the I/O interface communication protocol of more difference in functionalitys, a kind of implementation method for the single-chip microcomputer single-wire communication provided by the present invention more easily realizes simultaneously, and application cost is lower, is easy to promote.

Embodiment

The present invention is further elaborated in conjunction with specific embodiments again for the below.

One embodiment of the present of invention are a kind of implementation methods for the single-chip microcomputer single-wire communication, are used for and the CPU(central processing unit) between data communication, described method may further comprise the steps:

Steps A, the high-low level signal sequence that presets in single-chip microcomputer for the execution difference in functionality make up;

Step B, CPU send the first high-low level signal sequence to single-chip microcomputer (being the MCU chip), single-chip microcomputer is received and is judged behind this signal sequence when one or more in making up of the high-low level signal sequence that presets with it are complementary, namely make feedback to CPU, for example be in single-chip microcomputer under the holding state and receive and namely power on behind the first high-low level signal sequence and notify CPU its power on number of times and other real-time status;

To the single-chip microcomputer sending controling instruction, single-chip microcomputer is carried out corresponding function according to this steering order by same I/O interface for step C, CPU.

More specifically, when the electronic equipment of using this kind means of communication after start, when the I/O interface of above-mentioned single-chip microcomputer is defaulted as high level, the first high-low level signal sequence that CPU sends to single-chip microcomputer by this I/O interface among the step B, and the feedback that single-chip microcomputer is made to CPU is the high-low level signal combination that continues different time.This high-low level signal combination can arrange arbitrarily according to the difference in functionality that single-chip microcomputer will be carried out, and for example it is set to continue successively 10 milliseconds low level, continue 5 milliseconds high level, lasting 3 milliseconds low level continuous signal sequential.

As preferably, the present invention is used for the technical solution problem, and a preferred embodiment is that CPU is set to twice to the first high-low level signal sequence that single-chip microcomputer sends among the step B, and the interval continues the high level of unit interval between twice; And the feedback that single-chip microcomputer is made to CPU also is twice, and the interval continues the high level of unit interval between twice, for example continues 5 milliseconds high level signal as the interval.The high-low level signal sequence that can guarantee like this difference in functionality that all kinds of representative single-chip microcomputers will be carried out can effectively send with received, also can help CPU and single-chip microcomputer to the verification of high-low level signal sequence authenticity.And according to this principle, the improvement that previous embodiment of the present invention also can be carried out is that CPU among the step C also is set to twice to all kinds of steering orders that single-chip microcomputer sends, and the interval continues the high level of unit interval between twice, this interval continue high level signal time can and aforementioned the first high-low level signal sequence between be set to identical or different.

And for guaranteeing that the method in the above embodiment of the present invention is easier to implement, the inventor thinks preferably be integrated in the high-low level signal that above-mentioned steps A presets in the public version program of single-chip microcomputer in single-chip microcomputer.

As a kind of application mode of the present invention, an alternative embodiment of the invention is that the implementation method with above-mentioned single-chip microcomputer single-wire communication is applied to the communication between the true stand-by circuit module of set-top box set top box main CPU and the standby single-chip microcomputer.In this kind application of the present invention, CPU then is that telepilot is treated switch key assignments or standby wakeup time by same I/O interface to the steering order that single-chip microcomputer sends among the above-mentioned steps C.

And similar to above-mentioned principle, CPU treats that to the telepilot that single-chip microcomputer sends switch key assignments or standby wakeup time are twice among the step C, and the interval continues 5 milliseconds high level between twice.

The below is again in conjunction with the above embodiment of the present invention, the present invention is further elaborated, after set-top box or the start of other electronic equipments, one of them I/O interface of its single-chip microcomputer is defaulted as high level, CPU can send high-low level notification signal sequential to single-chip microcomputer (this notification signal sequential is for continuing 10ms low level+lasting 5ms high level+lasting 3ms low level), send altogether 2 times, between the interval continue the high level of 5ms, single-chip microcomputer is after notified, transmission open state notice sequential should be notified sequential still for continuing 10ms low level+lasting 5ms high level+lasting 3ms low level to CPU(), send altogether 2 times, between also the interval continue the high level of 5ms, this is that single-chip microcomputer powers on for the first time for notice CPU; After CPU is notified, send key assignments and the standby wakeup time that telepilot is treated switch by same I/O interface, also send 2 times, between still the interval continue the high level of 5ms, and because the telepilot code value of single-chip microcomputer and stand-by time all are to download when powering on by CPU, use same MCU program (i.e. public version program) so in production and application, just can accomplish different equipment, accomplish mass production, the simultaneously combination by different high-low level duration length can realize the communications protocol between how different single-chip microcomputers and the CPU.

" embodiment " who speaks of in this manual, " another embodiment ", " embodiment ", etc., refer to specific features, structure or the characteristics described in conjunction with this embodiment and be included among at least one embodiment that the application's generality describes.A plurality of local appearance statement of the same race is not necessarily to refer to same embodiment in instructions.Furthermore, when describing a specific features, structure or characteristics in conjunction with arbitrary embodiment, what advocate is to realize that in conjunction with other embodiment this feature, structure or characteristics also fall within the scope of the invention.

Although invention has been described with reference to a plurality of explanatory embodiment of the present invention here, but, should be appreciated that those skilled in the art can design a lot of other modification and embodiments, these are revised and embodiment will drop within the disclosed principle scope and spirit of the application.More particularly, in present specification and claim scope of disclosure, can carry out multiple modification and improvement to building block and/or the layout of subject combination layout.Except modification that building block and/or layout are carried out with improving, to those skilled in the art, other purposes also will be obvious.