CN103137555A - Thin film transistor liquid crystal display device and manufacturing method thereof - Google Patents

Figure 1 shows that the structural representation of a kind of TFT-LCD display screen under prior art, comprise

100, be formed at the

101a on

100, 101b and

102, with

101a, the

103 that 101b intersects, described

101a, the

106 that is formed with

104 and is electrically connected to the drain electrode of

104 by via

105 in the pixel region that 101b and

103 limit, wherein, described

104 comprises: the grid that is electrically connected to the institute gate line is (because gate line and grid form in same processing step usually, therefore both be positioned at same layer, and can be made of one), be formed at successively the gate insulation layer on described grid, (metal that usually forms the source electrode of TFT forms in same processing step with the metal that forms drain electrode semiconductor layer and source/leakage metal level, therefore both be positioned at same layer, be referred to as source/leakage metal level), the source electrode of described TFT (or drain electrode) is electrically connected to described data wire (because source electrode and the data wire of TFT forms in same processing step usually, therefore both be positioned at same layer, and can be made of one).As can be seen from Figure 1, be usually located under colored filter between the drain electrode of

104 and pixel electrode coupling part and

101b, shared

107 is lightproof part, is not utilized effectively, and causes the waste of TFT-LCD display screen aperture opening ratio.This is to be the main inducing of the screen flicker that causes due to grid leak parasitic capacitance Cgd that drain electrode and pixel electrode and gate line form, so common design is all to make drain electrode and the overlapping as far as possible less area of pixel electrode, and pixel electrode is as far as possible away from gate line.Therefore, need a kind of thin film transistor LCD device and manufacture method thereof, can effectively utilize the shared zone of gate line and drain electrode and pixel electrode coupling part, increase TFT-LCD display screen aperture opening ratio, the display performance of raising TFT-LCD display device.

as shown in Figure 3A, in step S1, the transparent conductive material film (not shown) of deposition indium oxide layer tin or indium zinc oxide on

300, mode by sputter or evaporation on the transparent conductive material film deposits the first metallic material film (not shown), then apply certain thickness photoresist film, by half gray-tone mask plate (Half-Tone Mask, be called for short HTM) make described photoresist film expose and develop, form photoetching offset plate figure, this photoetching offset plate figure has two zones of different-thickness, the

301a that is about to formation in the zone that thickness is large, 301b,

302 positions, the corresponding transparent

302a position that is about to formation, the zone that thickness is little, then according to photoresist layer etching the first metallic material film and transparent conductive material film, use the whole photoresist layer of ashing technology attenuate, remove the photoresist in the little zone of thickness, its lower first metallic material film of etching, expose the bright conductive material thin film of below, form transparent common electrode, and then remove the unnecessary photoresist layer in the large zone of thickness, expose the first metallic material film of its below,

301a, 301b,

302 and coupled transparent

302a can also form grid (not shown) one-body molded with

301b and that be electrically connected in the present embodiment when forming

301a, 301b.Form transparent common electrode and coupled COM line and gate line by the first half gray-tone mask plate techniques, greatly simplify processing step, reduce process costs.

In other embodiments of the invention, can also form transparent common electrode and coupled COM line and gate line by twice normal masks plate technique in step S1.That is: the transparent conductive material film (not shown) of deposition indium oxide layer tin or indium zinc oxide on

300, the certain thickness photoresist film of coating on transparent common electrode, make described photoresist film expose and develop by once common transparent common electrode mask plate, form photoetching offset plate figure; Then etching photoresist layer and transparent conductive material film, form transparent

302a; Then comprising on the substrate of transparent common electrode, mode by sputter or evaporation deposits the first metallic material film (not shown), then apply certain thickness photoresist film, make described photoresist film expose and develop by once common gate line mask plate, form photoetching offset plate figure, then etching photoresist layer and the first metallic material film,

301a, the 301b and the

302 that are connected with transparent

302a.

In the thin film transistor LCD device that subsequent technique makes, with transparent

302a as bottom crown, gate insulation layer and/or passivation layer and other insulating barriers as capacitor dielectric, the pixel electrode storage capacitance as top crown, increase the storage capacitance of the thin film transistor LCD device that makes, reduced the interference of source drain capacitance Cgd to whole pixel.

Preferably,

300 is the insulation materials such as glass, quartz or plastics.The first metal material layer can be the monofilm such as Mo, Cr, W, Ti, Ta, Mo, Al or Cu, perhaps for being selected from the composite membrane that combination in any two kinds or more of in Cr, W, Ti, Ta, Mo, Al or Cu consists of.Preferably, the width of described

301a, 301b is 8 μ m～10 μ m, to keep enough zones, make in subsequent technique and dropped in the width regions of

301a, 301b at the source electrode of the TFT that makes above

301b and the projection of drain electrode.

as shown in Fig. 3 B, in step S2, comprising

301a, 301b, on the

300 of

302 and coupled transparent

302a, can form and described

301a by twice normal masks plate technique, the

303 that 301b and

302 intersect and the

304a that forms

304 above described

301b,

304b and channel structure, that is: at first, comprising

301a, 301b, on the

300 of

302 and coupled transparent

302a, mode by plasma reinforced chemical vapour deposition deposits gate insulation layer on the substrate that comprises and the grid that is electrically connected to one-body molded with

301b, the material of gate insulation layer is oxide, nitride or oxynitrides, then, predefine TFT above gate line zone (this zone should for

301b top and with the overlapping place of the

303 of follow-up formation) deposit certain thickness amorphous silicon (writing a Chinese character in simplified form into " a-Si ") and heavily doped amorphous silicon layer, apply certain thickness photoresist film, make described photoresist film expose and develop by once common TFT mask plate technique, form photoetching offset plate figure, then the unprotected amorphous silicon of etching photoresist film (writing a Chinese character in simplified form into " a-Si ") and heavily doped amorphous silicon layer, form island active area or island semiconductor layer, then, deposit the second metallic material film and apply certain thickness photoresist film on whole substrate, make described photoresist film expose and develop by once common data wire mask plate, form photoetching offset plate figure, then unprotected the second metallic material film of etching photoresist film, form the

303 that intersects with described

301a, 301b and

302 and the

304a that forms

304 above described

301b,

304b and channel structure.Also just formed the

304 of the gate line top that is positioned at described

301b and

303 overlapping places this moment, comprise with the grid of described

301b one, be formed at successively gate insulation layer on described grid and amorphous silicon and heavily doped amorphous silicon layer,

304b, the

304a that is electrically connected to described

303 and and

304a and the channel structure between 304b of draining; Described

304a is electrically connected to described data wire 303.At this moment,

304a, the

304b and the channel structure that are formed at the TFT at

301b and

303 overlapping places all are projected on

301b, effectively utilize the shared zone between

306 coupling parts of

301b and

304b and follow-up formation, increase the TFT-LCD display screen aperture opening ratio that makes, improve the display performance of TFT-LCD display device.

in other embodiments of the invention, also can use the second half gray-tone mask plates and adopt to be similar to and form

301a in step S1, 301b, the method of

302 and coupled transparent

302a forms the

304a of

303 and

304,

304b and channel structure, that is: at first,

301a, 301b, deposit successively gate insulation layer on the

300 of

302 and coupled transparent

302a, the semiconductor layer of amorphous silicon (writing a Chinese character in simplified form into " a-Si ") and heavily doped amorphous silicon layer, then deposit the second metallic material film and photoresist layer, then, make described photoresist layer expose and develop by the second half gray-tone mask plates, form data wire and TFT source and drain areas and the different photoetching offset plate figure of TFT channel region thickness, then, etching forms island active area or island semiconductor layer and channel region successively, forms

303 and

304a and

304b, is channel structure between

304a and drain electrode 304b.

304a,

304b and the channel structure of the TFT of

303 and

301b top by the second half gray-tone mask plate techniques, can greatly simplify processing step, reduce process costs.

As shown in Figure 3 C, in step S3, form passivation layer (not shown) on the whole surface of the

300 that comprises described

304a and

304b, described passivation layer is silica, silicon nitride, silicon oxynitride or organic material.Then by the passivation layer mask plate, form the

305 of exposed portions serve

304a in described passivation layer.

As shown in Fig. 3 D, in step S4, the certain thickness tin indium oxide of deposition or indium zinc oxide transparent conductive material on described passivation layer adopt the pixel electrode mask plate to form

306, and described

306 is electrically connected to described

304b by described via

305.

TFT

300;

Be formed at transparent

302a on described TFT side group plate and coupled

301a, 301b,

302;

The

303 that intersects with

301a, 301b and

302;

Be formed at

304a,

304b and the channel structure of the TFT304 of described

301b top;

Be formed at the passivation layer on described

301a, 301b,

302, coupled transparent

302a,

303 and

304, described passivation layer has the

305 that exposes

304

304b;

Be formed on described passivation layer and pass through the

306 that described via

305 is electrically connected to described

304b.

By shown in 307 in 107 in Fig. 1 and Fig. 3 D as can be known, thin film transistor LCD device provided by the invention and manufacture method thereof, by make gate line, COM line and coupled transparent common electrode on substrate, make

304a and the

304b of

304 on

301a, 301b, can effectively utilize the shared zone of gate line and

304b and pixel electrode coupling part, increase TFT-LCD display screen aperture opening ratio, improve the display performance of TFT-LCD display device.

1. the manufacture method of a thin film transistor LCD device, is characterized in that, comprising:

Form transparent common electrode and coupled COM line and gate line on substrate;

Form the data wire that intersects with described gate line and COM line and source electrode, drain electrode and the channel structure that forms TFT above described gate line;

Form passivation layer on the whole surface of the substrate that comprises described TFT, form the via hole of the part drain electrode of exposing described TFT in described passivation layer;

Form pixel electrode on described passivation layer, described pixel electrode is electrically connected to the drain electrode of described TFT by via hole.

2. the manufacture method of thin film transistor LCD device as claimed in claim 1, is characterized in that, adopts the first half gray-tone mask plates to form transparent common electrode and coupled COM line and gate line on substrate.

3. the manufacture method of thin film transistor LCD device as claimed in claim 1, it is characterized in that, adopt the second half gray-tone mask plates forming the data wire that intersects with described gate line and COM line and source electrode, drain electrode and the channel structure that forms TFT above described gate line on substrate.

4. the manufacture method of thin film transistor LCD device as claimed in claim 1 or 2, is characterized in that, described transparent common electrode is tin indium oxide or indium zinc oxide.

5. the manufacture method of thin film transistor LCD device as claimed in claim 1, is characterized in that, the width of described gate line is 8 μ m～10 μ m.

6. the manufacture method of thin film transistor LCD device as claimed in claim 1, is characterized in that, the material of described gate line comprises at least a in Mo, Cr, W, Ti, Ta, Mo, Al and Cu.

7. the manufacture method of thin film transistor LCD device as claimed in claim 1, is characterized in that, when adopting the first half gray-tone mask plates to form gate line on substrate, forms and the integrated grid of described gate line.

8. the manufacture method of thin film transistor LCD device as claimed in claim 1, is characterized in that, the step that forms source electrode, drain electrode and the channel structure of TFT comprises:

Form gate insulator comprising on the whole substrate of described grid;

Gate insulator layer region on described grid forms the island active area;

Form source electrode and drain electrode in described island active area.

9. the manufacture method of thin film transistor LCD device as claimed in claim 1, is characterized in that, described passivation layer is silica, silicon nitride, silicon oxynitride or organic material.

10. a thin film transistor LCD device, is characterized in that, comprising:

TFT side group plate;

Be formed at gate line, COM line and coupled transparent common electrode on described TFT side group plate;

The data wire that intersects with described gate line and COM line;

Be formed at source electrode, drain electrode and the channel structure of the TFT of described gate line top;

Be formed at the passivation layer on described gate line, COM line, coupled transparent common electrode, data wire and TFT, described passivation layer has the via hole of the part drain electrode of exposing described TFT;

Be formed at the pixel electrode that also is electrically connected to the drain electrode of described TFT by described via hole on described passivation layer.

11. thin film transistor LCD device as claimed in claim 10 is characterized in that, described transparent common electrode is tin indium oxide or indium zinc oxide.

12. thin film transistor LCD device as claimed in claim 10 is characterized in that, the width of described gate line is 8 μ m～10 μ m.

13. thin film transistor LCD device as claimed in claim 10 is characterized in that, the material of described gate line comprises at least a in Mo, Cr, W, Ti, Ta, Mo, Al and Cu.

14. thin film transistor LCD device as claimed in claim 10 is characterized in that, described passivation layer is silica, silicon nitride, silicon oxynitride or organic material.