CN103187870B - Buck conversion circuit - Google Patents

Buck conversion circuit is applied to a DC power converter for a computer, and this Buck conversion circuit comprises the first and second electronic switches, the first to the 3rd field effect transistor, electric capacity and inductance.When this computer shutdown, one signal end output low level signal of this computer ends to make this second electronic switch, then this first electronic switch is made to end, thus this first field effect transistor is ended, then only there is this three field effect transistor to work under the first signal pins of the pwm chip of this computer controls.Above-mentioned Buck conversion circuit, due to no current process when this first field effect transistor is ended, is beneficial to energy-conservation.

降压式变换电路Buck converter circuit

技术领域 technical field

本发明涉及一种降压式变换电路。 The invention relates to a step-down conversion circuit.

背景技术 Background technique

当计算机处于开机状态时，经过该计算机的电源转换器的电流大约为2至3安，故，该电源转换器中的降压式变换电路常通过二个场效应管在该计算机的PWM（pulsewidthmodulation，脉冲宽度调制）控制芯片控制下同时工作，以减低导通损耗，提高工作效率，但计算机关机时通过该电源转换器的电流小于20毫安，由于此时的电流远远小于该电源转换器在计算机开机时的电流，故，此时，若两个场效应管依然同时工作，显然不利于节能。 When the computer is in the power-on state, the current passing through the power converter of the computer is about 2 to 3 amps. Therefore, the step-down conversion circuit in the power converter is usually connected to the PWM (pulsewidthmodulation) circuit of the computer through two field effect transistors. , pulse width modulation) work at the same time under the control of the control chip to reduce conduction loss and improve work efficiency, but when the computer is turned off, the current passing through the power converter is less than 20 mA, because the current at this time is much smaller than the power converter Therefore, at this time, if the two field effect transistors are still working at the same time, it is obviously not conducive to energy saving.

发明内容 Contents of the invention

鉴于以上内容，有必要提供一种利于节能的降压式变换电路。 In view of the above, it is necessary to provide a step-down conversion circuit that is beneficial to energy saving.

一种降压式变换电路，应用于一计算机的直流电源转换器，该降压式变换电路包括第一和第二电子开关、第一至第三场效应管、电感、电容、第一至第三电阻、用于接收输入电压的电压输入端以及用于输出电压的电压输出端，其中该第一和第二电子开关均包括第一至第三端；该第一电子开关的第一端连接该第二电子开关的第二端，该第一电子开关的第三端连接该计算机的PWM控制芯片的第一信号引脚，该第一电子开关的第二端连接该第一场效应管的栅极，该第二电子开关的第一端连接该计算机的一信号端，该第二电子开关的第二端连接该第一电子开关的第一端，该第二电子开关的第二端还通过该第一电阻连接该第一电子开关的第三端，该第二电子开关的第三端接地，该第一场效应管的栅极通过该第二电阻接地，该第一场效应管的漏极连接该第二场效应管的源极，该第一场效应管的源极接地，该第二场效应管的栅极连接该PWM控制芯片的第二信号引脚，该第二场效应管的漏极连接该电压输入端，该第三场效应管的栅极连接该PWM控制芯片的第一信号引脚，该第三场效应管的栅极还通过该第三电阻接地，该第三场效应管的漏极连接该第二场效应管的源极，该第三场效应管的漏极还通过该电感连接该电压输出端，该电压输出端还通过该电容接地； A step-down conversion circuit, applied to a DC power converter of a computer, the step-down conversion circuit includes first and second electronic switches, first to third field effect transistors, inductors, capacitors, first to third Three resistors, a voltage input terminal for receiving an input voltage, and a voltage output terminal for outputting a voltage, wherein the first and second electronic switches each include first to third terminals; the first terminal of the first electronic switch is connected to The second end of the second electronic switch, the third end of the first electronic switch is connected to the first signal pin of the PWM control chip of the computer, the second end of the first electronic switch is connected to the first field effect transistor grid, the first end of the second electronic switch is connected to a signal end of the computer, the second end of the second electronic switch is connected to the first end of the first electronic switch, and the second end of the second electronic switch is also The third terminal of the first electronic switch is connected through the first resistor, the third terminal of the second electronic switch is grounded, the gate of the first field effect transistor is grounded through the second resistor, and the gate of the first field effect transistor is connected to the ground through the second resistor. The drain is connected to the source of the second field effect transistor, the source of the first field effect transistor is grounded, the gate of the second field effect transistor is connected to the second signal pin of the PWM control chip, and the second field effect The drain of the transistor is connected to the voltage input terminal, the gate of the third field effect transistor is connected to the first signal pin of the PWM control chip, and the gate of the third field effect transistor is also grounded through the third resistor. The drains of the three field effect transistors are connected to the source of the second field effect transistor, the drain of the third field effect transistor is also connected to the voltage output terminal through the inductor, and the voltage output terminal is also grounded through the capacitor;

当计算机处于开机状态时，该计算机的信号端输出高电平信号，当该计算机关机时，该计算机的信号端输出低电平信号； When the computer is turned on, the signal terminal of the computer outputs a high-level signal, and when the computer is turned off, the signal terminal of the computer outputs a low-level signal;

当该第一电子开关的第一端接收到低电平信号时，该第一电子开关导通，当该第一电子开关的第一端接收到高电平信号时，该第一电子开关截止；以及 When the first end of the first electronic switch receives a low-level signal, the first electronic switch is turned on, and when the first end of the first electronic switch receives a high-level signal, the first electronic switch is turned off ;as well as

当该第二电子开关的第一端接收到高电平信号时，该第二电子开关导通，当该第二电子开关的第一端接收到低电平信号时，该第二电子开关截止。 When the first end of the second electronic switch receives a high-level signal, the second electronic switch is turned on, and when the first end of the second electronic switch receives a low-level signal, the second electronic switch is turned off .

上述降压式变换电路通过该计算机的开机/关机信号端于该计算机关机时为低电平信号关闭该第一场效应管，使得该第一场效应管没有电流经过，利于节能。 The above-mentioned step-down conversion circuit turns off the first field effect transistor through the power-on/off signal terminal of the computer as a low-level signal when the computer is shut down, so that no current flows through the first field effect transistor, which is beneficial to energy saving.

附图说明 Description of drawings

图1为本发明降压式变换电路的较佳实施方式的电路图。 FIG. 1 is a circuit diagram of a preferred embodiment of the step-down conversion circuit of the present invention.

主要元件符号说明 Description of main component symbols

降压式变换电路Buck converter circuit 100100 PWM控制芯片PWM control chip 8080 PCHPCH 9090 电阻resistance R1-R5R1-R5 场效应管FET Q1-Q5Q1-Q5 二极管diode D1、D2D1, D2 电压输入端voltage input VINVIN 电源输出端Power output VOUTVOUT

如下具体实施方式将结合上述附图进一步说明本发明。 The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings.

具体实施方式 detailed description

请参考图1，本发明降压式变换电路100应用于一计算机的直流电源转换器（图未示），该降压式变换电路100的较佳实施方式包括电压输入端VIN、电压输出端VOUT、场效应管Q1-Q5、二极管D1和D2、电阻R1-R5、电感L和电容C，其中该电压输入端VIN即为该直流电源转换器的电压输入端，该电压输出端VOUT用于输出电压至该直流电源转换器的变压器。 Please refer to FIG. 1 , the step-down conversion circuit 100 of the present invention is applied to a DC power converter of a computer (not shown in the figure). , field effect transistors Q1-Q5, diodes D1 and D2, resistors R1-R5, inductor L and capacitor C, wherein the voltage input terminal VIN is the voltage input terminal of the DC power converter, and the voltage output terminal VOUT is used to output voltage to the transformer of the DC power converter.

该场效应管Q1的栅极连接该场效应管Q2的漏极，该场效应管Q1的源极连接该计算机的PWM（pulsewidthmodulation，脉冲宽度调制）控制芯片80的信号引脚LGATE，该场效应管Q1的漏极通过该电阻R1连接该场效应管Q3的栅极，该场效应管Q2的栅极连接该计算机的PCH（PlatformControllerHub，平台控制中枢）90的一信号端SLP，该场效应管Q2的漏极通过该电阻R2连接该场效应管Q1的源极，该场效应管Q2的源极接地，该场效应管Q3的栅极通过该R3接地，该场效管Q3的栅极还连接该二极管D1的阳极，该二极管D1的阴极连接该场效应管Q1的源极，该场效应管Q3的漏极连接该场效应管Q4的源极，该场效应管Q3的源极接地，该场效应管Q4的栅极连接该PWM控制芯片80的信号引脚UGATE，该场效应管Q4的漏极连接该电压输入端VIN，该场效应管Q5的栅极通过该电阻R4连接该PWM控制芯片80的信号引脚LGATE，还通过该电阻R5接地，该场效应管Q5的栅极还连接该二极管D2的阳极，该二极管D2的阴极与该PWM控制芯片80的引脚LGATE相连，该场效应管Q5的漏极连接该场效应管Q4的源极，还通过该电感L连接该电压输出端VOUT，该电压输出端VOUT通过该电容C接地。 The gate of the field effect transistor Q1 is connected to the drain of the field effect transistor Q2, and the source of the field effect transistor Q1 is connected to the signal pin LGATE of the PWM (pulsewidth modulation, pulse width modulation) control chip 80 of the computer. The drain of the transistor Q1 is connected to the gate of the field effect transistor Q3 through the resistor R1, and the gate of the field effect transistor Q2 is connected to a signal terminal SLP of the PCH (PlatformControllerHub, platform control center) 90 of the computer. The drain of Q2 is connected to the source of the field effect transistor Q1 through the resistor R2, the source of the field effect transistor Q2 is grounded, the gate of the field effect transistor Q3 is grounded through the R3, and the gate of the field effect transistor Q3 is also grounded. The anode of the diode D1 is connected, the cathode of the diode D1 is connected to the source of the field effect transistor Q1, the drain of the field effect transistor Q3 is connected to the source of the field effect transistor Q4, and the source of the field effect transistor Q3 is grounded, The gate of the field effect transistor Q4 is connected to the signal pin UGATE of the PWM control chip 80, the drain of the field effect transistor Q4 is connected to the voltage input terminal VIN, and the gate of the field effect transistor Q5 is connected to the PWM through the resistor R4. The signal pin LGATE of the control chip 80 is also grounded through the resistor R5, the gate of the field effect transistor Q5 is also connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the pin LGATE of the PWM control chip 80, the The drain of the field effect transistor Q5 is connected to the source of the field effect transistor Q4, and also connected to the voltage output terminal VOUT through the inductor L, and the voltage output terminal VOUT is grounded through the capacitor C.

本实施例中，该场效应管Q1为P沟道场效应管，该场效应管Q2-Q5均为N沟道场效应管。 In this embodiment, the field effect transistor Q1 is a P-channel field effect transistor, and the field effect transistors Q2-Q5 are all N-channel field effect transistors.

当该计算机处于开机状态时，该PCH90的信号端SLP发出一高电平信号至该场效应管Q2的栅极，以使得该场效应管Q2导通，继而使得该场效应管Q1的栅极通过该场效应Q2被下拉接地，从而使得该场效应管Q1导通，则该PWM控制芯片80的引脚LAGTE通过该场效应管Q1发出脉冲信号至该场效应管Q3的栅极，并同时通过该电阻R4发出该脉冲信号至该场效应管Q5的栅极，以同时控制该场效应管Q3和Q5的导通和截止，此时，该场效应管Q3及Q5即在该PWM控制芯片80的信号端LGATE控制下同时工作，以减低导通损，提高工作效率。 When the computer is in the power-on state, the signal terminal SLP of the PCH90 sends a high-level signal to the gate of the field effect transistor Q2, so that the field effect transistor Q2 is turned on, and then the gate of the field effect transistor Q1 is turned on. The field effect Q2 is pulled down to ground, so that the field effect transistor Q1 is turned on, and the pin LAGTE of the PWM control chip 80 sends a pulse signal to the gate of the field effect transistor Q3 through the field effect transistor Q1, and at the same time Send the pulse signal to the gate of the field effect transistor Q5 through the resistor R4 to simultaneously control the on and off of the field effect transistors Q3 and Q5. At this time, the field effect transistors Q3 and Q5 are in the PWM control chip The signal terminal LGATE of 80 works at the same time under the control to reduce the conduction loss and improve the working efficiency.

当该计算机关机时，该PCH90的信号端SLP发出一低电平信号至该场效应管Q2的栅极，以使得该场效应管Q2截止，继而使得该场效应管Q1的栅极的信号为高电平信号，此时，该场效应管Q1截止，使得该场效应管Q3的栅极不能接收到该PWM控制芯片80的引脚LGATE的脉冲信号，继而使得该场效应管Q3的栅极通过该电阻R3被下拉接地，则该场效应管Q3保持截止状态，如此，该PWM控制芯片80的信号端LAGTE只控制该场效应管Q5的导通和截止，即此时只有该场效应Q5在PWM控制芯片的控制下工作，而场效应管Q3则没有电流经过，可减少不必要的能耗。 When the computer is turned off, the signal terminal SLP of the PCH90 sends a low-level signal to the gate of the field effect transistor Q2, so that the field effect transistor Q2 is cut off, and then the signal of the gate of the field effect transistor Q1 is High-level signal, at this time, the field effect transistor Q1 is cut off, so that the gate of the field effect transistor Q3 cannot receive the pulse signal of the pin LGATE of the PWM control chip 80, and then the gate of the field effect transistor Q3 When the resistor R3 is pulled down to ground, the field effect transistor Q3 remains in the cut-off state. In this way, the signal terminal LAGTE of the PWM control chip 80 only controls the conduction and cut-off of the field effect transistor Q5, that is, at this time only the field effect transistor Q5 It works under the control of the PWM control chip, and the field effect transistor Q3 has no current passing through, which can reduce unnecessary energy consumption.

由上述可知，当该计算机开机或关机时，该PCH90的信号端SLP发出高电平信号或低电平信号使该场效应管Q2导通或截止，故，其他实施例中，该场效应管Q2的栅极还可接收来自该计算机的其他电路模块或元件的信号端的信号以控制该场效应管Q2在该计算机开机时导通，在该计算机关机时截止，只要该计算机的其他电路模块或元件的信号端的信号在该计算机开机时为高电平信号，在该计算机关机时为低电平信号即可，不局限于本实施例的PCH90的信号端SLP。另外，该场效应管Q1和Q2在电路中均起到电子开关的作用，故，其他实施方式中，该场效应管Q1和Q2还可为其它类型的晶体管如三极管来代替，甚至其它具有电子开关功能的电子组件均可。 It can be seen from the above that when the computer is turned on or off, the signal terminal SLP of the PCH90 sends a high-level signal or a low-level signal to turn on or off the field effect transistor Q2. Therefore, in other embodiments, the field effect transistor The gate of Q2 can also receive signals from the signal terminals of other circuit modules or components of the computer to control the field effect transistor Q2 to be turned on when the computer is turned on, and to be cut off when the computer is turned off, as long as other circuit modules of the computer or The signal at the signal end of the component is a high-level signal when the computer is turned on, and a low-level signal when the computer is turned off, and is not limited to the signal end SLP of PCH90 in this embodiment. In addition, the field effect transistors Q1 and Q2 both function as electronic switches in the circuit. Therefore, in other implementation manners, the field effect transistors Q1 and Q2 can also be replaced by other types of transistors such as triodes, or even other types of transistors with electronic Electronic components for switching functions are acceptable.

上述降压式变换电路100通过该PCH90的信号端SLP于该计算机关机时为低电平信号关闭该场效应管Q3，使得该场效应管Q3没有电流经过，利于节能。 The step-down conversion circuit 100 turns off the field effect transistor Q3 through the signal terminal SLP of the PCH90 when the computer is turned off as a low level signal, so that no current flows through the field effect transistor Q3, which is beneficial to energy saving.