CN103312331B - A kind of analog to digital converter based on memristor - Google Patents
- ️Wed Apr 13 2016
CN103312331B - A kind of analog to digital converter based on memristor - Google Patents
A kind of analog to digital converter based on memristor Download PDFInfo
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- CN103312331B CN103312331B CN201310208362.5A CN201310208362A CN103312331B CN 103312331 B CN103312331 B CN 103312331B CN 201310208362 A CN201310208362 A CN 201310208362A CN 103312331 B CN103312331 B CN 103312331B Authority
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Abstract
The present invention relates to semiconductor integrated circuit field, it discloses and a kind ofly novel there is high accuracy, low-power consumption, the analog to digital converter based on memristor that chip occupying area is little.This analog to digital converter comprises generating circuit from reference voltage, comparator, the counter of generation output codons and reset circuit; Described generating circuit from reference voltage is connected with the end of oppisite phase of comparator; The homophase termination input voltage of described comparator; The output of described comparator passes through or door is connected with the counter of described generation output codons; Described reset circuit is connected with described generating circuit from reference voltage.The present invention is based on the analog to digital converter that memristor realizes and there is high accuracy, low-power consumption, advantage that chip occupying area is little, and this analog to digital converter simple structure, be easy to control, be applicable to low-power consumption analog-to-digital conversion.
Description
技术领域technical field
本发明涉及半导体集成电路领域,特别涉及一种基于忆阻器的模数转换器,用于进行模拟信号到数字信号的转换。The invention relates to the field of semiconductor integrated circuits, in particular to an analog-to-digital converter based on a memristor, which is used for converting analog signals to digital signals.
背景技术Background technique
随着电子技术的迅速发展以及计算机在自动检测和自动控制系统中的广泛应用,利用数字电子计算机所处理和传送的都是不连续的数字信号,而实际中遇到的大都是连续变化的模拟量,模拟量经过传感器采集转换成为电信号的模拟量后,需经模数转换变成数字信号才可输入到数字系统中进行处理和控制,因而作为把模拟电量转换成数字量输出的接口电路——模/数转换器是模拟信号通向数字信号的桥梁,也是当今电子技术发展的关键和瓶颈所在。With the rapid development of electronic technology and the wide application of computers in automatic detection and automatic control systems, what are processed and transmitted by digital electronic computers are discontinuous digital signals, and most of them encountered in practice are continuously changing analog signals. After the analog quantity is collected and converted into an analog quantity of an electrical signal by a sensor, it needs to be converted into a digital signal by analog-to-digital conversion before it can be input into the digital system for processing and control. Therefore, it is used as an interface circuit for converting analog power into digital output. ——The analog/digital converter is the bridge from analog signal to digital signal, and it is also the key and bottleneck of the development of electronic technology today.
模数转换器包括三个基本功能:抽样、量化和编码;抽样是将模拟信号在时间上离散化,使之成为抽样信号;量化将抽样信号的幅度离散化使之成为数字信号;编码则将数字信号最终表示成数字系统所能接受的形式;如何实现这三个功能就决定了ADC的形式和性能。同时,ADC的分辨率越高,需要的转换时间就越长,转换速率就越低,故ADC的分辨率和转换速率两者总是相互制约的。因而在发展高分辨率ADC的同时要兼顾高速,在发展高速ADC的同时要兼顾高分辨率,在此基础上还要考虑功耗、体积、便携性、多功能、与计算机及通讯网络的兼容性以及应用领域的特殊要求等问题,这也使得ADC的结构和分类错综复杂。The analog-to-digital converter includes three basic functions: sampling, quantization, and coding; sampling is to discretize the analog signal in time to make it a sampling signal; quantization is to discretize the amplitude of the sampling signal to make it a digital signal; coding will The digital signal is finally expressed in a form acceptable to the digital system; how to realize these three functions determines the form and performance of the ADC. At the same time, the higher the resolution of the ADC, the longer the required conversion time and the lower the conversion rate, so the resolution and the conversion rate of the ADC always restrict each other. Therefore, while developing a high-resolution ADC, it is necessary to take into account the high speed, and to develop a high-speed ADC while taking into account the high resolution. On this basis, power consumption, volume, portability, multi-function, and compatibility with computers and communication networks must also be considered. Issues such as reliability and special requirements in the application field also make the structure and classification of ADC intricate.
当前,为了适应计算机、通讯和多媒体技术的飞速发展以及高新技术领域的数字化进程不断加快,模数转换电路在工艺、结构、性能上都有了很大的进步,正在朝着低功耗、高速、高分辨率的方向发展。At present, in order to adapt to the rapid development of computer, communication and multimedia technology and the continuous acceleration of the digital process in the high-tech field, the analog-to-digital conversion circuit has made great progress in technology, structure and performance, and is moving towards low power consumption and high speed. , high-resolution direction.
忆阻器(MEMRISTOR)是电阻、电容和电感之外的第四种基本的无源器件,由蔡少棠于1971年首次提出忆阻器的概念并论证了其存在的理论依据。2008年,HP实验室发现并制作了具有忆阻特性的双端电阻。对忆阻器外加编程电压可以使忆阻器阻值在最大阻值RMAX和最小阻值RMIN之间变化:在忆阻器两端加正电压时,忆阻器阻值降低;在忆阻器两端加负电压时,忆阻器阻值升高。Memristor (MEMRISTOR) is the fourth basic passive device besides resistors, capacitors and inductors. Cai Shaotang first proposed the concept of memristor in 1971 and demonstrated the theoretical basis for its existence. In 2008, HP Labs discovered and fabricated a double-terminal resistor with memristive properties. Applying a programming voltage to the memristor can change the resistance value of the memristor between the maximum resistance value R MAX and the minimum resistance value R MIN : when a positive voltage is applied to both ends of the memristor, the resistance value of the memristor decreases; When a negative voltage is applied across the resistor, the resistance of the memristor increases.
通常忆阻器的最大阻值RMAX和最小阻值RMIN相差三个以上数量级,阻值改变时间可低至纳秒量级,编程电压低,并且可以通过控制编程脉冲的幅度、频率、个数以及占空比将忆阻器阻值编程在最大阻值和最小阻值之间的任意阻值。Usually, the maximum resistance value R MAX and the minimum resistance value R MIN of a memristor differ by more than three orders of magnitude. The number and the duty cycle program the memristor resistance to any resistance value between the maximum resistance value and the minimum resistance value.
因此,如何应用忆阻器的上述特点设计出一种基于忆阻器的具有高精度、低功耗、占用芯片面积小等优点的模数转换电路成为当前研究的重点。Therefore, how to apply the above characteristics of memristors to design an analog-to-digital conversion circuit based on memristors with the advantages of high precision, low power consumption, and small chip area occupation has become the focus of current research.
发明内容Contents of the invention
本发明所要解决的技术问题是:提出一种新型的高精度、低功耗、占用芯片面积小的基于忆阻器的模数转换器。The technical problem to be solved by the present invention is to propose a new memristor-based analog-to-digital converter with high precision, low power consumption and small chip area occupation.
本发明解决上述技术问题采用的方案是:一种基于忆阻器的模数转换器,包括参考电压产生电路、比较器、产生输出码字的计数器及复位电路;所述参考电压产生电路与比较器的反相端相连;所述比较器的同相端接输入电压;所述比较器的输出端通过或门与所述产生输出码字的计数器相连;所述复位电路与所述参考电压产生电路相连。The solution adopted by the present invention to solve the above-mentioned technical problems is: an analog-to-digital converter based on a memristor, including a reference voltage generating circuit, a comparator, a counter for generating output codewords, and a reset circuit; the reference voltage generating circuit and the comparator The inverting terminal of the comparator is connected; the non-inverting terminal of the comparator is connected to the input voltage; the output terminal of the comparator is connected to the counter that generates the output code word through an OR gate; the reset circuit is connected to the reference voltage generating circuit connected.
进一步,所述参考电压产生电路包括忆阻器、第一传输门、第二传输门、反相器及电流源;所述反相器的输入端与所述第一传输门的控制端相连,并连接时钟信号;所述反相器的输出端与所述第二传输门的控制端相连;所述第一传输门的输入端与编程电压相连,其输出端与所述忆阻器的顶电极(TE)相连;所述第二传输门的输入端与所述忆阻器的顶电极(TE)相连,其输出端与所述电流源相连;所述忆阻器的底电极(BE)接地。Further, the reference voltage generation circuit includes a memristor, a first transmission gate, a second transmission gate, an inverter and a current source; the input terminal of the inverter is connected to the control terminal of the first transmission gate, And connect the clock signal; the output terminal of the inverter is connected with the control terminal of the second transmission gate; the input terminal of the first transmission gate is connected with the programming voltage, and its output terminal is connected with the top of the memristor The electrode (TE) is connected; the input terminal of the second transmission gate is connected with the top electrode (TE) of the memristor, and its output terminal is connected with the current source; the bottom electrode (BE) of the memristor grounded.
进一步,所述复位电路包括电压源及第三传输门;所述第三传输门的输入端与所述电压源相连,其输出端与所述忆阻器的顶电极(TE)相连,其控制端与所述比较器的输出端相连。Further, the reset circuit includes a voltage source and a third transmission gate; the input terminal of the third transmission gate is connected to the voltage source, and its output terminal is connected to the top electrode (TE) of the memristor, which controls connected to the output of the comparator.
本发明的有益效果是:基于忆阻器实现的模数转换器具有高精度、低功耗、占用芯片面积小的优点,且该模数转换器构造简单、易于控制,适用于低功耗模数转换。The beneficial effects of the present invention are: the analog-to-digital converter based on the memristor has the advantages of high precision, low power consumption, and small chip area, and the analog-to-digital converter is simple in structure and easy to control, and is suitable for low-power consumption mode number conversion.
附图说明Description of drawings
图1为本发明中的模数转换器的参考电压产生电路结构图;Fig. 1 is the structure diagram of the reference voltage generation circuit of the analog-to-digital converter in the present invention;
图2为本发明中的模数转换器的复位电路结构图;Fig. 2 is a reset circuit structural diagram of the analog-to-digital converter in the present invention;
图3为本发明中的模数转换器的整体结构图;Fig. 3 is the overall structural diagram of the analog-to-digital converter in the present invention;
图4为忆阻器的阻值随脉冲个数变化曲线图;Fig. 4 is a graph showing the change of the resistance value of the memristor with the number of pulses;
图5为本发明中的模数转换器的工作流程图;Fig. 5 is the work flowchart of the analog-to-digital converter among the present invention;
图6为实施例中的忆阻器阻值随时钟个数变化曲线图;Fig. 6 is a graph showing the variation of the resistance value of the memristor with the number of clocks in the embodiment;
图7为实施例中参考电压随时钟个数变化曲线图;Fig. 7 is a curve diagram of the reference voltage changing with the number of clocks in the embodiment;
图中,S1为第一传输门、S2为第二传输门、S3为第三传输门、I1为反相器、I2为或门、IREAD为电流源、CLK为时钟信号、Vp为编程电压、VRESET为电压源、VIN为输入电压。In the figure, S1 is the first transmission gate, S2 is the second transmission gate, S3 is the third transmission gate, I1 is the inverter, I2 is the OR gate, I READ is the current source, CLK is the clock signal, Vp is the programming voltage , V RESET is the voltage source, V IN is the input voltage.
具体实施方式detailed description
本发明旨在提出一种新型的具有高精度、低功耗、占用芯片面积小的基于忆阻器的模数转换器,忆阻器(MEMRISTOR)是电阻、电容和电感之外的第四种基本的无源器件。可以通过控制加在忆阻器两端的脉冲信号的幅度、频率、个数以及占空比将忆阻器的阻值编程在最大阻值RMAX和最小阻值RMIN之间的任意阻值;本发明中使用电压脉冲对忆阻器的阻值进行编程,忆阻器阻值会随脉冲个数逐渐变化;为了实现忆阻器阻值的逐渐下降,本发明采用正电压脉冲加在忆阻器顶电极对忆阻器阻值进行编程,从而可以通过控制脉冲幅度、频率、占空比以及脉冲个数使忆阻器阻值呈阶跃状逐渐下降。The present invention aims to propose a new type of memristor-based analog-to-digital converter with high precision, low power consumption, and small chip area. Memristor (MEMRISTOR) is the fourth type of Basic passive components. The resistance value of the memristor can be programmed to any resistance value between the maximum resistance value R MAX and the minimum resistance value R MIN by controlling the amplitude, frequency, number and duty cycle of the pulse signal applied to both ends of the memristor; In the present invention, a voltage pulse is used to program the resistance value of the memristor, and the resistance value of the memristor will gradually change with the number of pulses; in order to realize the gradual decline of the resistance value of the memristor, the present invention uses a positive voltage pulse to add The top electrode of the device programs the resistance value of the memristor, so that the resistance value of the memristor can gradually decrease in a step-like manner by controlling the pulse amplitude, frequency, duty cycle and number of pulses.
本发明中的模数转换器包括参考电压产生电路、比较器、产生输出码字的计数器及复位电路几个部分,所述参考电压产生电路与比较器的反相端相连;所述比较器的同相端接输入电压;所述比较器的输出端通过或门与所述产生输出码字的计数器相连;所述复位电路与所述参考电压产生电路相连。The analog-to-digital converter in the present invention includes several parts of a reference voltage generation circuit, a comparator, a counter and a reset circuit for generating output codewords, the reference voltage generation circuit is connected with the inverting terminal of the comparator; The non-inverting terminal is connected to the input voltage; the output terminal of the comparator is connected to the counter for generating the output code word through an OR gate; the reset circuit is connected to the reference voltage generating circuit.
在具体实施上,参考电压产生电路如图1所示,其包括忆阻器(MEMRISTOR)、第一传输门S1、第二传输门S2、反相器I1及电流源IREAD;所述反相器I1的输入端与所述第一传输门S1的控制端相连,并连接时钟信号CLK;所述反相器I1的输出端与所述第二传输门S2的控制端相连;所述第一传输门S1的输入端与编程电压VP相连,其输出端与所述忆阻器的顶电极TE相连;所述第二传输门S2的输入端与所述忆阻器的顶电极相连,其输出端与所述电流源IREAD相连;所述忆阻器的底电极(BE)接地;此参考电压产生电路用于产生随时钟个数逐渐下降的参考电压VREF加到比较器(CMP)的反相端与输入电压VIN进行比较;In specific implementation, the reference voltage generation circuit is shown in Figure 1, which includes a memristor (MEMRISTOR), a first transmission gate S1, a second transmission gate S2, an inverter I1 and a current source I READ ; The input terminal of the inverter I1 is connected to the control terminal of the first transmission gate S1, and connected to the clock signal CLK; the output terminal of the inverter I1 is connected to the control terminal of the second transmission gate S2; the first The input terminal of the transmission gate S1 is connected to the programming voltage VP , and its output terminal is connected to the top electrode TE of the memristor; the input terminal of the second transmission gate S2 is connected to the top electrode of the memristor, and its output terminal is connected to the top electrode TE of the memristor. The output terminal is connected to the current source I READ ; the bottom electrode (BE) of the memristor is grounded; this reference voltage generation circuit is used to generate a reference voltage V REF that gradually decreases with the number of clocks and add it to the comparator (CMP) The inverting terminal of is compared with the input voltage V IN ;
复位电路如图2所示,其包括电压源VRESET及第三传输门S3,所述第三传输门S3的输入端与所述电压源VRESET相连,其输出端与所述忆阻器的顶电极相连,其控制端与所述比较器的输出端相连;此复位电路用于对忆阻器进行复位操作,使其阻值回到最大值RMAX;The reset circuit is shown in Figure 2, which includes a voltage source V RESET and a third transmission gate S3, the input terminal of the third transmission gate S3 is connected to the voltage source V RESET , and its output terminal is connected to the memristor. The top electrode is connected, and its control terminal is connected to the output terminal of the comparator; this reset circuit is used to reset the memristor so that its resistance returns to the maximum value R MAX ;
基于上述参考电压产生电路、复位电路、比较器及产生输出码字的计数器而构成的模数转换器的整体结构如图3所示。The overall structure of the analog-to-digital converter based on the above-mentioned reference voltage generation circuit, reset circuit, comparator and counter for generating output codewords is shown in FIG. 3 .
在本发明中,参考电压产生电路工作时通过给忆阻器上外加与时钟信号频率相同,占空比相同,幅度为VP的电压脉冲对忆阻器阻值进行编程,使忆阻器阻值随时钟个数逐渐下降,从而产生逐渐下降的参考电压VREF。In the present invention, when the reference voltage generating circuit works, the memristor is programmed with a voltage pulse with the same frequency as the clock signal, the same duty cycle, and an amplitude of VP to the memristor, so that the memristor resistance The value decreases gradually with the number of clocks, resulting in a gradually decreasing reference voltage V REF .
在每个转换周期的第一个时钟脉冲到来前,忆阻器被复位电路复位到RMAX;在时钟信号CLK为高电平时,第一传输门S1导通,第二传输门S2关断,忆阻器顶电极(TE)接编程电压VP,底电极(BE)接地,VP对忆阻器阻值编程,由于编程电压VP为正电压,忆阻器阻值随时钟个数逐渐下降,从而可以产生随时钟个数逐渐下降的参考电压VREF。在时钟信号CLK为低电平时,第一传输门S1关断,第二传输门S2导通,一个不会导致忆阻器阻值变化的读电流IREAD从忆阻器顶电极流入,从而将编程后的忆阻器阻值转换为参考电压VREF,即:Before the arrival of the first clock pulse of each conversion cycle, the memristor is reset to R MAX by the reset circuit; when the clock signal CLK is at a high level, the first transmission gate S1 is turned on, and the second transmission gate S2 is turned off, The top electrode (TE) of the memristor is connected to the programming voltage V P , the bottom electrode (BE) is grounded, and V P programs the resistance of the memristor. Since the programming voltage V P is a positive voltage, the resistance of the memristor gradually increases Decrease, so that a reference voltage V REF that gradually decreases with the number of clocks can be generated. When the clock signal CLK is at a low level, the first transmission gate S1 is turned off, and the second transmission gate S2 is turned on, and a read current I READ that does not cause a change in the resistance of the memristor flows in from the top electrode of the memristor, thereby converting The programmed memristor resistance is converted to a reference voltage V REF , namely:
VREF=IREADRM V REF =I READ R M
其中RM为忆阻器阻值。Where R M is the resistance value of the memristor.
本发明中的模数转换电路的工作流程如图5所示,转换周期开始时,模拟输入信号(即输入电压VIN)被采样、保持并送到比较器的同相端;计数器被复位,忆阻器阻值被复位到最大阻值RMAX,时钟同时加到用来控制忆阻器阻值的传输门上。在第一个时钟脉冲到来时,当时钟为低电平时,第一传输门S1关断,第二传输门S2导通,一个不影响忆阻器阻值的读取电流IREAD读取忆阻器阻值并转换为参考电压加在比较器的反相端与输入电压VIN比较,此时忆阻器阻值为最大值RMAX,产生初始参考电压,如果VIN比初始参考电压值小,比较器输出低电平,输出计数器对时钟计数加1;当下一个时钟高电平来临时,第一传输门S1导通,第二传输门S2关断,编程电压VP对忆阻器阻值编程,进一步降低忆阻器的阻值,从而在下一个时钟低电平到来时,使加在比较器反相端的参考电压进一步下降。因为VIN比参考电压小,比较器输出低电平,并且加到或门I2上的每个时钟脉冲引起输出端的计数器计数;最后,当忆阻器阻值降低到使参考电压小于或等于VIN时,比较器输出上升为高电平,输出计数器被禁止,并且使第三传输门S3导通,对忆阻器外加一个较大的负电压VRESET对忆阻器进行复位操作,使忆阻器阻值回到最大阻值RMAX。代表输出计数器状态的二进制数现在可以转换成要求的码型。忆阻器阻值随脉冲个数变化曲线如图4所示,可以通过改变脉冲频率、占空比以及幅度的大小来改变忆阻器阻值变化阶跃值的大小。本发明可以通过改变时钟频率、占空比以及VP的大小来改变忆阻器阻值变化阶跃值的大小,来改变参考电压变化阶跃值的大小。The working process of the analog-to-digital conversion circuit in the present invention is shown in Figure 5. At the beginning of the conversion cycle, the analog input signal (i.e. the input voltage V IN ) is sampled, held and sent to the non-inverting terminal of the comparator; the counter is reset, and the memory The resistance of the resistor is reset to the maximum resistance R MAX , and the clock is simultaneously applied to the transmission gate used to control the resistance of the memristor. When the first clock pulse arrives, when the clock is at a low level, the first transmission gate S1 is turned off, the second transmission gate S2 is turned on, and a read current I READ that does not affect the resistance of the memristor reads the memristor The resistance value of the memristor is converted into a reference voltage and added to the inverting terminal of the comparator to compare with the input voltage V IN . At this time, the resistance value of the memristor is the maximum value R MAX to generate an initial reference voltage. If V IN is smaller than the initial reference voltage value , the comparator outputs a low level, and the output counter adds 1 to the clock count; when the next clock high level comes, the first transmission gate S1 is turned on, the second transmission gate S2 is turned off, and the programming voltage V P is on the resistance of the memristor. value programming to further reduce the resistance of the memristor, so that when the next clock low level arrives, the reference voltage applied to the inverting terminal of the comparator is further reduced. Because V IN is smaller than the reference voltage, the output of the comparator is low, and each clock pulse applied to the OR gate I2 causes the counter at the output to count; finally, when the resistance of the memristor decreases to make the reference voltage less than or equal to V When IN , the output of the comparator rises to a high level, the output counter is prohibited, and the third transmission gate S3 is turned on, and a large negative voltage V RESET is applied to the memristor to reset the memristor, so that the memristor The resistance of the resistor returns to the maximum resistance R MAX . The binary number representing the state of the output counter can now be converted into the required pattern. The change curve of the resistance value of the memristor with the number of pulses is shown in Fig. 4, and the step value of the resistance value of the memristor can be changed by changing the pulse frequency, duty cycle and amplitude. The present invention can change the size of the step value of the resistance value of the memristor by changing the clock frequency, the duty ratio and the size of VP, so as to change the size of the step value of the reference voltage change .
下面结合附图及实施例对本发明的方案作进一步的描述:Below in conjunction with accompanying drawing and embodiment the scheme of the present invention will be further described:
在本实例中,忆阻器最大阻值RMAX为20kOhm,最小阻值RMIN为10kOhm,电压源VP为0.5V,电流源IREAD为10uA,时钟频率为1KHz,占空比为20%,则忆阻器阻值随时钟个数变化曲线如图6所示,每个编程脉冲使忆阻器阻值下降500Ohm,即每过一个时钟参考电压下降5mV,参考电压随时钟个数变化曲线图如图7所示;采用本例中的模数转换器进行工作时,其输入信号范围和对应的计数器输出如下表所示:In this example, the maximum resistance value R MAX of the memristor is 20kOhm, the minimum resistance value R MIN is 10kOhm, the voltage source V P is 0.5V, the current source I READ is 10uA, the clock frequency is 1KHz, and the duty cycle is 20%. , then the change curve of the memristor resistance value with the number of clocks is shown in Figure 6. Each programming pulse reduces the resistance value of the memristor by 500Ohm, that is, the reference voltage drops 5mV every time a clock passes, and the change curve of the reference voltage with the number of clocks The figure is shown in Figure 7; when using the analog-to-digital converter in this example to work, its input signal range and corresponding counter output are shown in the following table:
表一:输入信号范围与计数器输出的对应表Table 1: Correspondence between input signal range and counter output
输入信号范围Input signal range 计数器输出counter output 200mV<VIN 200mV<V IN 0000000000 195mV<VIN≤200mV195mV<V IN ≤200mV 0000100001 190mV<VIN≤195mV190mV<V IN ≤195mV 0001000010 185mV<VIN≤190mV185mV<V IN ≤190mV 0001100011 180mV<VIN≤185mV180mV<V IN ≤185mV 0010000100 175mV<VIN≤180mV175mV<V IN ≤180mV 0010100101 170mV<VIN≤175mV170mV<V IN ≤175mV 0011000110
165mV<VIN≤170mV165mV<V IN ≤170mV 0011100111 160mV<VIN≤165mV160mV<V IN ≤165mV 0100001000 155mV<VIN≤160mV155mV<V IN ≤160mV 0100101001 150mV<VIN≤155mV150mV<V IN ≤155mV 0101001010 145mV<VIN≤150mV145mV<V IN ≤150mV 0101101011 140mV<VIN≤145mV140mV<V IN ≤145mV 0110001100 135mV<VIN≤140mV135mV<V IN ≤140mV 0110101101 130mV<VIN≤135mV130mV<V IN ≤135mV 0111001110 125mV<VIN≤130mV125mV<V IN ≤130mV 0111101111 120mV<VIN≤125mV120mV<V IN ≤125mV 1000010000 115mV<VIN≤120mV115mV<V IN ≤120mV 1000110001 110mV<VIN≤115mV110mV<V IN ≤115mV 1001010010 105mV<VIN≤110mV105mV<V IN ≤110mV 1001110011
由此可见,采用本发明中的模数转换器可以实现高精度的模数转换需求。It can be seen that the high-precision analog-to-digital conversion requirement can be realized by adopting the analog-to-digital converter in the present invention.
需要说明的是,本发明要求保护的方案包含但不仅限于上述实施例,本领域的技术人员在不脱离本发明精神实质情况下根据上述实施例的描述所做出的等同修改/替换,皆在本发明的保护范围之内。It should be noted that the solutions claimed in the present invention include but are not limited to the above-mentioned embodiments. Equivalent modifications/replacements made by those skilled in the art according to the descriptions of the above-mentioned embodiments without departing from the spirit of the present invention are all in within the protection scope of the present invention.
Claims (1)
1.一种基于忆阻器的模数转换器,其特征在于,包括参考电压产生电路、比较器、产生输出码字的计数器及复位电路;所述参考电压产生电路与比较器的反相端相连;所述比较器的同相端接输入电压;所述比较器的输出端通过或门与所述产生输出码字的计数器相连;所述复位电路与所述参考电压产生电路相连;1. A kind of analog-to-digital converter based on memristor, it is characterized in that, comprise reference voltage generation circuit, comparator, counter and reset circuit that produce output code word; The inverting terminal of described reference voltage generation circuit and comparator Connected; the non-inverting terminal of the comparator is connected to the input voltage; the output terminal of the comparator is connected to the counter that generates the output code word through an OR gate; the reset circuit is connected to the reference voltage generating circuit; 所述参考电压产生电路包括忆阻器、第一传输门、第二传输门、反相器及电流源;所述反相器的输入端与所述第一传输门的控制端相连,并连接时钟信号;所述反相器的输出端与所述第二传输门的控制端相连;所述第一传输门的输入端与编程电压相连,其输出端与所述忆阻器的顶电极相连;所述第二传输门的输入端与所述忆阻器的顶电极相连,其输出端与所述电流源相连;所述忆阻器的底电极接地;The reference voltage generation circuit includes a memristor, a first transmission gate, a second transmission gate, an inverter and a current source; the input terminal of the inverter is connected to the control terminal of the first transmission gate, and connected to clock signal; the output terminal of the inverter is connected to the control terminal of the second transmission gate; the input terminal of the first transmission gate is connected to the programming voltage, and the output terminal thereof is connected to the top electrode of the memristor ; the input terminal of the second transmission gate is connected to the top electrode of the memristor, and its output terminal is connected to the current source; the bottom electrode of the memristor is grounded; 所述复位电路包括电压源及第三传输门;所述第三传输门的输入端与所述电压源相连,其输出端与所述忆阻器的顶电极相连,其控制端与所述比较器的输出端相连。The reset circuit includes a voltage source and a third transmission gate; the input terminal of the third transmission gate is connected to the voltage source, its output terminal is connected to the top electrode of the memristor, and its control terminal is connected to the comparison connected to the output of the device.
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