CN103368575A - Digital correction circuit and digital-to-analog converter of current-steering structure and with same - Google Patents
- ️Wed Oct 23 2013
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- CN103368575A CN103368575A CN2013103003261A CN201310300326A CN103368575A CN 103368575 A CN103368575 A CN 103368575A CN 2013103003261 A CN2013103003261 A CN 2013103003261A CN 201310300326 A CN201310300326 A CN 201310300326A CN 103368575 A CN103368575 A CN 103368575A Authority
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Abstract
The invention belongs to the technical field of digital simulation hybrid-integrated-circuits, and discloses a digital correction circuit and a digital-to-analog converter of a current-steering structure and with the digital correction circuit. The digital-to-analog converter solves the problems that in the prior art, a digital-to-analog converter of a current-steering structure occupies a larger domain area, cost of chips is increased, large stray capacitance and parasitic resistance are brought to currents, and dynamic performance of the digital-to-analog converter is influenced. Voltage at the two ends of a first resistor is collected and compared when a current source control switch is under an opening state and a closing state through the digital correction circuit, control codes for a current source in high-order current source arrays are generated through successive approximation, and thus the digital-to-analog converter is corrected, namely actual values of the magnitude of the currents of the high-order current source are regulated to reference values through continuous comparison and the successive approximation. The digital-to-analog converter greatly shortens the domain area of the high-order current source of a thermometer code, meanwhile guarantees performance, and is suitable for digital-to-analog conversion operation.
Description
技术领域technical field
本发明属于数字模拟混合集成电路技术领域，特别涉及一种数字校正电路及含有该电路的电流舵结构的数模转换器。The invention belongs to the technical field of digital-analog hybrid integrated circuits, in particular to a digital correction circuit and a digital-to-analog converter with a current steering structure including the circuit.
背景技术Background technique
在信号采集处理、数字通信、自动检测和多媒体技术等领域，数模转换器（DAC）往往是不可缺少的部分。在多种不同的数模转换器结构中，采用电流舵结构的数模转换器在速度和精度上有较大的优势，因此应用广泛。在实际的电流舵结构数模转换器中，要求高精度，低的微分非线性误差、积分非线性误差，高的信号噪声比，这需要实际电路与工艺有很好的兼容性。为了满足高精度的要求,电流源阵列往往需要很大的宽长比来缓解工艺的偏差、器件失配等影响,但与此同时导致了电流源阵列的面积很大。当电流舵数模转换器位数增加时，其版图面积会随指数形式增长，芯片成本也将同步增加。In the fields of signal acquisition and processing, digital communication, automatic detection and multimedia technology, digital-to-analog converter (DAC) is often an indispensable part. Among various DAC structures, the DAC with the current steering structure has great advantages in speed and precision, so it is widely used. In the actual current steering structure digital-to-analog converter, high precision, low differential nonlinear error, integral nonlinear error, and high signal-to-noise ratio are required, which requires good compatibility between the actual circuit and the process. In order to meet the high-precision requirements, the current source array often needs a large aspect ratio to alleviate the influence of process deviation and device mismatch, but at the same time it leads to a large area of the current source array. When the number of bits of the current steering digital-to-analog converter increases, its layout area will increase exponentially, and the chip cost will also increase simultaneously.
电流舵结构数模转换器分为二进制（Binary）编码、温度计（Unary）编码和混合（Hybrid）编码三种架构，为了版图面积和电路性能之间的折衷，一般采用高位温度计编码、低位二进制编码的混合编码架构。传统的混合架构的电流舵结构数模转换器结构如图1所示：该电流舵结构数模转换器包括延时单元101，温度计编码电路102，同步单元103，开关驱动阵列104，基准产生电路105，低位电流源阵列106，高位电流源阵列107,第一互补开关S1A、S1B和第二互补开关S2A、S2B,第一电阻R1和第二电阻R2；低位的数字输入与延时单元101的输入端相连，高位的数字输入与温度计编码电路102的输入端相连，延时单元101的输出端和温度计编码电路102的输出端与同步单元103的输入端相连，同步单元103的输出端与开关驱动阵列104的输入端相连，基准产生电路105的输出端与低位电流源阵列106与高位电流源阵列107的输入端相连，低位电流源阵列106的输出端与第一互补开关S1A、S1B的一端相连，高位电流源阵列107的输出端与第二互补开关S2A、S2B的一端相连，开关阵列S1A、S2A的另一端与第一电阻R1的一端相连，第一电阻R1的另一端接地，第二开关阵列S1B、S2B的另一端与第二电阻R2的一端相连，第二电阻R2的另一端接地，开关驱动阵列104的输出端与第一互补开关S1A、S1B和第二互补开关S2A、S2B的控制端相连。Current steering structure digital-to-analog converters are divided into three architectures: binary code, thermometer (unary) code and hybrid (hybrid) code. In order to compromise between layout area and circuit performance, high thermometer code and low binary code hybrid encoding architecture. The structure of the traditional hybrid current-steering digital-to-analog converter is shown in Figure 1: the current-steering digital-to-analog converter includes a delay unit 101, a thermometer encoding circuit 102, a synchronization unit 103, a switch drive array 104, and a reference generation circuit 105, low current source array 106, high current source array 107, first complementary switches S1A, S1B and second complementary switches S2A, S2B, first resistor R1 and second resistor R2; low digital input and delay unit 101 The input end is connected, the digital input of high position is connected with the input end of thermometer encoding circuit 102, the output end of delay unit 101 and the output end of thermometer encoding circuit 102 are connected with the input end of synchronization unit 103, the output end of synchronization unit 103 is connected with switch The input end of the driving array 104 is connected, the output end of the reference generating circuit 105 is connected with the input end of the low-order current source array 106 and the high-order current source array 107, and the output end of the low-order current source array 106 is connected with one end of the first complementary switch S1A, S1B The output end of the high-position current source array 107 is connected to one end of the second complementary switch S2A, S2B, the other end of the switch array S1A, S2A is connected to one end of the first resistor R1, the other end of the first resistor R1 is grounded, and the second end of the second The other end of the switch array S1B, S2B is connected to one end of the second resistor R2, the other end of the second resistor R2 is grounded, and the output end of the switch driving array 104 is connected to the first complementary switch S1A, S1B and the second complementary switch S2A, S2B. The control terminal is connected.
其中，高位的数字输入和低位的数字输入分别经过温度计编码电路102和延时单元101的处理之后，利用同步单元103进行同步处理，之后通过开关驱动电路产生互补的信号控制开关S1A、S1B一通一断和开关S2A、S2B一通一断，从而控制每一支电流是流过电阻R1还是电阻R2，以控制电阻R1、R2上电压，这就是由输入数字信号控制产生相应的差分电压输出的原理。基准产生电路105产生稳定的基准电压供给低位电流源阵列106和高位电流源阵列107，以产生稳定的电流。Among them, after the high-order digital input and the low-order digital input are respectively processed by the thermometer encoding circuit 102 and the delay unit 101, the synchronization unit 103 is used for synchronization processing, and then the switch drive circuit generates complementary signals to control the switches S1A and S1B. The off and switch S2A, S2B are on and off, so as to control whether each current flows through the resistor R1 or the resistor R2, so as to control the voltage on the resistor R1, R2, which is the principle of generating the corresponding differential voltage output by the input digital signal control. The reference generation circuit 105 generates a stable reference voltage for the low current source array 106 and the high current source array 107 to generate a stable current.
传统的电流舵结构的数模转换器对于电流源阵列的匹配度要求很高。工艺误差将会造成的电流源的偏差，单位电流源的方差与电流源的面积成反比,即：The digital-to-analog converter with the traditional current steering structure has high requirements on the matching degree of the current source array. The deviation of the current source will be caused by the process error, and the variance of the unit current source is inversely proportional to the area of the current source, that is:
AA CC -- SS ∝∝ 11 σσ LSBLSB 22 -- -- -- (( 11 ))
其中AC-S是单位电流源的版图面积，σLSB是它的方差。Where A CS is the layout area per unit current source, and σ LSB is its variance.
为了将σLSB控制在一定的足够小的范围内，电流源管的面积需要比较大的值。当低位的二进制编码有N位时，高位电流源的电流大小IMSB是低位单位电流源的电流大小ILSB的2N倍，即：In order to control the σ LSB within a certain sufficiently small range, the area of the current source tube needs to be relatively large. When the low-order binary code has N bits, the current size I MSB of the high-order current source is 2 N times the current size I LSB of the low-order unit current source, namely:
II MSBMSB == 22 NN ** II LSBLSB -- -- -- (( 22 ))
为了保证高位电流源的精度，传统技术的上述数模转换器结构中，就采用2N支低位单位电流源并联的方式来构成温度计编码的高位电流源，其版图面积也是低位单位电流源版图面积的2N倍。因此电流源阵列，主要是温度计编码的高位电流源阵列会有很大的版图面积，这也占了整个电流舵结构数模转换器版图面积的大部分，随着电流舵结构数模转换器位数的增加，电流源面积将随指数形式增加。电流源面积的增加会给电流源带来很大的寄生电容和寄生电阻，从而影响DAC的动态性能。In order to ensure the accuracy of the high-level current source, in the above-mentioned digital-to-analog converter structure of the traditional technology, 2 N low-level unit current sources are connected in parallel to form a high-level current source encoded by a thermometer, and its layout area is also the layout area of the low-level unit current source. 2 N times. Therefore, the current source array, mainly the high-level current source array encoded by the thermometer, will have a large layout area, which also accounts for most of the layout area of the entire current steering structure digital-to-analog converter. As the number increases, the area of the current source will increase exponentially. The increase of the area of the current source will bring a large parasitic capacitance and parasitic resistance to the current source, thereby affecting the dynamic performance of the DAC.
发明内容Contents of the invention
本发明所要解决的技术问题是：提出一种数字校正电路及含有该电路的电流舵结构的数模转换器，解决传统技术中的电流舵结构的数模转换器中的高位电流源阵列占用较大的版图面积，既增加了芯片的成本也会给电流源带来很大的寄生电容和寄生电阻，而影响数模转换器的动态性能的问题。The technical problem to be solved by the present invention is: to propose a digital correction circuit and a digital-to-analog converter with a current steering structure containing the circuit, to solve the problem that the high-position current source array in the digital-to-analog converter with a current steering structure in the traditional technology takes up relatively A large layout area not only increases the cost of the chip but also brings a large parasitic capacitance and parasitic resistance to the current source, which affects the dynamic performance of the digital-to-analog converter.
本发明解决上述技术问题采用的方案是：数字校正电路，用于对电流舵结构的数模转换器中的高位电流源进行校正，其包括校正模数转换器、第一寄存器、第二寄存器、数值比较器、逐次逼近寄存器；所述校正模数转换器的输出端连接第一寄存器和第二寄存器的输入端；所述第一寄存器的输出端连接数值比较器的正相输入端；所述第二寄存器的输出端连接数值比较器的反相输入端；所述数值比较器的输出端连接所述逐次逼近寄存器的输入端。The solution adopted by the present invention to solve the above-mentioned technical problems is: a digital correction circuit, which is used to correct the high-level current source in the digital-to-analog converter of the current steering structure, which includes a correction analog-to-digital converter, a first register, a second register, Numerical comparator, successive approximation register; The output end of the correction analog-to-digital converter is connected to the input end of the first register and the second register; The output end of the first register is connected to the non-inverting input end of the numerical comparator; The described The output end of the second register is connected to the inverting input end of the numerical comparator; the output end of the numerical comparator is connected to the input end of the successive approximation register.
具体的，所述校正模数转换器为14位校正模数转换器；所述第一寄存器、第二寄存器均为14位寄存器；所述数值比较器为14位数值比较器；所述逐次逼近寄存器为6位逐次逼近寄存器。Specifically, the correction analog-to-digital converter is a 14-bit correction analog-to-digital converter; the first register and the second register are both 14-bit registers; the numerical comparator is a 14-bit numerical comparator; the successive approximation The register is a 6-bit successive approximation register.
本发明的另一目的在于提出一种含有上述数字校正电路的电流舵结构的数模转换器，其包括温度计编码电路、延时单元、基准产生电路、高位电流源阵列、低位电流源阵列、第一互补开关、第二互补开关、第一电阻、第二电阻；还包括校正单位电流源、电流源控制开关、存储器及数字校正电路；所述基准产生电路的输出端与所述高位电流源阵列、低位电流源阵列的输入端相连；所述温度计编码电路的输入端连接高位输入信号，其输出端连接第二互补开关的控制端；所述延时单元的输入端连接低位输入信号，其输出端连接第一互补开关和电流源控制开关的控制端；所述第一互补开关中的一个开关和所述第二互补开关中的一个开关及所述电流源控制开关的一端连接第一电阻的一端，其另一端分别对应连接低位电流源阵列、高位电流源阵列和校正单位电流源的输出端；所述第一电阻的另一端接地；所述第一互补开关中的另一个开关和所述第二互补开关中的另一个开关连接第二电阻的一端，其另一端分别对应连接低位电流源阵列、高位电流源阵列的输出端；所述第二电阻的另一端接地；所述存储器的地址端口连接高位输入信号，其输出端连接所述高位电流源阵列的控制端；所述数字校正电路通过采集在电流源控制开关在开启和闭合两种状态下的第一电阻两端的电压进行比较，并通过逐次逼近来产生针对高位电流源阵列中的电流源的控制码，并将控制码输出给存储器。Another object of the present invention is to propose a digital-to-analog converter with a current steering structure containing the above-mentioned digital correction circuit, which includes a thermometer encoding circuit, a delay unit, a reference generation circuit, an array of high-order current sources, an array of low-order current sources, the first A complementary switch, a second complementary switch, a first resistor, and a second resistor; it also includes a correction unit current source, a current source control switch, a memory, and a digital correction circuit; the output terminal of the reference generation circuit is connected to the high-level current source array 1. The input ends of the low-order current source array are connected; the input end of the thermometer encoding circuit is connected with the high-order input signal, and its output end is connected with the control end of the second complementary switch; the input end of the described delay unit is connected with the low-order input signal, and its output terminal is connected to the control terminal of the first complementary switch and the current source control switch; one end of one switch in the first complementary switch and one switch in the second complementary switch and the current source control switch is connected to the first resistance One end, the other end of which is respectively connected to the output end of the low-position current source array, the high-position current source array, and the correction unit current source; the other end of the first resistor is grounded; the other switch in the first complementary switch and the Another switch in the second complementary switch is connected to one end of the second resistor, and its other end is respectively connected to the output ends of the low-order current source array and the high-order current source array; the other end of the second resistor is grounded; the address of the memory The port is connected to the high-level input signal, and its output terminal is connected to the control terminal of the high-level current source array; the digital correction circuit compares the voltages at both ends of the first resistor when the current source control switch is in the open and closed states, And generate the control codes for the current sources in the high-bit current source array by successive approximation, and output the control codes to the memory.
具体的，所述校正数字电路中的校正模数转换器的输入端连接第一电阻两端的电压信号，所述校正数字电路中的逐次逼近寄存器的输出端连接存储器的输入端。Specifically, the input end of the correction analog-to-digital converter in the correction digital circuit is connected to the voltage signal at both ends of the first resistor, and the output end of the successive approximation register in the correction digital circuit is connected to the input end of the memory.
进一步，所述高位电流源阵列包括电流大小分别为(2M-2N)*I、2N*I、2N-1*I、……2*I、I、2-1*I、2-2*I、……2-K*I共(N+K+2)支并联的电流源；且除(2M-2N)*I这支电流源外，其余各支电流源均串联一个控制开关，这里，M=8是低位分段的位数，2-K*I是14位校正模数转换器的精度的一半，N的取值与I的标准差σ（I）存在关系：Further, the high-level current source array includes current sizes of (2 M -2 N )*I, 2 N *I, 2 N-1 *I, ... 2*I, I, 2 -1 *I, 2 -2 *I, ... 2 -K *I (N+K+2) current sources connected in parallel; and except for the current source (2 M -2 N )*I, all other current sources are connected in series A control switch, here, M=8 is the number of bits in the low-order segment, 2 -K *I is half the accuracy of the 14-bit corrected analog-to-digital converter, and the value of N is related to the standard deviation σ(I) of I :
33 22 22 88 σσ (( II )) ≤≤ 22 NN -- -- -- (( 33 ))
以及，as well as,
33 22 22 NN ++ 44 σσ (( II 88 )) ≤≤ 11 88 -- -- -- (( 44 ))
且N的取值应该使σ（I）尽量小。And the value of N should make σ(I) as small as possible.
具体的，所述M=8、N=2、K=3。Specifically, said M=8, N=2, K=3.
具体的，所述高位电流源阵列为高4位电流源阵列，所述低位电流源阵列为低8位电流源阵列，所述高位输入信号为高4位输入信号，所述低位输入信号为低8位输入信号。Specifically, the high bit current source array is a high 4 bit current source array, the low bit current source array is a low 8 bit current source array, the high bit input signal is a high 4 bit input signal, and the low bit input signal is a low 8-bit input signal.
本发明的有益效果是：在大大缩小温度计编码的高位电流源的版图面积的同时，可以保证数模转换器的性能。The beneficial effect of the invention is that the performance of the digital-to-analog converter can be ensured while greatly reducing the layout area of the high-level current source coded by the thermometer.
附图说明Description of drawings
图1为传统技术中的混合架构的电流舵结构数模转换器结构示意图；FIG. 1 is a schematic structural diagram of a current-steering digital-to-analog converter of a hybrid architecture in a conventional technology;
图2为本发明实施例中的含有数字校正电路的电流舵结构的数模转换器结构示意图；FIG. 2 is a schematic structural diagram of a digital-to-analog converter with a current steering structure containing a digital correction circuit in an embodiment of the present invention;
图3为本发明中的高位电流源阵列的结构与传统技术的对比示意图。FIG. 3 is a schematic diagram showing a comparison between the structure of the high-level current source array in the present invention and the conventional technology.
具体实施方式Detailed ways
针对传统技术中的电流舵结构的数模转换器中的高位电流源阵列占用较大的版图面积，既增加了芯片的成本也会给电流源带来很大的寄生电容和寄生电阻，而影响数模转换器的动态性能的问题，本发明提出一种数字校正电路及含有该电路的电流舵结构的数模转换器，并辅之以对应的校正方法，可以在明显缩小电流舵结构数模转换器版图面积的同时，获得足够的性能。The high-level current source array in the digital-to-analog converter of the current steering structure in the traditional technology occupies a large layout area, which not only increases the cost of the chip, but also brings a large parasitic capacitance and parasitic resistance to the current source, which affects For the problem of the dynamic performance of the digital-to-analog converter, the present invention proposes a digital-to-analog converter with a digital correction circuit and a current steering structure containing the circuit, and supplemented with a corresponding correction method, which can significantly reduce the digital-to-analog converter of the current steering structure. Gain sufficient performance while reducing the converter footprint.
下面结合附图及实施例对本发明的方案作进一步的描述：Below in conjunction with accompanying drawing and embodiment the scheme of the present invention will be further described:
本例中的含有数字校正电路的数模转换器是以4+8分段（高4位温度计编码，低8位二进制编码）的12位电流舵结构数模转换器进行介绍；参见图2，其由数模转换单元和校正电路单元两大部分构成，其中数模转换单元包括温度计编码电路201，延时单元202，基准产生电路203，高4位电流源阵列204（包含24-1=15支高位电流源），低8位电流源阵列205，校正单位电流源206、6位存储器207（15个）、第一互补开关S1A、S1B,第二互补开关S2A、S2B、电流源控制开关S3、第一电阻RA、第二电阻RB；校正电路单元包括14位校正模数转换器208,14位寄存器209和210、14位数值比较器211、6位逐次逼近寄存器212。In this example, the digital-to-analog converter with digital correction circuit is introduced as a 12-bit current steering structure digital-to-analog converter with 4+8 segments (high 4-bit thermometer code, low 8-bit binary code); see Figure 2, It consists of two major parts, a digital-to-analog conversion unit and a correction circuit unit. The digital-to-analog conversion unit includes a thermometer encoding circuit 201, a delay unit 202, a reference generation circuit 203, and an upper 4-bit current source array 204 (including 2 4 -1= 15 high-level current sources), low 8-bit current source array 205, correction unit current source 206, 6-bit memory 207 (15 pieces), first complementary switch S1A, S1B, second complementary switch S2A, S2B, current source control switch S3, the first resistor RA, the second resistor RB; the correction circuit unit includes a 14-bit correction analog-to-digital converter 208 , 14-bit registers 209 and 210 , a 14-bit numerical comparator 211 , and a 6-bit successive approximation register 212 .
它们的连接关系如下：基准产生电路203的输出与高4位电流阵列204、低8位电流源阵列205、校正单位电流源206的输入端相连，温度计编码电路201的输入端接高4位输入DATA<12：9>，输出端接第二互补开关S2A、S2B控制端，延时单元202的输入端接低8位输入DATA<8：1>，输出端接第一互补开关S1A、S1B和电流源控制开关S3的控制端。第一互补开关中的开关S1A、第二互补开关中的S2A及电流源控制开关S3的一端接电阻RA的一端，另一端对应接低8位电流源阵列205、高4位电流阵列204、校正单位电流源206的电流输出端，第一电阻RA的另一端接地。第一互补开关中的S1B、第二互补开关中的S2B的一端接第二电阻RB的一端，另一端对应接低8位电流源阵列205、高4位电流阵列204的电流输出端，第二电阻RB的另一端接地。14位校正模数转换器208的输入端接第一电阻RA两端的电压，14位的数字输出信号接两个14位寄存器209、210的输入端，两个14位寄存器209、210的输出端分别接14位数值比较器211的负输入端和正输入端。14位数值比较器211的输出端接6位逐次逼近寄存器212的输入端，6位逐次逼近寄存器212的输出端接6位存储器207的数据输入端，15个6位存储器207的数据输出端对应接15支高4位电流源204的电流调节控制端，6位存储器207的地址端口接高4位输入。Their connection relationship is as follows: the output of the reference generation circuit 203 is connected to the input end of the high 4-bit current array 204, the low 8-bit current source array 205, and the correction unit current source 206, and the input terminal of the thermometer encoding circuit 201 is connected to the high 4-bit input DATA<12:9>, the output terminal is connected to the control terminals of the second complementary switches S2A and S2B, the input terminal of the delay unit 202 is connected to the lower 8-bit input DATA<8:1>, and the output terminal is connected to the first complementary switches S1A, S1B and The current source controls the control terminal of the switch S3. One end of the switch S1A in the first complementary switch, S2A in the second complementary switch, and the current source control switch S3 is connected to one end of the resistor RA, and the other end is correspondingly connected to the low 8-bit current source array 205, the high 4-bit current array 204, and the correction The current output end of the unit current source 206 and the other end of the first resistor RA are grounded. One end of S1B in the first complementary switch and S2B in the second complementary switch is connected to one end of the second resistor RB, and the other end is correspondingly connected to the current output ends of the low 8-bit current source array 205 and the high 4-bit current array 204, and the second The other end of the resistor RB is grounded. The input terminal of the 14-bit correction analog-to-digital converter 208 is connected to the voltage at both ends of the first resistor RA, the 14-bit digital output signal is connected to the input terminals of two 14-bit registers 209 and 210, and the output terminals of the two 14-bit registers 209 and 210 connected to the negative input terminal and the positive input terminal of the 14-bit numerical comparator 211 respectively. The output terminal of the 14-bit numerical comparator 211 is connected to the input terminal of the 6-bit successive approximation register 212, the output terminal of the 6-bit successive approximation register 212 is connected to the data input terminal of the 6-bit memory 207, and the data output terminals of the 15 6-bit memory 207 correspond to It is connected to the current regulation control terminals of 15 high 4-bit current sources 204, and the address port of the 6-bit memory 207 is connected to the high 4-bit input.
其中温度计编码电路201，延时单元202，基准产生电路203，高4位电流源阵列204，低8位电流源阵列205，电阻RA、RB,互补开关S1A、S1B、S2A、S2B就构成了传统的电流舵结构数模转换器。可见，本发明的电流舵结构数模转换器结构增加了校正单位电流源206和6位存储器<15:1>207。而14位校正模数转换器208，14位寄存器209和210，14位数值比较器211和6位逐次逼近寄存器212五个模块构成校正电路，它用于校正本发明的电流舵结构数模转换器。Among them, the thermometer encoding circuit 201, the delay unit 202, the reference generating circuit 203, the high 4-bit current source array 204, the low 8-bit current source array 205, the resistors RA, RB, and the complementary switches S1A, S1B, S2A, and S2B constitute the traditional The current steering structure digital-to-analog converter. It can be seen that the correction unit current source 206 and the 6-bit memory <15:1> 207 are added to the current steering digital-to-analog converter structure of the present invention. And 14-bit correction analog-to-digital converter 208, 14-bit registers 209 and 210, 14-bit numerical comparator 211 and 6 successive approximation registers 212 five modules form a correction circuit, which is used to correct the current steering structure digital-to-analog conversion of the present invention device.
在本发明中，低位电流源和传统结构的9位二进制编码数模转换器的设计要求完全相同，相对于传统结构的12位数模转换器的低位电流源可以缩小212-9=8倍，校正单位电流源是为了校正高位电流源专门增加的一支与低位单位电流源完全相同的电流源。传统的4+8位电流舵结构数模转换器结构中，为了高位电流源的精确，高位电流源由256个低位单位电流源并联而成，如图3左部分所示，图中I表示一支低位单位电流源，那么，15支高位电流源的版图总面积将是低位单位电流源的3840倍。本发明的实施例中，将高位电流源修改成附图3右部分的结构，I1表示设计电流大小与I相等，但允许存在更大工艺偏差的电流源；该结构包含了7个并联电流源支路，其中除了252I1的支路外，其余每个支路中均由一支电流源与开关串联形成，那么就可以通过六位数字码控制八个开关的通断（高为导通，低为关断），可以调节高位电流源的大小，调节范围是252I1～260I1,调节步长是0.125I1。因此只要保证252I1<=256I<=260I1，就可以通过调节6位控制码，将高位电流源的大小校正到256I～256.125I之间。根据前面公式（3）和公式（4），只需要保证
本发明的工作原理是通过大面积、低偏差的低位电流源来校正小面积、大偏差的高位电流源，校正原理如下：当第1～j（j=1,2…15）支高位电流源校正完成后，数模转换器对应于输入是j 1111 1111（这里的j表示对应的4位二进制码，j=1,2…15）的输出是准确的。这个输出加上一个准确的单位电流源就是数模转换器对应于输入是（j+1） 0000 0000的输出的准确值，我们就用这个值作为参考值来校正数模转换器对应于输入是（j+1） 0000 0000的输出的实际值，通过调整6位控制码使实际值等于参考值。The working principle of the present invention is to correct a small-area, large-deviation high-level current source through a large-area, low-deviation low-level current source. The correction principle is as follows: After the correction is completed, the output of the digital-to-analog converter corresponding to the input is j 1111 1111 (here j represents the corresponding 4-bit binary code, j=1,2...15) is accurate. This output plus an accurate unit current source is the exact value of the output of the digital-to-analog converter corresponding to the input is (j+1) 0000 0000, we use this value as a reference value to correct the digital-to-analog converter corresponding to the input is (j+1) The actual value of the output of 0000 0000, the actual value is equal to the reference value by adjusting the 6-bit control code.
在本发明中的数模转换器电路开始正常工作后，15个6位存储器207的初始值是100 000，控制高位电流源大小为256I1。利用校正电路依次校正15支高位电流源。校正第1支高位电流源时，第一步，数模转换器的输入置0000 1111 1111，校正单位电流源开关S3闭合，控制流过电阻RA的电流源是八支二进制编码的低位电流源27*I、26*I……2*I、I以及校正单位电流源I,因此电阻RA两端的电压就是：After the digital-to-analog converter circuit in the present invention starts to work normally, the initial value of the 15 6-bit memories 207 is 100 000, and the size of the control high-bit current source is 256I 1 . Use the correction circuit to correct 15 high-level current sources in turn. When correcting the first high-order current source, in the first step, the input of the digital-to-analog converter is set to 0000 1111 1111, the correction unit current source switch S3 is closed, and the current source that controls the flow through the resistor RA is eight binary-coded low-order current sources 2 7 *I, 2 6 *I...2*I, I and the correction unit current source I, so the voltage across the resistor RA is:
VRA=(27+26+…+2+1+1)I*RA=256*I*RAV RA =(2 7 +2 6 +…+2+1+1)I*RA=256*I*RA
14位校正模数转换器VRA转换为14位数字码，并存储到14位寄存器209,作为校正第1支高位电流源的参考值；第二步，数模转换器的输入置0001 0000 0000，校正用单位电流源开关S3断开，14位校正模数转换器将电阻RA两端的电压转换为14位数字码，并存储到14位寄存器210；第三步，14位数值比较器211比较2个存储器当中数据的大小关系，比较结果传给6位逐次逼近寄存器，6位逐次逼近寄存器调整第1支高位电流源的6位控制码，通过逐次逼近使两个14位寄存器209和210中的数值相等，并将此时第1支高位电流源的6位控制码存储在第1个6位存储器中。The 14-bit correction analog-to-digital converter V RA is converted into a 14-bit digital code and stored in the 14-bit register 209 as a reference value for correcting the first high-level current source; in the second step, the input of the digital-to-analog converter is set to 0001 0000 0000 , the correction unit current source switch S3 is disconnected, and the 14-bit correction analog-to-digital converter converts the voltage across the resistor RA into a 14-bit digital code and stores it in the 14-bit register 210; in the third step, the 14-bit numerical comparator 211 compares The size relationship of the data in the two memories, the comparison result is passed to the 6-bit successive approximation register, and the 6-bit successive approximation register adjusts the 6-bit control code of the first high-order current source, and the two 14-bit registers 209 and 210 are controlled by successive approximation. The values are equal, and the 6-bit control code of the first high-order current source is stored in the first 6-bit memory at this time.
类似的，校正完第1支高位电流源之后，将数模转换器的输入置0001 1111 1111，将数模转换器输出对应的14位码存储到14位寄存器210，再置0010 0000 0000，就可以校正第2支高位电流源，并将第2支高位电流源的6位控制码存储在第2个6位存储器中。依次类推，把15支高位电流源全部校准。Similarly, after the first high-level current source is calibrated, set the input of the digital-to-analog converter to 0001 1111 1111, store the 14-bit code corresponding to the output of the digital-to-analog converter into the 14-bit register 210, and then set it to 0010 0000 0000, then The second high-order current source can be corrected, and the 6-bit control code of the second high-order current source is stored in the second 6-bit memory. By analogy, all 15 high-level current sources are calibrated.
当15支高位电流源全部校准以后，其校正结果保留在15个6位存储器中，校正电路停止工作。When all 15 high-order current sources are calibrated, the calibration results are kept in 15 6-bit memories, and the calibration circuit stops working.
通常混合架构的电流舵结构数模转换器，其静态性能最差的点往往出现在(j-1) 1111 1111转变到j 0000 0000的过程中。这种校正方法将(j-1) 1111 1111（j表示4位二进制码）加上一个单位电流源的输出大小作为校正j 0000 0000的参考，校正后的数模转换器在这个点的微分非线性误差可以得到很好的控制。Usually, the worst point of static performance of the current-steer structure digital-analog converter of the mixed architecture often occurs during the transition from (j-1) 1111 1111 to j 0000 0000. This correction method uses (j-1) 1111 1111 (j represents 4-bit binary code) plus the output of a unit current source as a reference for correcting j 0000 0000. Linearity error can be well controlled.
需要说明的是，本发明要求保护的方案包含但不仅限于上述实施例，本领域的技术人员在不脱离本发明精神实质情况下根据上述实施例的描述所作出的等同修改/替换，皆在本发明的保护范围之内。It should be noted that the solutions claimed in the present invention include but are not limited to the above-mentioned embodiments. Equivalent modifications/replacements made by those skilled in the art based on the descriptions of the above-mentioned embodiments without departing from the spirit of the present invention are all included in this within the scope of protection of the invention.
Claims (7)
1.数字校正电路，用于对电流舵结构的数模转换器中的高位电流源进行校正，其特征在于，包括校正模数转换器、第一寄存器、第二寄存器、数值比较器、逐次逼近寄存器；所述校正模数转换器的输出端连接第一寄存器和第二寄存器的输入端；所述第一寄存器的输出端连接数值比较器的正相输入端；所述第二寄存器的输出端连接数值比较器的反相输入端；所述数值比较器的输出端连接所述逐次逼近寄存器的输入端。1. The digital correction circuit is used to correct the high-level current source in the digital-to-analog converter of the current steering structure, and is characterized in that it includes a correction analog-to-digital converter, a first register, a second register, a numerical comparator, and a successive approximation Register; the output end of the correction analog-to-digital converter is connected to the input end of the first register and the second register; the output end of the first register is connected to the non-inverting input end of the numerical comparator; the output end of the second register The inverting input terminal of the numerical comparator is connected; the output terminal of the numerical comparator is connected with the input terminal of the successive approximation register. 2.如权利要求1所述的数字校正电路，其特征在于，所述校正模数转换器为14位校正模数转换器；所述第一寄存器、第二寄存器均为14位寄存器；所述数值比较器为14位数值比较器；所述逐次逼近寄存器为6位逐次逼近寄存器。2. digital correction circuit as claimed in claim 1, is characterized in that, described correction analog-digital converter is 14 correction analog-digital converters; Described first register, the second register are 14 registers; The numerical comparator is a 14-bit numerical comparator; the successive approximation register is a 6-bit successive approximation register. 3.含有数字校正电路的电流舵结构的数模转换器，包括温度计编码电路、延时单元、基准产生电路、高位电流源阵列、低位电流源阵列、第一互补开关、第二互补开关、第一电阻、第二电阻；其特征在于，3. A digital-to-analog converter with a current steering structure containing a digital correction circuit, including a thermometer encoding circuit, a delay unit, a reference generation circuit, an array of high-order current sources, an array of low-order current sources, the first complementary switch, the second complementary switch, the second One resistance, the second resistance; It is characterized in that, 还包括校正单位电流源、电流源控制开关、存储器及数字校正电路；所述基准产生电路的输出端与所述高位电流源阵列、低位电流源阵列的输入端相连；所述温度计编码电路的输入端连接高位输入信号，其输出端连接第二互补开关的控制端；所述延时单元的输入端连接低位输入信号，其输出端连接第一互补开关和电流源控制开关的控制端；所述第一互补开关中的一个开关和所述第二互补开关中的一个开关及所述电流源控制开关的一端连接第一电阻的一端，其另一端分别对应连接低位电流源阵列、高位电流源阵列和校正单位电流源的输出端；所述第一电阻的另一端接地；所述第一互补开关中的另一个开关和所述第二互补开关中的另一个开关连接第二电阻的一端，其另一端分别对应连接低位电流源阵列、高位电流源阵列的输出端；所述第二电阻的另一端接地；所述存储器的地址端口连接高位输入信号，其输出端连接所述高位电流源阵列的控制端；所述数字校正电路通过采集在电流源控制开关在开启和闭合两种状态下的第一电阻两端的电压进行比较，并通过逐次逼近来产生针对高位电流源阵列中的电流源的控制码，并将控制码输出给存储器。It also includes a correction unit current source, a current source control switch, a memory, and a digital correction circuit; the output end of the reference generation circuit is connected to the input end of the high-order current source array and the low-order current source array; the input of the thermometer encoding circuit The terminal is connected to the high-level input signal, and its output terminal is connected to the control terminal of the second complementary switch; the input terminal of the delay unit is connected to the low-level input signal, and its output terminal is connected to the control terminal of the first complementary switch and the current source control switch; One end of one switch in the first complementary switch, one switch in the second complementary switch, and the current source control switch is connected to one end of the first resistor, and the other end is respectively connected to the low-position current source array and the high-position current source array. and the output end of the correction unit current source; the other end of the first resistor is grounded; the other switch in the first complementary switch and the other switch in the second complementary switch are connected to one end of the second resistor, which The other ends are respectively connected to the output terminals of the low-order current source array and the high-order current source array; the other end of the second resistor is grounded; the address port of the memory is connected to the high-order input signal, and its output terminal is connected to the high-order current source array. Control terminal; the digital correction circuit compares the voltages at both ends of the first resistor by collecting the current source control switch in both open and closed states, and generates control for the current source in the high-position current source array by successive approximation code, and output the control code to the memory. 4.如权利要求3所述的含有数字校正电路的电流舵结构的数模转换器，其特征在于，所述校正数字电路中的校正模数转换器的输入端连接第一电阻两端的电压信号，所述校正数字电路中的逐次逼近寄存器的输出端连接存储器的输入端。4. the digital-to-analog converter of the current steering structure that contains digital correction circuit as claimed in claim 3 is characterized in that, the input end of the correction analog-to-digital converter in the described correction digital circuit is connected to the voltage signal at both ends of the first resistor , the output terminal of the successive approximation register in the correction digital circuit is connected to the input terminal of the memory. 5.如权利要求3所述的含有数字校正电路的电流舵结构的数模转换器，其特征在于，所述高位电流源阵列包括电流大小分别为(2M-2N)*I、2N*I、2N-1*I、……2*I、I、2-1*I、2-2*I、……2-K*I共(N+K+2)支并联的电流源；且除(2M-2N)*I这支电流源外，其余各支电流源均串联一个控制开关。5. the digital-to-analog converter containing the current steering structure of digital correction circuit as claimed in claim 3, is characterized in that, described high position current source array comprises electric current size and is respectively (2 M -2 N )*I, 2 N *I, 2 N-1 *I, ... 2*I, I, 2 -1 *I, 2 -2 *I, ... 2 -K *I (N+K+2) parallel current sources ; and except for the current source (2 M −2 N )*I, all other current sources are connected in series with a control switch. 6.如权利要求5所述的含有数字校正电路的电流舵结构的数模转换器，其特征在于，所述M=8、N=2、K=3。6. The digital-to-analog converter with a current steering structure containing a digital correction circuit according to claim 5, wherein said M=8, N=2, K=3. 7.如权利要求3-6任意一项所述的含有数字校正电路的电流舵结构的数模转换器，其特征在于，所述高位电流源阵列为高4位电流源阵列，所述低位电流源阵列为低8位电流源阵列，所述高位输入信号为高4位输入信号，所述低位输入信号为低8位输入信号。7. The digital-to-analog converter containing the current steering structure of the digital correction circuit according to any one of claims 3-6, wherein the high-order current source array is a high 4-bit current source array, and the low-order current The source array is a low 8-bit current source array, the high-bit input signal is a high 4-bit input signal, and the low-bit input signal is a low 8-bit input signal.
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