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CN107170408A - Pixel circuit, driving method, organic electroluminescent display panel and display device - Google Patents

️Fri Sep 15 2017

Pixel circuit, driving method, organic electroluminescent display panel and display device Download PDF

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Publication number

CN107170408A

CN107170408A CN201710498982.5A CN201710498982A CN107170408A CN 107170408 A CN107170408 A CN 107170408A CN 201710498982 A CN201710498982 A CN 201710498982A CN 107170408 A CN107170408 A CN 107170408A Authority

China

Prior art keywords

light

switching transistor

electrically connected

transistor

light emitting

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2017-06-27

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CN201710498982.5A

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Chinese (zh)

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CN107170408B (en

Inventor

冷传利

李元

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Shanghai Tianma Microelectronics Co Ltd

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Shanghai Tianma Microelectronics Co Ltd

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2017-06-27

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2017-06-27

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2017-09-15

2017-06-27 Application filed by Shanghai Tianma Microelectronics Co Ltd filed Critical Shanghai Tianma Microelectronics Co Ltd

2017-06-27 Priority to CN201710498982.5A priority Critical patent/CN107170408B/en

2017-09-15 Publication of CN107170408A publication Critical patent/CN107170408A/en

2019-05-24 Application granted granted Critical

2019-05-24 Publication of CN107170408B publication Critical patent/CN107170408B/en

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2037-06-27 Anticipated expiration legal-status Critical

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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

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Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Computer Hardware Design (AREA)
General Physics & Mathematics (AREA)
Theoretical Computer Science (AREA)
Electroluminescent Light Sources (AREA)
Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本发明公开了一种像素电路、其驱动方法、有机电致发光显示面板及显示装置，通过多个像素共用相同的共用补偿模块和共用驱动模块的方式，从而可以降低每个像素的平均晶体管数目，以利于实现高分辨率显示，进而有利于实现虚拟现实显示要求的高PPI。具体地，像素电路包括共用补偿模块，共用驱动模块以及至少两个发光模块；其中，共用补偿模块用于驱动共用驱动模块，共用驱动模块包括驱动晶体管；各发光模块中的有机发光二极管通过第一开关晶体管连接到驱动晶体管的漏极，以分时接收经过阈值电压补偿后的驱动电流进行发光；各发光模块中的有机发光二极管通过第二开关晶体管连接到第一参考信号端，以在本发光模块不发光时进行复位。

The invention discloses a pixel circuit, a driving method thereof, an organic electroluminescence display panel and a display device, and the average number of transistors of each pixel can be reduced by sharing the same common compensation module and common driving module for a plurality of pixels , so as to facilitate the realization of high-resolution display, which in turn facilitates the realization of the high PPI required by the virtual reality display. Specifically, the pixel circuit includes a common compensation module, a common driving module, and at least two light emitting modules; wherein, the common compensation module is used to drive the common driving module, and the common driving module includes a driving transistor; the organic light emitting diodes in each light emitting module pass through the first The switching transistor is connected to the drain of the driving transistor to receive the driving current after threshold voltage compensation in time-sharing to emit light; the organic light-emitting diode in each light-emitting module is connected to the first reference signal terminal through the second switching transistor to emit light at this time. Reset when the module does not emit light.

Description

像素电路、驱动方法、有机电致发光显示面板及显示装置Pixel circuit, driving method, organic electroluminescent display panel, and display device

技术领域technical field

本发明涉及计算机技术领域，尤指一种像素电路、其驱动方法、有机电致发光显示面板及显示装置。The invention relates to the technical field of computers, in particular to a pixel circuit, a driving method thereof, an organic electroluminescent display panel and a display device.

背景技术Background technique

有机发光二极管(Organic Light Emitting Diode，OLED)是当今显示面板研究领域的热点之一，与液晶显示面板(Liquid Crystal Display，LCD)相比，OLED显示面板具有低能耗、生产成本低、自发光、宽视角及响应速度快等优点。目前，在手机显示领域，OLED显示面板已经开始取代传统的LCD显示面板。Organic Light Emitting Diode (OLED) is one of the hotspots in the field of display panel research today. Compared with Liquid Crystal Display (LCD), OLED display panel has low energy consumption, low production cost, self-luminescence, Wide viewing angle and fast response speed etc. advantages. Currently, in the display field of mobile phones, OLED display panels have begun to replace traditional LCD display panels.

与LCD利用稳定的电压控制亮度不同，OLED属于电流驱动，需要稳定的电流来控制其发光。一般通过OLED显示器中像素驱动电路的驱动晶体管来驱动OLED发光。其中，驱动晶体管工作时，由于驱动晶体管内部存在缺陷态以及驱动晶体管大部分时间处于工作状态，因此在驱动晶体管的源极长时间处于同一偏压下时，其阈值电压漂移以及迁移率变化会逐渐加重，导致驱动晶体管的特性漂移，从而导致显示异常，进而影响显示器的稳定性。Unlike LCDs that use a stable voltage to control brightness, OLEDs are driven by current and require a stable current to control their light emission. Generally, the OLED is driven to emit light through the driving transistor of the pixel driving circuit in the OLED display. Among them, when the driving transistor is working, because there are defect states inside the driving transistor and the driving transistor is in the working state most of the time, when the source of the driving transistor is under the same bias voltage for a long time, its threshold voltage drift and mobility change will gradually The aggravation will lead to the characteristic drift of the driving transistor, which will lead to abnormal display, and then affect the stability of the display.

因此，在OLED显示面板中一般采用具有对驱动晶体管的阈值电压V_th进行补偿的像素电路来驱动OLED发光。为实现阈值电压补偿功能，如图1所示，图1为现有技术中的像素电路的具体结构示意图，像素电路多采用7T1C的结构(即包括7个开关晶体管和1个电容)，其电路结构较为复杂，晶体管数目较多。在如今显示分辨率(PPI)提高到600以上的情况下，复杂的像素电路已经开始挑战阵列(Array)工艺的极限。尤其对于虚拟现实(VR)显示等要求高PPI的产品，目前的像素电路会过于复杂，将不再适用。Therefore, in an OLED display panel, generally, a pixel circuit with compensation for the threshold voltage V _th of the driving transistor is used to drive the OLED to emit light. In order to realize the threshold voltage compensation function, as shown in FIG. 1, FIG. 1 is a schematic structural diagram of a pixel circuit in the prior art. The pixel circuit mostly adopts a 7T1C structure (that is, includes 7 switching transistors and 1 capacitor), and its circuit The structure is more complex and the number of transistors is larger. Now that the display resolution (PPI) has increased to more than 600, complex pixel circuits have begun to challenge the limit of the array (Array) process. Especially for products requiring high PPI such as virtual reality (VR) display, the current pixel circuit will be too complicated and will no longer be applicable.

发明内容Contents of the invention

本发明实施例提供的一种像素电路、其驱动方法、有机电致发光显示面板及显示装置，用以解决现有技术中存在的像素电路晶体管数目较多的问题。Embodiments of the present invention provide a pixel circuit, a driving method thereof, an organic electroluminescence display panel, and a display device to solve the problem of a large number of pixel circuit transistors in the prior art.

本发明实施例提供了一种像素电路，包括：共用补偿模块，共用驱动模块，以及至少两个发光模块；其中，An embodiment of the present invention provides a pixel circuit, including: a shared compensation module, a shared drive module, and at least two light emitting modules; wherein,

所述共用补偿模块分别与第一参考信号端、第一扫描信号端、第二扫描信号端、第一发光控制端和数据信号端电连接，用于驱动所述共用驱动模块；The common compensation module is electrically connected to the first reference signal terminal, the first scanning signal terminal, the second scanning signal terminal, the first light emission control terminal and the data signal terminal respectively, and is used to drive the common driving module;

所述共用驱动模块包括：驱动晶体管；所述驱动晶体管的源极与第一电压信号端电连接、栅极与所述共用补偿模块电连接，漏极与第一节点电连接；The common driving module includes: a driving transistor; the source of the driving transistor is electrically connected to the first voltage signal terminal, the gate is electrically connected to the common compensation module, and the drain is electrically connected to the first node;

各所述发光模块包括：第一开关晶体管、第二开关晶体管和有机发光二极管；所述第一开关晶体管的漏极和所述第二开关晶体管的漏极分别与所述有机发光二极管的一端电连接；所述有机发光二极管的另一端与第二电压信号端电连接；所述第一开关晶体管的源极与所述第一节点电连接；所述第二开关晶体管的源极与所述第一参考信号端电连接；所述第一开关晶体管的栅极与第二发光控制端电连接；所述第二开关晶体管的栅极与第三发光控制端电连接；Each of the light emitting modules includes: a first switch transistor, a second switch transistor and an organic light emitting diode; the drain of the first switch transistor and the drain of the second switch transistor are connected to one end of the organic light emitting diode respectively. connected; the other end of the organic light emitting diode is electrically connected to the second voltage signal end; the source of the first switching transistor is electrically connected to the first node; the source of the second switching transistor is electrically connected to the first node A reference signal terminal is electrically connected; the gate of the first switch transistor is electrically connected to the second light emission control terminal; the gate of the second switch transistor is electrically connected to the third light emission control terminal;

各所述发光模块中的所述第二发光控制端为不同的控制端。The second light-emitting control terminals in each of the light-emitting modules are different control terminals.

另一方面，本发明实施例还提供了一种上述像素电路的驱动方法，包括：On the other hand, an embodiment of the present invention also provides a driving method for the above-mentioned pixel circuit, including:

将每一帧显示时间分为与所述像素电路中的发光模块一一对应的子帧显示时间；Dividing each frame display time into sub-frame display time corresponding one-to-one to the light-emitting modules in the pixel circuit;

在每子帧显示时间内，在初始化和数据写入阶段，控制共用补偿模块驱动驱动晶体管，在发光阶段，控制与当前子帧显示时间对应的所述发光模块发光，控制其他所述发光模块不发光。In the display time of each subframe, in the initialization and data writing stages, control the shared compensation module to drive the drive transistor, in the light emitting stage, control the light emitting module corresponding to the current subframe display time to emit light, and control the other light emitting modules to not glow.

另一方面，本发明实施例还提供了一种有机电致发光显示面板，包括：多个本发明实施例提供的上述像素电路。On the other hand, an embodiment of the present invention further provides an organic electroluminescent display panel, including: a plurality of the above-mentioned pixel circuits provided by the embodiments of the present invention.

另一方面，本发明实施例还提供了一种显示装置，包括本发明实施例提供的上述有机电致发光显示面板。On the other hand, an embodiment of the present invention further provides a display device, including the above-mentioned organic electroluminescence display panel provided by the embodiment of the present invention.

本发明有益效果如下：The beneficial effects of the present invention are as follows:

本发明实施例提供的一种像素电路、其驱动方法、有机电致发光显示面板及显示装置，通过多个像素共用相同的共用补偿模块和共用驱动模块的方式，从而可以降低每个像素的平均晶体管数目，以利于实现高分辨率显示，进而有利于实现虚拟现实显示要求的高PPI。具体地，像素电路包括共用补偿模块，共用驱动模块以及至少两个发光模块；其中，共用补偿模块用于驱动共用驱动模块，共用驱动模块包括驱动晶体管；各发光模块中的有机发光二极管通过第一开关晶体管连接到驱动晶体管的漏极，以分时接收经过阈值电压补偿后的驱动电流进行发光；各发光模块中的有机发光二极管通过第二开关晶体管连接到第一参考信号端，以在本发光模块不发光时进行复位。A pixel circuit, a driving method thereof, an organic electroluminescent display panel, and a display device provided in the embodiments of the present invention can reduce the average The number of transistors is conducive to the realization of high-resolution display, which in turn is conducive to the realization of the high PPI required by virtual reality display. Specifically, the pixel circuit includes a common compensation module, a common driving module, and at least two light emitting modules; wherein, the common compensation module is used to drive the common driving module, and the common driving module includes a driving transistor; the organic light emitting diodes in each light emitting module pass through the first The switching transistor is connected to the drain of the driving transistor to receive the driving current after threshold voltage compensation in time-sharing to emit light; the organic light-emitting diode in each light-emitting module is connected to the first reference signal terminal through the second switching transistor to emit light at this time. Reset when the module is not lit.

附图说明Description of drawings

图1为现有技术中的像素电路的具体结构示意图；FIG. 1 is a schematic structural diagram of a pixel circuit in the prior art;

图2为本发明实施例提供的一种像素电路的结构示意图；FIG. 2 is a schematic structural diagram of a pixel circuit provided by an embodiment of the present invention;

图3为本发明实施例提供的另一种像素电路的结构示意图；FIG. 3 is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

图4为本发明实施例提供的又一种像素电路的结构示意图；FIG. 4 is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

图5a为本发明实施例提供的又一种像素电路结构示意图；Fig. 5a is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

图5b为本发明实施例提供的又一种像素电路结构示意图；Fig. 5b is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention;

图6a为图5a所示的结构对应的时序图；Fig. 6a is a timing diagram corresponding to the structure shown in Fig. 5a;

图6b为图5b所示的结构对应的时序图；FIG. 6b is a timing diagram corresponding to the structure shown in FIG. 5b;

图7为本发明实施例提供的一种显示装置的结构示意图。FIG. 7 is a schematic structural diagram of a display device provided by an embodiment of the present invention.

具体实施方式detailed description

为了使本发明的目的，技术方案和优点更加清楚，下面结合附图，对本发明实施例提供的像素电路、其驱动方法、有机电致发光显示面板及显示装置的具体实施方式进行详细地说明。应当理解，下面所描述的优选实施例仅用于说明和解释本发明，并不用于限定本发明。并且在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互组合。In order to make the purpose, technical solution and advantages of the present invention clearer, the specific implementations of the pixel circuit, its driving method, organic electroluminescent display panel and display device provided by the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the preferred embodiments described below are only used to illustrate and explain the present invention, not to limit the present invention. And in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

具体地，本发明实施例提供了一种像素电路，如图2所示，图2为本发明实施例提供的一种像素电路的结构示意图，具体包括：共用补偿模块1，共用驱动模块2，以及至少两个发光模块3；其中，Specifically, an embodiment of the present invention provides a pixel circuit, as shown in FIG. 2 , which is a schematic structural diagram of a pixel circuit provided by an embodiment of the present invention, specifically including: a shared compensation module 1, a shared drive module 2, And at least two light emitting modules 3; wherein,

共用补偿模块1分别与第一参考信号端Vref1、第一扫描信号端Scan1、第二扫描信号端Scan2、第一发光控制端E1和数据信号端Data电连接，用于驱动共用驱动模块2；The common compensation module 1 is electrically connected to the first reference signal terminal Vref1, the first scanning signal terminal Scan1, the second scanning signal terminal Scan2, the first light emission control terminal E1 and the data signal terminal Data, respectively, for driving the common driving module 2;

共用驱动模块2包括：驱动晶体管DTFT；驱动晶体管DTFT的源极与第一电压信号端PVDD电连接、栅极与共用补偿模块1电连接，漏极与第一节点N1电连接；The common driving module 2 includes: a driving transistor DTFT; the source of the driving transistor DTFT is electrically connected to the first voltage signal terminal PVDD, the gate is electrically connected to the common compensation module 1, and the drain is electrically connected to the first node N1;

各发光模块3包括：第一开关晶体管T1、第二开关晶体管T2和有机发光二极管OLED；第一开关晶体管T1的漏极和第二开关晶体管T2的漏极分别与有机发光二极管OLED的一端电连接；有机发光二极管OLED的另一端与第二电压信号端PVEE电连接；第一开关晶体管T1的源极与第一节点N1电连接；第二开关晶体管T2的源极与第一参考信号端Vref1电连接；第一开关晶体管T1的栅极与第二发光控制端E21和E22电连接；第二开关晶体管T2的栅极与第三发光控制端E3电连接；Each light emitting module 3 includes: a first switching transistor T1, a second switching transistor T2 and an organic light emitting diode OLED; the drain of the first switching transistor T1 and the drain of the second switching transistor T2 are respectively electrically connected to one end of the organic light emitting diode OLED The other end of the organic light emitting diode OLED is electrically connected to the second voltage signal terminal PVEE; the source of the first switching transistor T1 is electrically connected to the first node N1; the source of the second switching transistor T2 is electrically connected to the first reference signal terminal Vref1 connection; the gate of the first switching transistor T1 is electrically connected to the second light emitting control terminals E21 and E22; the gate of the second switching transistor T2 is electrically connected to the third light emitting control terminal E3;

各发光模块3中的第二发光控制端E21和E22为不同的控制端。The second light emitting control terminals E21 and E22 in each light emitting module 3 are different control terminals.

具体地，在本发明实施例提供的上述像素电路中，每个发光模块3对应一个像素，通过多个发光模块3共用相同的共用补偿模块1和共用驱动模块2的方式，可以降低每个像素的平均晶体管数目，以利于实现高分辨率显示，进而有利于实现虚拟现实显示要求的高PPI。Specifically, in the above-mentioned pixel circuit provided by the embodiment of the present invention, each light-emitting module 3 corresponds to one pixel, and by sharing the same common compensation module 1 and common drive module 2 with multiple light-emitting modules 3, it is possible to reduce the cost of each pixel. The average number of transistors, in order to facilitate the realization of high-resolution display, which in turn is conducive to the realization of the high PPI required by virtual reality display.

并且，在本发明实施例提供的上述像素电路中，由于与各发光模块3共用相同的共用补偿模块1和共用驱动模块2，因此，需要对各发光模块3分时驱动。具体地，可以通过各发光模块3中的有机发光二极管OLED与驱动晶体管DTFT之间连接的第一开关晶体管T1的导通和截止状态的切换时间，来切换各发光模块3的发光状态。并通过连接于有机发光二极管OLED与第一参考信号端Vref1之间连接的第二开关晶体管T2，对有机发光二极管OLED进行复位。Moreover, in the pixel circuit provided by the embodiment of the present invention, since the common compensation module 1 and the common driving module 2 are shared with each light emitting module 3 , it is necessary to time-division drive each light emitting module 3 . Specifically, the light emitting state of each light emitting module 3 can be switched by the switching time of the on and off states of the first switching transistor T1 connected between the organic light emitting diode OLED and the driving transistor DTFT in each light emitting module 3 . And the organic light emitting diode OLED is reset through the second switching transistor T2 connected between the organic light emitting diode OLED and the first reference signal terminal Vref1.

基于此，在本发明实施例提供的上述像素电路中，需要各发光模块3中控制第一开关晶体管T1的导通和截止状态的第二发光控制端E21和E22为不同的控制端。即通入不同的发光控制信号，以保证在一个发光模块3的第一开关晶体管T1处于导通状态时，其他发光模块3中的第一开关晶体管T1均处于截止状态。Based on this, in the pixel circuit provided by the embodiment of the present invention, the second light emission control terminals E21 and E22 for controlling the on and off states of the first switch transistor T1 in each light emitting module 3 are required to be different control terminals. That is, different light-emitting control signals are applied to ensure that when the first switch transistor T1 of one light-emitting module 3 is in the on state, the first switch transistors T1 in other light-emitting modules 3 are all in the off state.

这样，在本发明实施例提供的上述像素电路中的各发光模块3分时驱动发光时，使得各发光模块3的发光时间占原有一帧发光时间的N分之一，N为共用相同的共用补偿模块1和共用驱动模块2的发光模块3的个数。而在VR显示中，每帧中仅10％的时间为发光时间。因此，在本发明实施例提供的上述像素电路中，通过共用相同的共用补偿模块1和共用驱动模块2的方式以减少晶体管数目而实现高PPI显示，带来的缩短每个像素的发光时间的工作模式变化，不会对VR显示造成影响。当然，本发明实施例不限于VR显示，只要通过多个发光模块3共用相同的共用补偿模块1和共用驱动模块2的方式，均在本发明的保护范围内。In this way, when each light-emitting module 3 in the above-mentioned pixel circuit provided by the embodiment of the present invention is time-divisionally driven to emit light, the light-emitting time of each light-emitting module 3 accounts for one-Nth of the original light-emitting time of one frame, and N means sharing the same common Compensation module 1 and the number of light emitting modules 3 sharing the drive module 2 . In a VR display, only 10% of each frame is illuminated. Therefore, in the above-mentioned pixel circuit provided by the embodiment of the present invention, by sharing the same common compensation module 1 and common driving module 2, the number of transistors is reduced to achieve high PPI display, which brings the advantage of shortening the lighting time of each pixel. The change of working mode will not affect the VR display. Of course, the embodiment of the present invention is not limited to VR display, as long as multiple light emitting modules 3 share the same common compensation module 1 and common driving module 2, it is within the protection scope of the present invention.

并且，由于在本发明实施例提供的上述像素电路中的各发光模块3的发光时间为传统的像素电路的发光时间的N分之一，为了保证画面亮度不变，需要每个发光模块3的亮度提高N倍。Moreover, since the light-emitting time of each light-emitting module 3 in the above-mentioned pixel circuit provided by the embodiment of the present invention is one-Nth of the light-emitting time of the traditional pixel circuit, in order to ensure that the brightness of the picture remains unchanged, each light-emitting module 3 needs The brightness is increased by N times.

值得注意的是，在本发明实施例提供的上述像素电路中，并不限定共用相同的共用补偿模块1和共用驱动模块2的各发光模块3的数量，即一个像素电路中可以具有如图2和图3所示的两个发光模块3，也可以具有如图4所示的四个发光模块3，在此不做限定。虽然，一个像素电路中具有的发光模块3数量越多，各像素的平均晶体管数目越少，越有利于实现高PPI显示，但是，每个像素的发光时间越短，每个像素的亮度提高倍数也就越高。因此，需根据实际需要合理设置像素电路中发光模块3的数量。It is worth noting that, in the above-mentioned pixel circuit provided by the embodiment of the present invention, the number of light-emitting modules 3 sharing the same common compensation module 1 and common driving module 2 is not limited, that is, a pixel circuit can have As well as the two light emitting modules 3 shown in FIG. 3 , there may also be four light emitting modules 3 as shown in FIG. 4 , which is not limited here. Although the more light-emitting modules 3 there are in a pixel circuit, the less the average number of transistors in each pixel is, which is more conducive to the realization of high PPI display, but the shorter the light-emitting time of each pixel, the higher the brightness of each pixel. Also higher. Therefore, the number of light emitting modules 3 in the pixel circuit should be reasonably set according to actual needs.

在具体实施时，在本发明实施例提供的上述像素电路中，由于各发光模块3中的第一开关晶体管T1和第二开关晶体管T2不能同时处于导通状态，因此，需要对各发光模块3中控制第一开关晶体管T1导通状态的第二发光控制端E21和E22和第三发光控制端E3进行设置。In specific implementation, in the above-mentioned pixel circuit provided by the embodiment of the present invention, since the first switching transistor T1 and the second switching transistor T2 in each light emitting module 3 cannot be in the conduction state at the same time, therefore, it is necessary to configure each light emitting module 3 The second light-emitting control terminals E21 and E22 and the third light-emitting control terminal E3 that control the conduction state of the first switching transistor T1 are set.

具体地，在本发明实施例提供的上述像素电路中，当第一开关晶体管T1为N型晶体管，第二开关晶体管T2为P型晶体管；或者，如图3所示，图3为本发明实施例提供的另一种像素电路的结构示意图，第一开关晶体管T1为P型晶体管，第二开关晶体管T2为N型晶体管时；如图3所示，在同一发光模块3中，可以将第二发光控制端E21和E22与第三发光控制端E3连接同一控制端E21和E22，这样可以节省与控制端连接的控制线的布线数量，以降低像素电路构成的显示面板的电路版图复杂性，有利于实现高PPI显示。Specifically, in the above-mentioned pixel circuit provided by the embodiment of the present invention, when the first switch transistor T1 is an N-type transistor, the second switch transistor T2 is a P-type transistor; or, as shown in FIG. The structural diagram of another pixel circuit provided by the example, when the first switching transistor T1 is a P-type transistor, and the second switching transistor T2 is an N-type transistor; as shown in Figure 3, in the same light-emitting module 3, the second The light-emitting control terminals E21 and E22 are connected to the same control terminals E21 and E22 as the third light-emitting control terminal E3, which can save the wiring quantity of the control lines connected to the control terminals and reduce the complexity of the circuit layout of the display panel composed of pixel circuits. It is beneficial to realize high PPI display.

或者，具体地，在本发明实施例提供的上述像素电路中，如图2所示，当第一开关晶体管T1和第二开关晶体管T2均为P型晶体管时；或者，如图4所示，图4为本发明实施例提供的又一种像素电路的结构示意图，当第一开关晶体管T1和第二开关晶体管T2均为N型晶体管时；为节省与控制端连接的控制线的布线数量，以降低像素电路构成的显示面板的电路版图复杂性，以利于实现高PPI显示，各第三发光控制端E3可以和第一扫描信号端Scan1连接同一信号端，这是由于第一扫描信号端Scan1仅在初始化阶段加载初始化信号时第二开关晶体管T2同时处于导通状态，以对有机发光二极管OLED进行复位，而在各发光模块3的发光阶段第一扫描信号端Scan1不会加载初始化信号因而第二开关晶体管T2处于截止状态；或者，各第三发光控制端E3也可以和第二扫描信号端Scan2连接同一信号端，这是由于第二扫描信号端Scan2仅在数据写入阶段加载扫描信号时第二开关晶体管T2同时处于导通状态，以对有机发光二极管OLED进行复位，而在各发光模块3的发光阶段第二扫描信号端Scan2不会加载扫描信号因而第二开关晶体管T2处于截止状态；或者，各第三发光控制端E3还可以和其他发光模块3中的第二发光控制端E21或E22连接同一信号端，这是由于在其他发光模块3中的第二发光控制端E21或E22在发光阶段加载发光控制信号的同时，本发光模块3中的第二发光控制端E22或E21不会加载发光控制信号，因此本发光模块3中的第二开关晶体管T2可以处于导通状态，以对有机发光二极管OLED进行复位，而在本发光模块3中的第二发光控制端E21或E22在发光阶段加载发光控制信号的同时，其他发光模块3中的第二发光控制端E22或E21不会加载发光控制信号，因而本发光模块3中的第二开关晶体管T2处于截止状态。Or, specifically, in the above-mentioned pixel circuit provided by the embodiment of the present invention, as shown in FIG. 2, when both the first switching transistor T1 and the second switching transistor T2 are P-type transistors; or, as shown in FIG. 4, Fig. 4 is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, when both the first switch transistor T1 and the second switch transistor T2 are N-type transistors; in order to save the wiring quantity of the control lines connected to the control terminal, In order to reduce the complexity of the circuit layout of the display panel composed of pixel circuits, and to facilitate the realization of high PPI display, each third light-emitting control terminal E3 can be connected to the same signal terminal as the first scanning signal terminal Scan1, because the first scanning signal terminal Scan1 Only when the initialization signal is applied in the initialization stage, the second switching transistor T2 is in the conduction state at the same time, so as to reset the organic light emitting diode OLED, and the first scan signal terminal Scan1 will not be loaded with the initialization signal in the light-emitting stage of each light-emitting module 3, so the second The second switching transistor T2 is in an off state; or, each third light-emitting control terminal E3 can also be connected to the same signal terminal as the second scanning signal terminal Scan2, because the second scanning signal terminal Scan2 is only loaded with a scanning signal during the data writing phase. The second switching transistor T2 is in the conducting state at the same time, so as to reset the organic light emitting diode OLED, and the second scanning signal terminal Scan2 will not load the scanning signal during the light-emitting phase of each light-emitting module 3, so the second switching transistor T2 is in the cutting-off state; Alternatively, each third light-emitting control terminal E3 can also be connected to the same signal terminal as the second light-emitting control terminal E21 or E22 in other light-emitting modules 3, because the second light-emitting control terminal E21 or E22 in other light-emitting modules 3 While loading the light-emitting control signal in the light-emitting stage, the second light-emitting control terminal E22 or E21 in the light-emitting module 3 will not load the light-emitting control signal, so the second switching transistor T2 in the light-emitting module 3 can be in a conductive state to control The organic light-emitting diode OLED is reset, and while the second light-emitting control terminal E21 or E22 in this light-emitting module 3 is loaded with a light-emitting control signal during the light-emitting stage, the second light-emitting control terminal E22 or E21 in other light-emitting modules 3 will not be loaded The light-emitting control signal, so the second switch transistor T2 in the light-emitting module 3 is in a cut-off state.

在具体实施时，在本发明实施例提供的上述像素电路中，为节省与控制端连接的控制线的布线数量，以降低像素电路构成的显示面板的电路版图复杂性，以利于实现高PPI显示，各发光模块3中的第二电压信号端PVEE连接同一信号端，即各发光模块3中的各有机发光二极管OLED连接同一第二电压信号端PVEE。In the specific implementation, in the above-mentioned pixel circuit provided by the embodiment of the present invention, in order to save the wiring quantity of the control lines connected to the control terminal, to reduce the complexity of the circuit layout of the display panel composed of the pixel circuit, so as to facilitate the realization of high PPI display , the second voltage signal terminal PVEE in each light emitting module 3 is connected to the same signal terminal, that is, each organic light emitting diode OLED in each light emitting module 3 is connected to the same second voltage signal terminal PVEE.

在具体实施时，在本发明实施例提供的上述像素电路中的共用补偿模块1的实现结构有多种。例如，如图5a所示，图5a为本发明实施例提供的又一种像素电路结构示意图，共用补偿模块1可以具体包括：第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和第一电容C1；其中，In specific implementation, there are various implementation structures of the common compensation module 1 in the pixel circuit provided in the embodiment of the present invention. For example, as shown in FIG. 5a, which is a schematic structural diagram of another pixel circuit provided by an embodiment of the present invention, the common compensation module 1 may specifically include: a third switching transistor T3, a fourth switching transistor T4, and a fifth switching transistor T5. , the sixth switching transistor T6 and the first capacitor C1; wherein,

第三开关晶体管T3的栅极与第一扫描信号端Scan1电连接，源极与第一参考信号端Vref1电连接，漏极与第二节点N2电连接；The gate of the third switching transistor T3 is electrically connected to the first scanning signal terminal Scan1, the source is electrically connected to the first reference signal terminal Vref1, and the drain is electrically connected to the second node N2;

第四开关晶体管T4的栅极与第二扫描信号端Scan2电连接，源极与数据信号端Data电连接，漏极与第三节点N3电连接；The gate of the fourth switching transistor T4 is electrically connected to the second scanning signal terminal Scan2, the source is electrically connected to the data signal terminal Data, and the drain is electrically connected to the third node N3;

第五开关晶体管T5的栅极与第二扫描信号端Scan2电连接，源极与第一节点N1电连接，漏极与第二节点N2电连接；The gate of the fifth switching transistor T5 is electrically connected to the second scanning signal terminal Scan2, the source is electrically connected to the first node N1, and the drain is electrically connected to the second node N2;

第六开关晶体管T6的栅极与第一发光控制端E1电连接，源极与第一电压信号端PVDD电连接，漏极与第三节点N3电连接；The gate of the sixth switching transistor T6 is electrically connected to the first light emitting control terminal E1, the source is electrically connected to the first voltage signal terminal PVDD, and the drain is electrically connected to the third node N3;

第一电容C1连接于第二节点N2与第一电压信号端PVDD之间；The first capacitor C1 is connected between the second node N2 and the first voltage signal terminal PVDD;

驱动晶体管DTFT的栅极与第二节点N2电连接，源极与第三节点N3电连接。The gate of the driving transistor DTFT is electrically connected to the second node N2, and the source is electrically connected to the third node N3.

具体地，在本发明实施例提供的上述像素电路中，通过第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和第一电容C1以及驱动晶体管DTFT的相互配合，可以实现对阈值电压的补偿功能，使驱动晶体管DTFT输出至各发光模块3的工作电流与该驱动晶体管的阈值电压无关，从而可以实现补偿驱动晶体管的阈值电压漂移的效果，进而进一步避免由于驱动晶体管的阈值电压的漂移对显示的不利影响。并且，以图5a所示的像素电路为例，当像素电路包含两个发光模块3时，每个像素的平均晶体管数目从现有的七个变为4.5个，有利于实现高PPI显示。Specifically, in the above-mentioned pixel circuit provided by the embodiment of the present invention, through the interaction between the third switching transistor T3, the fourth switching transistor T4, the fifth switching transistor T5, the sixth switching transistor T6, the first capacitor C1 and the driving transistor DTFT With cooperation, the threshold voltage compensation function can be realized, so that the operating current output by the driving transistor DTFT to each light-emitting module 3 has nothing to do with the threshold voltage of the driving transistor, so that the effect of compensating the threshold voltage drift of the driving transistor can be realized, and further avoid due to The drift of the threshold voltage of the driving transistor has an adverse effect on the display. Moreover, taking the pixel circuit shown in FIG. 5a as an example, when the pixel circuit includes two light-emitting modules 3, the average number of transistors per pixel is changed from seven to 4.5, which is beneficial to realize high PPI display.

在具体实施时，在本发明实施例提供的上述像素电路中的共用补偿模块1的另一种结构可以如图5b所示，图5b为本发明实施例提供的又一种像素电路结构示意图，包括：第七开关晶体管T7、第八开关晶体管T8、第九开关晶体管T9、第十开关晶体管T10和第二电容C2；其中，In specific implementation, another structure of the shared compensation module 1 in the above pixel circuit provided by the embodiment of the present invention may be shown in FIG. 5b, which is a schematic structural diagram of another pixel circuit provided by the embodiment of the present invention. Including: the seventh switching transistor T7, the eighth switching transistor T8, the ninth switching transistor T9, the tenth switching transistor T10 and the second capacitor C2; wherein,

第七开关晶体管T7的栅极与第一扫描信号端Scan1电连接，源极与第一参考信号端Vref1电连接，漏极与第四节点N4电连接；The gate of the seventh switching transistor T7 is electrically connected to the first scanning signal terminal Scan1, the source is electrically connected to the first reference signal terminal Vref1, and the drain is electrically connected to the fourth node N4;

第八开关晶体管T8的栅极与第二扫描信号端Scan2电连接，源极与数据信号端Data电连接，漏极与第五节点N5电连接；The gate of the eighth switching transistor T8 is electrically connected to the second scanning signal terminal Scan2, the source is electrically connected to the data signal terminal Data, and the drain is electrically connected to the fifth node N5;

第九开关晶体管T9的栅极与第二扫描信号端Scan2电连接，源极与第一节点N1电连接，漏极与第四节点N4电连接；The gate of the ninth switching transistor T9 is electrically connected to the second scanning signal terminal Scan2, the source is electrically connected to the first node N1, and the drain is electrically connected to the fourth node N4;

第十开关晶体管T10的栅极与第一发光控制端E1电连接，源极与第二参考信号端Vref2电连接，漏极与第五节点N5电连接；The gate of the tenth switching transistor T10 is electrically connected to the first light-emitting control terminal E1, the source is electrically connected to the second reference signal terminal Vref2, and the drain is electrically connected to the fifth node N5;

第二电容C2连接于第四节点N4与第五节点N5之间；The second capacitor C2 is connected between the fourth node N4 and the fifth node N5;

驱动晶体管DTFT的栅极与第四节点N4电连接。The gate of the driving transistor DTFT is electrically connected to the fourth node N4.

具体地，在本发明实施例提供的上述像素电路中，通过第七开关晶体管T7、第八开关晶体管T8、第九开关晶体管T9、第十开关晶体管T10和第二电容C2以及驱动晶体管DTFT的相互配合，可以实现对阈值电压的补偿功能，使驱动晶体管DTFT输出至各发光模块3的工作电流与该驱动晶体管的阈值电压无关，从而可以实现补偿驱动晶体管的阈值电压漂移的效果，进而进一步避免由于驱动晶体管的阈值电压的漂移对显示的不利影响。并且，以图5b所示的像素电路为例，当像素电路包含两个发光模块3时，每个像素的平均晶体管数目从现有的七个变为4.5个，有利于实现高PPI显示。Specifically, in the above-mentioned pixel circuit provided by the embodiment of the present invention, through the interaction between the seventh switching transistor T7, the eighth switching transistor T8, the ninth switching transistor T9, the tenth switching transistor T10, the second capacitor C2 and the driving transistor DTFT With cooperation, the threshold voltage compensation function can be realized, so that the operating current output by the driving transistor DTFT to each light-emitting module 3 has nothing to do with the threshold voltage of the driving transistor, so that the effect of compensating the threshold voltage drift of the driving transistor can be realized, and further avoid due to The drift of the threshold voltage of the driving transistor has an adverse effect on the display. Moreover, taking the pixel circuit shown in FIG. 5b as an example, when the pixel circuit includes two light-emitting modules 3, the average number of transistors per pixel is changed from seven to 4.5, which is beneficial to realize high PPI display.

以上仅是举例说明本发明实施例提供的像素电路中共用补偿模块1的具体结构，在具体实施时，共用补偿模块1的具体结构不限于本发明实施例提供的上述结构，还可以是本领域技术人员可知的其他结构，在此不作限定。The above is just an example to illustrate the specific structure of the shared compensation module 1 in the pixel circuit provided by the embodiment of the present invention. In actual implementation, the specific structure of the shared compensation module 1 is not limited to the above-mentioned structure provided by the embodiment of the present invention, and can also be used in the field Other structures known by the skilled person are not limited here.

可选地地，在具体实施时，本发明实施例提供的上述像素电路中提到的驱动晶体管DTFT和各开关晶体管可以全部采用N型晶体管设计，或者，驱动晶体管DTFT和各开关晶体管可以全部采用P型晶体管设计，这样可以简化像素电路的制作工艺流程。Optionally, during specific implementation, the drive transistor DTFT and each switch transistor mentioned in the above pixel circuit provided by the embodiment of the present invention may all be designed with N-type transistors, or the drive transistor DTFT and each switch transistor may all be designed with P-type transistor design, which can simplify the manufacturing process of the pixel circuit.

在具体实施时，在本发明实施例提供的上述像素电路中，N型晶体管在高电位作用下导通，在低电位作用下截止；P型晶体管在高电位作用下截止，在低电位作用下导通。In specific implementation, in the above-mentioned pixel circuit provided by the embodiment of the present invention, the N-type transistor is turned on under the action of a high potential, and is turned off under the action of a low potential; the P-type transistor is turned off under the action of a high potential, and is turned off under the action of a low potential. conduction.

需要说明的是，在本发明实施例提供的上述阵列基板中，上述各驱动晶体管和各开关晶体管可以是薄膜晶体管(TFT，Thin Film Transistor)，也可以是金属氧化物半导体场效应管(MOS，Metal Oxide Scmiconductor)，在此不作限定。在具体实施中，这些晶体管的源极和漏极可以互换，不做具体区分。在描述具体实施例是以驱动晶体管和晶体管都为薄膜晶体管为例进行说明的。It should be noted that, in the above-mentioned array substrate provided by the embodiment of the present invention, each of the above-mentioned drive transistors and each switch transistor may be a thin film transistor (TFT, Thin Film Transistor), or a metal oxide semiconductor field effect transistor (MOS, Metal Oxide Scmiconductor), not limited here. In specific implementation, the sources and drains of these transistors can be interchanged, and no specific distinction is made. When describing specific embodiments, it is described by taking the driving transistor and the transistor both as thin film transistors as an example.

下面分别以图5a和图5b所示的像素电路的结构为例，结合电路时序图对本发明实施例提供的上述像素电路的工作过程作以描述。下述描述中以1表示高电位，0表示低电位。需要说明的是，1和0是逻辑电位，其仅是为了更好的解释本发明实施例的具体工作过程，而不是在具体实施时施加在各开关晶体管的栅极上的电压。Taking the structure of the pixel circuit shown in FIG. 5a and FIG. 5b as an example, the working process of the above pixel circuit provided by the embodiment of the present invention will be described in combination with the circuit timing diagram. In the following description, 1 represents a high potential, and 0 represents a low potential. It should be noted that 1 and 0 are logic potentials, which are only used to better explain the specific working process of the embodiment of the present invention, rather than the voltage applied to the gate of each switching transistor during specific implementation.

可选地，以图5a所示的像素电路的结构为例进行说明，第一电压信号端PVDD的电位为高电位，第二电压信号端PVEE的电位为低电位，对应的输入输出时序图如图6a所示，图6a为图5a所示的结构对应的时序图，主要选取如图6a所示的输入输出时序图中的一帧显示时间。一帧显示时间分为第一子帧显示时间和第二子帧显示时间，第一子帧显示时间和第二子帧显示时间又细分为初始化阶段a、数据写入阶段b和发光阶段c三个阶段。Optionally, taking the structure of the pixel circuit shown in FIG. 5a as an example for illustration, the potential of the first voltage signal terminal PVDD is a high potential, and the potential of the second voltage signal terminal PVEE is a low potential. The corresponding input and output timing diagram is as follows: As shown in FIG. 6a, FIG. 6a is a timing diagram corresponding to the structure shown in FIG. 5a, and the display time of one frame in the input and output timing diagram shown in FIG. 6a is mainly selected. A frame display time is divided into the first sub-frame display time and the second sub-frame display time, and the first sub-frame display time and the second sub-frame display time are further subdivided into initialization phase a, data writing phase b and lighting phase c three phases.

在第一子帧显示时间的初始化阶段a，E1＝1，Scan1＝0，Scan2＝1，E21＝1，E22＝1，E3＝Scan1。In the initialization phase a of the display time of the first subframe, E1=1, Scan1=0, Scan2=1, E21=1, E22=1, E3=Scan1.

由于Scan1＝0，因此第三开关晶体管T3导通以将第一参考信号端Vref1的第一参考信号提供给第二节点N2，使驱动晶体管DTFT的栅极电位为第一参考信号电压。由于E3＝0，因此各发光模块3中的第二开关晶体管T2导通以将第一参考信号端Vref1的第一参考信号提供给各有机发光二极管OLED，使有机发光二极管OLED复位。由于E1＝1，Scan2＝1，E21＝1，E22＝1，因此，第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和各发光模块3的第一开关晶体管T1截止。Since Scan1=0, the third switching transistor T3 is turned on to provide the first reference signal of the first reference signal terminal Vref1 to the second node N2, so that the gate potential of the driving transistor DTFT is the voltage of the first reference signal. Since E3=0, the second switching transistor T2 in each light emitting module 3 is turned on to provide the first reference signal of the first reference signal terminal Vref1 to each organic light emitting diode OLED, so as to reset the organic light emitting diode OLED. Since E1=1, Scan2=1, E21=1, E22=1, therefore, the fourth switch transistor T4, the fifth switch transistor T5, the sixth switch transistor T6 and the first switch transistor T1 of each light emitting module 3 are turned off.

在第一子帧显示时间的数据写入阶段b，E1＝1，Scan1＝1，Scan2＝0，E21＝1，E22＝1，E3＝Scan1。In the data writing phase b of the display time of the first subframe, E1=1, Scan1=1, Scan2=0, E21=1, E22=1, E3=Scan1.

由于Scan1＝1，因此第三开关晶体管T3和各发光模块3中的第二开关晶体管T2截止。由于Scan2＝0，因此第四开关晶体管T4导通以将数据信号端Data的数据信号提供给第三节点N3，第五开关晶体管T5导通，第二节点N2和第一节点N1的电位变为Vdata-|Vth|。由于E1＝1，E21＝1，E22＝1，因此第六开关晶体管T6和各发光模块3的第一开关晶体管T1截止。Since Scan1=1, the third switch transistor T3 and the second switch transistor T2 in each light emitting module 3 are turned off. Since Scan2=0, the fourth switching transistor T4 is turned on to provide the data signal of the data signal terminal Data to the third node N3, the fifth switching transistor T5 is turned on, and the potentials of the second node N2 and the first node N1 become Vdata-|Vth|. Since E1=1, E21=1, and E22=1, the sixth switching transistor T6 and the first switching transistor T1 of each light emitting module 3 are turned off.

在第一子帧显示时间的发光阶段c，E1＝0，Scan1＝1，Scan2＝1，E21＝0，E22＝1，E3＝Scan1。In the lighting phase c of the display time of the first subframe, E1=0, Scan1=1, Scan2=1, E21=0, E22=1, E3=Scan1.

由于Scan1＝1，因此第三开关晶体管T3和各发光模块3中的第二开关晶体管T2截止。由于Scan2＝1，因此第四开关晶体管T4和第五开关晶体管T5截止。E22＝1，因此右边的发光模块3的第一开关晶体管T1截止，右边的发光模块3不工作。由于E1＝0，因此第六开关晶体管T6导通以将第一电压信号端PVDD的第一电压信号提供给第三节点N3，此时驱动晶体管的Vsg＝N3-N2＝PVDD-Vdata+|Vth|，I＝K(Vsg-|Vth|)²＝K(PVDD-Vdata)²。由于E21＝0，因此，左边的发光模块3的第一开关晶体管T1导通，以使驱动晶体管DTFT的工作电流驱动左边的发光模块3中的有机发光二极管OLED工作发光。Since Scan1=1, the third switch transistor T3 and the second switch transistor T2 in each light emitting module 3 are turned off. Since Scan2=1, the fourth switch transistor T4 and the fifth switch transistor T5 are turned off. E22=1, so the first switching transistor T1 of the right light emitting module 3 is turned off, and the right light emitting module 3 does not work. Since E1=0, the sixth switching transistor T6 is turned on to provide the first voltage signal of the first voltage signal terminal PVDD to the third node N3, at this time, Vsg=N3-N2=PVDD-Vdata+|Vth| of the driving transistor , I=K(Vsg-|Vth|) ² =K(PVDD-Vdata) ² . Since E21=0, the first switching transistor T1 of the left light emitting module 3 is turned on, so that the operating current of the drive transistor DTFT drives the organic light emitting diode OLED in the left light emitting module 3 to work and emit light.

在第二子帧显示时间的初始化阶段a，E1＝1，Scan1＝0，Scan2＝1，E21＝1，E22＝1，E3＝Scan1。In the initialization phase a of the display time of the second subframe, E1=1, Scan1=0, Scan2=1, E21=1, E22=1, E3=Scan1.

在第二子帧显示时间的数据写入阶段b，E1＝1，Scan1＝1，Scan2＝0，E21＝1，E22＝1，E3＝Scan1。In the data writing phase b of the display time of the second subframe, E1=1, Scan1=1, Scan2=0, E21=1, E22=1, E3=Scan1.

在第二子帧显示时间的发光阶段c，E1＝0，Scan1＝1，Scan2＝1，E21＝1，E22＝0，E3＝Scan1。In the lighting phase c of the display time of the second subframe, E1=0, Scan1=1, Scan2=1, E21=1, E22=0, E3=Scan1.

由于Scan1＝1，因此第三开关晶体管T3和各发光模块3中的第二开关晶体管T2截止。由于Scan2＝1，因此第四开关晶体管T4和第五开关晶体管T5截止。E21＝1，因此左边的发光模块3的第一开关晶体管T1截止，左边的发光模块3不工作。由于E1＝0，因此第六开关晶体管T6导通以将第一电压信号端PVDD的第一电压信号提供给第三节点N3，此时驱动晶体管的Vsg＝N3-N2＝PVDD-Vdata+|Vth|，I＝K(Vsg-|Vth|)²＝K(PVDD-Vdata)²。由于E22＝0，因此，右边的发光模块3的第一开关晶体管T1导通，以使驱动晶体管DTFT的工作电流驱动右边的发光模块3中的有机发光二极管OLED工作发光。Since Scan1=1, the third switch transistor T3 and the second switch transistor T2 in each light emitting module 3 are turned off. Since Scan2=1, the fourth switch transistor T4 and the fifth switch transistor T5 are turned off. E21=1, so the first switch transistor T1 of the left light emitting module 3 is turned off, and the left light emitting module 3 does not work. Since E1=0, the sixth switching transistor T6 is turned on to provide the first voltage signal of the first voltage signal terminal PVDD to the third node N3, at this time, Vsg=N3-N2=PVDD-Vdata+|Vth| of the driving transistor , I=K(Vsg-|Vth|) ² =K(PVDD-Vdata) ² . Since E22=0, the first switching transistor T1 of the right light emitting module 3 is turned on, so that the working current of the driving transistor DTFT drives the organic light emitting diode OLED in the right light emitting module 3 to work and emit light.

可选地，以图5b所示的像素电路的结构为例进行说明，第一电压信号端PVDD的电位为高电位，第二电压信号端PVEE的电位为低电位，对应的输入输出时序图如图6b所示，图6b为图5b所示的结构对应的时序图，主要选取如图6b所示的输入输出时序图中的一帧显示时间。一帧显示时间分为第一子帧显示时间和第二子帧显示时间，第一子帧显示时间和第二子帧显示时间又细分为初始化阶段a、数据写入阶段b和发光阶段c三个阶段。Optionally, taking the structure of the pixel circuit shown in FIG. 5b as an example for illustration, the potential of the first voltage signal terminal PVDD is a high potential, and the potential of the second voltage signal terminal PVEE is a low potential. The corresponding input and output timing diagram is as follows: As shown in FIG. 6b, FIG. 6b is a timing diagram corresponding to the structure shown in FIG. 5b, and a display time of one frame in the input and output timing diagram shown in FIG. 6b is mainly selected. A frame display time is divided into the first sub-frame display time and the second sub-frame display time, and the first sub-frame display time and the second sub-frame display time are further subdivided into initialization phase a, data writing phase b and lighting phase c three phases.

在第一子帧显示时间的初始化阶段a，E1＝0，Scan1＝0，Scan2＝1，E21＝1，E22＝1，E3＝Scan1。In the initialization phase a of the display time of the first subframe, E1=0, Scan1=0, Scan2=1, E21=1, E22=1, E3=Scan1.

由于Scan1＝0，因此第七开关晶体管T7导通以将第一参考信号端Vref1的第一参考信号提供给第四节点N4，使驱动晶体管DTFT的栅极电位为第一参考信号电压。由于E3＝0，因此各发光模块3中的第二开关晶体管T2导通以将第一参考信号端Vref1的第一参考信号提供给各有机发光二极管OLED，使有机发光二极管OLED复位。由于E1＝0，因此，第十开关晶体管T10导通以将第二参考信号端Vref2的第二参考信号提供给第五节点N5。由于Scan2＝1，E21＝1，E22＝1，因此第八开关晶体管T8、第九开关晶体管T9和各发光模块3的第一开关晶体管T1截止。Since Scan1=0, the seventh switching transistor T7 is turned on to provide the first reference signal of the first reference signal terminal Vref1 to the fourth node N4, so that the gate potential of the driving transistor DTFT is the voltage of the first reference signal. Since E3=0, the second switching transistor T2 in each light emitting module 3 is turned on to provide the first reference signal of the first reference signal terminal Vref1 to each organic light emitting diode OLED, so as to reset the organic light emitting diode OLED. Since E1=0, the tenth switching transistor T10 is turned on to provide the second reference signal of the second reference signal terminal Vref2 to the fifth node N5. Since Scan2=1, E21=1, E22=1, the eighth switch transistor T8, the ninth switch transistor T9 and the first switch transistor T1 of each light emitting module 3 are turned off.

由于Scan1＝1，因此第七开关晶体管T7和各发光模块3中的第二开关晶体管T2截止。由于Scan2＝0，因此第八开关晶体管T8导通以将数据信号端Data的数据信号提供给第五节点N5，第九开关晶体管T9导通，使第四节点N4和第一节点N1的电位变为PVDD-|Vth|。由于E1＝1，E21＝1，E22＝1，因此第十开关晶体管T10和各发光模块3的第一开关晶体管T1截止。Since Scan1=1, the seventh switching transistor T7 and the second switching transistor T2 in each light emitting module 3 are turned off. Since Scan2=0, the eighth switch transistor T8 is turned on to provide the data signal of the data signal terminal Data to the fifth node N5, and the ninth switch transistor T9 is turned on, so that the potentials of the fourth node N4 and the first node N1 are changed. is PVDD-|Vth|. Since E1=1, E21=1, and E22=1, the tenth switch transistor T10 and the first switch transistor T1 of each light emitting module 3 are turned off.

由于Scan1＝1，因此第七开关晶体管T7和各发光模块3中的第二开关晶体管T2截止。由于Scan2＝1，因此第八开关晶体管T8和第九开关晶体管T9截止。E22＝1，因此右边的发光模块3的第一开关晶体管T1截止，右边的发光模块3不工作。由于E1＝0，因此第十开关晶体管T10导通以将第二参考信号端Vref2的第二参考信号提供给第五节点N5，由于第二电容C2的自举作用，第四节点的电位变为PVDD-|Vth|-Vdata+Vref2，此时驱动晶体管的Vsg＝PVDD-N4＝|Vth|+Vdata-Vref2，I＝K(Vsg-|Vth|)²＝K(Vdata-Vref2)²。由于E21＝0，因此，左边的发光模块3的第一开关晶体管T1导通，以使驱动晶体管DTFT的工作电流驱动左边的发光模块3中的有机发光二极管OLED工作发光。Since Scan1=1, the seventh switching transistor T7 and the second switching transistor T2 in each light emitting module 3 are turned off. Since Scan2=1, the eighth switching transistor T8 and the ninth switching transistor T9 are turned off. E22=1, so the first switching transistor T1 of the right light emitting module 3 is turned off, and the right light emitting module 3 does not work. Since E1=0, the tenth switch transistor T10 is turned on to provide the second reference signal of the second reference signal terminal Vref2 to the fifth node N5, and due to the bootstrap effect of the second capacitor C2, the potential of the fourth node becomes PVDD-|Vth|-Vdata+Vref2, Vsg=PVDD-N4=|Vth|+Vdata-Vref2 of the driving transistor at this time, I=K(Vsg-|Vth|) ² =K(Vdata-Vref2) ² . Since E21=0, the first switching transistor T1 of the left light emitting module 3 is turned on, so that the operating current of the drive transistor DTFT drives the organic light emitting diode OLED in the left light emitting module 3 to work and emit light.

在第二子帧显示时间的初始化阶段a，E1＝0，Scan1＝0，Scan2＝1，E21＝1，E22＝1，E3＝Scan1。In the initialization phase a of the display time of the second subframe, E1=0, Scan1=0, Scan2=1, E21=1, E22=1, E3=Scan1.

由于Scan1＝1，因此第七开关晶体管T7和各发光模块3中的第二开关晶体管T2截止。由于Scan2＝1，因此第八开关晶体管T8和第九开关晶体管T9截止。E21＝1，因此左边的发光模块3的第一开关晶体管T1截止，左边的发光模块3不工作。由于E1＝0，因此第十开关晶体管T10导通以将第二参考信号端Vref2的第二参考信号提供给第五节点N5，由于第二电容C2的自举作用，第四节点的电位变为PVDD-|Vth|-Vdata+Vref2，此时驱动晶体管的Vsg＝PVDD-N4＝|Vth|+Vdata-Vref2，I＝K(Vsg-|Vth|)²＝K(Vdata-Vref2)²。由于E22＝0，因此，右边的发光模块3的第一开关晶体管T1导通，以使驱动晶体管DTFT的工作电流驱动右边的发光模块3中的有机发光二极管OLED工作发光。Since Scan1=1, the seventh switching transistor T7 and the second switching transistor T2 in each light emitting module 3 are turned off. Since Scan2=1, the eighth switching transistor T8 and the ninth switching transistor T9 are turned off. E21=1, so the first switching transistor T1 of the left light emitting module 3 is turned off, and the left light emitting module 3 does not work. Since E1=0, the tenth switch transistor T10 is turned on to provide the second reference signal of the second reference signal terminal Vref2 to the fifth node N5, and due to the bootstrap effect of the second capacitor C2, the potential of the fourth node becomes PVDD-|Vth|-Vdata+Vref2, Vsg=PVDD-N4=|Vth|+Vdata-Vref2 of the driving transistor at this time, I=K(Vsg-|Vth|) ² =K(Vdata-Vref2) ² . Since E22=0, the first switching transistor T1 of the right light emitting module 3 is turned on, so that the working current of the driving transistor DTFT drives the organic light emitting diode OLED in the right light emitting module 3 to work and emit light.

基于同一发明构思，本发明实施例还提供了一种像素电路的驱动方法，包括：Based on the same inventive concept, an embodiment of the present invention also provides a driving method for a pixel circuit, including:

将每一帧显示时间分为与像素电路中的发光模块一一对应的子帧显示时间；例如图6a和图6b所示，在对应的像素电路中的发光模块为两个时，将每一帧显示时间分为第一子帧显示时间和第二子帧显示时间；Each frame display time is divided into sub-frame display time corresponding to the light-emitting modules in the pixel circuit; for example, as shown in Figure 6a and Figure 6b, when there are two light-emitting modules in the corresponding pixel circuit, each The frame display time is divided into the first subframe display time and the second subframe display time;

在每子帧显示时间内，在初始化和数据写入阶段，控制共用补偿模块驱动驱动晶体管，在发光阶段，控制与当前子帧显示时间对应的发光模块发光，控制其他发光模块不发光。In the display time of each subframe, in the initialization and data writing stages, control the common compensation module to drive the driving transistor; in the light emitting stage, control the light emitting module corresponding to the current subframe display time to emit light, and control other light emitting modules not to emit light.

在具体实施时，在本发明实施例提供的上述像素电路的驱动方法中，当像素点路的共用补偿模块1如图5a所示包括：第三开关晶体管T3、第四开关晶体管T4、第五开关晶体管T5、第六开关晶体管T6和第一电容C1时，驱动方法，如图6a所示，具体包括：In specific implementation, in the driving method of the above-mentioned pixel circuit provided by the embodiment of the present invention, when the common compensation module 1 of the pixel point circuit includes as shown in FIG. When switching the transistor T5, the sixth switching transistor T6 and the first capacitor C1, the driving method, as shown in FIG. 6a, specifically includes:

每子帧显示时间的初始化阶段a，向第一扫描信号端Scan1提供第一电平信号，向第二扫描信号端Scan2提供第二电平信号，向第一发光控制端E1提供第二电平信号，向各第二发光控制端E21和E22提供第二电平信号；In the initialization phase a of each sub-frame display time, the first level signal is provided to the first scanning signal terminal Scan1, the second level signal is provided to the second scanning signal terminal Scan2, and the second level signal is provided to the first light emission control terminal E1 signal, providing a second level signal to each of the second light-emitting control terminals E21 and E22;

每子帧显示时间的数据写入阶段b，向第一扫描信号端Scan1提供第二电平信号，向第二扫描信号端Scan2提供第一电平信号，向第一发光控制端E1提供第二电平信号，向各第二发光控制端E21和E22提供第二电平信号；In the data writing phase b of each subframe display time, the second level signal is provided to the first scanning signal terminal Scan1, the first level signal is provided to the second scanning signal terminal Scan2, and the second level signal is provided to the first light emission control terminal E1. A level signal, providing a second level signal to each of the second light-emitting control terminals E21 and E22;

每子帧显示时间的发光阶段c，向第一扫描信号端Scan1提供第二电平信号，向第二扫描信号端Scan2提供第二电平信号，向第一发光控制端E1提供第一电平信号，向与当前子帧显示时间对应的发光模块3中的第二发光控制端E21或E22提供第一电平信号，向其他发光模块中的第二发光控制端E22或E21提供第二电平信号。In the light-emitting phase c of each sub-frame display time, the second level signal is provided to the first scanning signal terminal Scan1, the second level signal is provided to the second scanning signal terminal Scan2, and the first level signal is provided to the first light-emitting control terminal E1 Signal, providing the first level signal to the second light-emitting control terminal E21 or E22 in the light-emitting module 3 corresponding to the current sub-frame display time, and providing the second level signal to the second light-emitting control terminal E22 or E21 in other light-emitting modules Signal.

在具体实施时，在本发明实施例提供的上述像素电路的驱动方法中，当像素点路的共用补偿模块1如图5b所示包括：第七开关晶体管T7、第八开关晶体管T8、第九开关晶体管T9、第十开关晶体管T10和第二电容C2时，驱动方法，如图6b所示，具体包括：In specific implementation, in the driving method of the above-mentioned pixel circuit provided by the embodiment of the present invention, when the common compensation module 1 of the pixel point circuit as shown in Fig. When switching the transistor T9, the tenth switching transistor T10 and the second capacitor C2, the driving method, as shown in FIG. 6b, specifically includes:

每子帧显示时间的初始化阶段a，向第一扫描信号端Scan1提供第一电平信号，向第二扫描信号端Scan2提供第二电平信号，向第一发光控制端E1提供第一电平信号，向各第二发光控制端E21和E22提供第二电平信号；In the initialization phase a of each sub-frame display time, the first level signal is provided to the first scanning signal terminal Scan1, the second level signal is provided to the second scanning signal terminal Scan2, and the first level signal is provided to the first light emission control terminal E1 signal, providing a second level signal to each of the second light-emitting control terminals E21 and E22;

每子帧显示时间的发光阶段c，向第一扫描信号端Scan1提供第二电平信号，向第二扫描信号端Scan2提供第二电平信号，向第一发光控制端E1提供第一电平信号，向与当前子帧显示时间对应的发光模块3中的第二发光控制端E21或E22提供第一电平信号，向其他发光模块3中的第二发光控制端E22或E21提供第二电平信号。In the light-emitting phase c of each sub-frame display time, the second level signal is provided to the first scanning signal terminal Scan1, the second level signal is provided to the second scanning signal terminal Scan2, and the first level signal is provided to the first light-emitting control terminal E1 signal, provide the first level signal to the second light-emitting control terminal E21 or E22 in the light-emitting module 3 corresponding to the current sub-frame display time, and provide the second electric level signal to the second light-emitting control terminal E22 or E21 in other light-emitting modules 3 flat signal.

可选地，在上述像素电路的驱动方法中的第一电平信号可以为高电位信号，对应地，第二电平信号为低电位信号；或者反之，如图6a和图6b所示，第一电平信号可以为低电位信号，对应地，第二电平信号为高电位信号，具体需要根据开关晶体管是N型晶体管还是P型晶体管而定。Optionally, the first level signal in the above driving method of the pixel circuit may be a high potential signal, and correspondingly, the second level signal is a low potential signal; or vice versa, as shown in FIG. 6a and FIG. 6b, the first The first-level signal can be a low-potential signal, and correspondingly, the second-level signal is a high-potential signal, which depends on whether the switch transistor is an N-type transistor or a P-type transistor.

可选地，在本发明实施例提供的上述像素电路的驱动方法中，为了保证各发光模块具有相同的发光时间，较佳地，每子帧显示时间的时长设置为相同。Optionally, in the above pixel circuit driving method provided in the embodiment of the present invention, in order to ensure that each light emitting module has the same light emitting time, preferably, the display time of each subframe is set to be the same.

基于同一发明构思，本发明实施例还提供了一种有机电致发光显示面板，包括：多个本发明实施例提供的上述像素电路。该有机发光显示面板解决问题的原理与前述像素电路相似，因此该有机发光显示面板的实施可以参见前述像素电路的实施，重复之处在此不再赘述。Based on the same inventive concept, an embodiment of the present invention further provides an organic electroluminescence display panel, including: a plurality of the above-mentioned pixel circuits provided by the embodiments of the present invention. The problem-solving principle of the organic light-emitting display panel is similar to that of the above-mentioned pixel circuit, so the implementation of the organic light-emitting display panel can refer to the implementation of the above-mentioned pixel circuit, and repeated descriptions will not be repeated here.

在具体实施时，在本发明实施例提供的上述有机电致发光显示面板中，为了便于实际结构布图，像素电路中的各发光模块可以属于行相邻的多个像素，例如像素电路中包含的两个发光模块可以属于同一行中相邻的两个像素，则在每一帧显示时间中的第一子帧显示时间和第二子帧显示时间内发光的像素行数变为原来屏幕行数的一半，如果保持每行扫描时间不变，则整个屏幕中每帧显示时间不变。或者，像素电路中的各发光模块也可以属于列相邻的多个像素，例如像素电路中包含的两个发光模块可以属于同一列中相邻的两个像素，则在每一帧显示时间中的第一子帧显示时间和第二子帧显示时间内发光的像素行数不变，但每子帧显示时间内发光的像素列数变为原来屏幕列数的一半，可以减少一半的数据线数量，如果保持每行扫描时间不变，则整个屏幕中每帧显示时间变为原来的两倍。或者，像素电路中的各发光模块还可以同时属于列相邻和行相邻的多个像素，例如像素电路中包含的四个发光模块可以属于相邻两行中相邻的两个像素，则在每一帧显示时间中的第一子帧显示时间至第四子帧显示时间内发光的像素行数变为原来屏幕行数的一半，且每子帧显示时间内发光的像素列数变为原来屏幕列数的一半，可以减少一半的数据线数量，如果保持每行扫描时间不变，则整个屏幕中每帧显示时间不变。In specific implementation, in the above-mentioned organic electroluminescent display panel provided by the embodiment of the present invention, in order to facilitate the actual structural layout, each light-emitting module in the pixel circuit may belong to a plurality of adjacent pixels in the row, for example, the pixel circuit includes The two light-emitting modules can belong to two adjacent pixels in the same row, then the number of pixel rows that emit light during the display time of the first subframe and the display time of the second subframe in each frame display time becomes the original screen row Half of the number, if the scanning time of each line remains unchanged, the display time of each frame in the entire screen remains unchanged. Alternatively, each light-emitting module in the pixel circuit may also belong to multiple adjacent pixels in a column, for example, two light-emitting modules included in a pixel circuit may belong to two adjacent pixels in the same column, then in each frame display time The number of illuminated pixel rows in the first subframe display time and the second subframe display time remains unchanged, but the number of illuminated pixel columns in each subframe display time becomes half of the original screen column number, which can reduce half of the data lines If the scanning time of each line is kept constant, the display time of each frame in the entire screen will be doubled. Or, each light-emitting module in the pixel circuit can also belong to multiple pixels adjacent to the column and row at the same time, for example, the four light-emitting modules included in the pixel circuit can belong to two adjacent pixels in two adjacent rows, then From the first subframe display time to the fourth subframe display time in each frame display time, the number of pixel rows emitting light becomes half of the original screen row number, and the number of pixel columns emitting light in each subframe display time becomes Half the number of columns on the original screen can reduce the number of data lines by half. If the scanning time of each row remains unchanged, the display time of each frame in the entire screen remains unchanged.

基于同一发明构思，本发明实施例还提供了一种显示装置，如图7所示，图7为本发明实施例提供的一种显示装置的结构示意图，包括本发明实施例提供的有机电致发光显示面板。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本发明的限制。该显示装置的实施可以参见上述阵列基板的实施例，重复之处不再赘述。Based on the same inventive concept, an embodiment of the present invention also provides a display device, as shown in Figure 7, which is a schematic structural diagram of a display device provided by an embodiment of the present invention, including the organic electro- Glowing display panel. The display device may be any product or component with a display function such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, and the like. The other essential components of the display device should be understood by those of ordinary skill in the art, and will not be repeated here, nor should they be regarded as limitations on the present invention. For the implementation of the display device, reference may be made to the above-mentioned embodiments of the array substrate, and repeated descriptions will not be repeated.

本发明实施例提供的上述像素电路、其驱动方法、有机电致发光显示面板及显示装置，通过多个像素共用相同的共用补偿模块和共用驱动模块的方式，从而可以降低每个像素的平均晶体管数目，以利于实现高分辨率显示，进而有利于实现虚拟现实显示要求的高PPI。具体地，像素电路包括共用补偿模块，共用驱动模块以及至少两个发光模块；其中，共用补偿模块用于驱动共用驱动模块，共用驱动模块包括驱动晶体管；各发光模块中的有机发光二极管通过第一开关晶体管连接到驱动晶体管的漏极，以分时接收经过阈值电压补偿后的驱动电流进行发光；各发光模块中的有机发光二极管通过第二开关晶体管连接到第一参考信号端，以在本发光模块不发光时进行复位。The above-mentioned pixel circuit, its driving method, organic electroluminescence display panel and display device provided by the embodiments of the present invention can reduce the average transistor density of each pixel by sharing the same common compensation module and common driving module for multiple pixels. Number, in order to facilitate the realization of high-resolution display, which in turn is conducive to the realization of the high PPI required by virtual reality display. Specifically, the pixel circuit includes a common compensation module, a common driving module, and at least two light emitting modules; wherein, the common compensation module is used to drive the common driving module, and the common driving module includes a driving transistor; the organic light emitting diodes in each light emitting module pass through the first The switching transistor is connected to the drain of the driving transistor to receive the driving current after threshold voltage compensation in time-sharing to emit light; the organic light-emitting diode in each light-emitting module is connected to the first reference signal terminal through the second switching transistor to emit light at this time. Reset when the module is not lit.

显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention also intends to include these modifications and variations.

Claims (13)

1. A pixel circuit, comprising: the common compensation module, the common driving module and the at least two light-emitting modules; wherein,

the common compensation module is respectively electrically connected with the first reference signal end, the first scanning signal end, the second scanning signal end, the first light-emitting control end and the data signal end and is used for driving the common driving module;

the common driving module includes: a drive transistor; the source electrode of the driving transistor is electrically connected with the first voltage signal end, the grid electrode of the driving transistor is electrically connected with the common compensation module, and the drain electrode of the driving transistor is electrically connected with the first node;

each of the light emitting modules includes: a first switching transistor, a second switching transistor, and an organic light emitting diode; the drain electrode of the first switching transistor and the drain electrode of the second switching transistor are respectively electrically connected with one end of the organic light emitting diode; the other end of the organic light emitting diode is electrically connected with a second voltage signal end; a source of the first switching transistor is electrically connected to the first node; the source of the second switching transistor is electrically connected with the first reference signal terminal; the grid electrode of the first switch transistor is electrically connected with the second light-emitting control end; the grid electrode of the second switching transistor is electrically connected with the third light-emitting control end;

the second light-emitting control end in each light-emitting module is a different control end.

2. The pixel circuit according to claim 1, wherein the first switching transistor is an N-type transistor and the second switching transistor is a P-type transistor; or, the first switch transistor is a P-type transistor, and the second switch transistor is an N-type transistor;

the second light-emitting control end and the third light-emitting control end in the same light-emitting module are connected with the same control end.

3. The pixel circuit according to claim 1, wherein the first switching transistor and the second switching transistor are P-type transistors; or, the first switch transistor and the second switch transistor are N-type transistors;

each third light-emitting control terminal and the first scanning signal terminal are connected with the same signal terminal; or, each of the third light-emitting control terminals and the second scanning signal terminal is connected to the same signal terminal; or, each of the third light-emitting control terminals and the second light-emitting control terminals in the other light-emitting modules are connected to the same signal terminal.

4. The pixel circuit according to claim 1, wherein the second voltage signal terminal in each of the light emitting modules is connected to the same signal terminal.

5. The pixel circuit according to any of claims 1-4, wherein the common compensation module comprises: the third switching transistor, the fourth switching transistor, the fifth switching transistor, the sixth switching transistor and the first capacitor; wherein,

the grid electrode of the third switching transistor is electrically connected with the first scanning signal end, the source electrode of the third switching transistor is electrically connected with the first reference signal end, and the drain electrode of the third switching transistor is electrically connected with the second node;

the grid electrode of the fourth switching transistor is electrically connected with the second scanning signal end, the source electrode of the fourth switching transistor is electrically connected with the data signal end, and the drain electrode of the fourth switching transistor is electrically connected with the third node;

a grid electrode of the fifth switching transistor is electrically connected with the second scanning signal end, a source electrode of the fifth switching transistor is electrically connected with the first node, and a drain electrode of the fifth switching transistor is electrically connected with the second node;

a grid electrode of the sixth switching transistor is electrically connected with the first light-emitting control end, a source electrode of the sixth switching transistor is electrically connected with the first voltage signal end, and a drain electrode of the sixth switching transistor is electrically connected with the third node;

the first capacitor is connected between the second node and the first voltage signal end;

the grid electrode of the driving transistor is electrically connected with the second node, and the source electrode of the driving transistor is electrically connected with the third node.

6. The pixel circuit according to any of claims 1-4, wherein the common compensation module comprises: a seventh switching transistor, an eighth switching transistor, a ninth switching transistor, a tenth switching transistor, and a second capacitor; wherein,

a gate of the seventh switching transistor is electrically connected to the first scan signal terminal, a source thereof is electrically connected to the first reference signal terminal, and a drain thereof is electrically connected to a fourth node;

a gate of the eighth switching transistor is electrically connected to the second scan signal terminal, a source thereof is electrically connected to the data signal terminal, and a drain thereof is electrically connected to a fifth node;

a gate of the ninth switching transistor is electrically connected to the second scan signal terminal, a source thereof is electrically connected to the first node, and a drain thereof is electrically connected to the fourth node;

a grid electrode of the tenth switching transistor is electrically connected with the first light-emitting control end, a source electrode of the tenth switching transistor is electrically connected with the second reference signal end, and a drain electrode of the tenth switching transistor is electrically connected with the fifth node;

the second capacitor is connected between the fourth node and the fifth node;

the gate of the driving transistor is electrically connected to the fourth node.

7. A method of driving a pixel circuit according to any one of claims 1 to 6, comprising:

dividing each frame of display time into sub-frame display time which is in one-to-one correspondence with the light emitting modules in the pixel circuit;

and in each sub-frame display time, in the initialization and data writing stages, controlling the common compensation module to drive the driving transistor, in the light-emitting stage, controlling the light-emitting module corresponding to the current sub-frame display time to emit light, and controlling other light-emitting modules not to emit light.

8. The driving method as claimed in claim 7, wherein when the common compensation module of the pixel circuit comprises: when the third switching transistor, the fourth switching transistor, the fifth switching transistor, the sixth switching transistor and the first capacitor are used, the driving method specifically comprises the following steps:

in the initialization stage of each sub-frame display time, providing a first level signal to the first scanning signal terminal, providing a second level signal to the second scanning signal terminal, providing a second level signal to the first light-emitting control terminal, and providing a second level signal to each second light-emitting control terminal;

in a data writing stage of each sub-frame display time, providing a second level signal to the first scanning signal terminal, providing a first level signal to the second scanning signal terminal, providing a second level signal to the first light-emitting control terminal, and providing a second level signal to each second light-emitting control terminal;

in the light emitting stage of each sub-frame display time, a second level signal is provided to the first scanning signal terminal, a second level signal is provided to the second scanning signal terminal, a first level signal is provided to the first light emitting control terminal, a first level signal is provided to the second light emitting control terminal in the light emitting module corresponding to the current sub-frame display time, and a second level signal is provided to the second light emitting control terminals in other light emitting modules.

9. The driving method as claimed in claim 7, wherein when the common compensation module of the pixel circuit comprises: when the seventh switching transistor, the eighth switching transistor, the ninth switching transistor, the tenth switching transistor, and the second capacitor are used, the driving method specifically includes:

in the initialization stage of each sub-frame display time, providing a first level signal to the first scanning signal terminal, providing a second level signal to the second scanning signal terminal, providing a first level signal to the first light-emitting control terminal, and providing a second level signal to each second light-emitting control terminal;

10. A driving method according to any one of claims 7 to 9, wherein the duration of the display time per sub-frame is the same.

11. An organic electroluminescent display panel, comprising: a plurality of pixel circuits according to any one of claims 1-6.

12. The organic electroluminescent display panel according to claim 11, wherein each of the light emitting modules in the pixel circuit belongs to a plurality of pixels adjacent in a row; or, each light emitting module in the pixel circuit belongs to a plurality of pixels adjacent in a row; or, each light-emitting module in the pixel circuit belongs to a plurality of pixels adjacent in columns and rows.

13. A display device characterized by comprising the organic electroluminescent display panel according to claim 11 or 12.

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CN107170408A - Pixel circuit, driving method, organic electroluminescent display panel and display device - Google Patents

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