CN109474260B - Digital adjustable oscillator - Google Patents
- ️Fri May 24 2024
CN109474260B - Digital adjustable oscillator - Google Patents
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- CN109474260B CN109474260B CN201910026783.3A CN201910026783A CN109474260B CN 109474260 B CN109474260 B CN 109474260B CN 201910026783 A CN201910026783 A CN 201910026783A CN 109474260 B CN109474260 B CN 109474260B Authority
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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Abstract
A digitally tunable oscillator is disclosed. The digitally tunable oscillator includes: the switch controls the array circuit and the multivibrator core circuit. The switch control array circuit is used for adjusting the overturning voltage of the inverter, the multivibrator core circuit is used for outputting square waves, so that the duty ratio of pulse waves is adjusted through the control array circuit, the effect of digital adjustability is achieved, and the adjustment of the duty ratio of the oscillator with high precision is achieved. The invention realizes the purpose of digital adjustability by using the novel method, and controls the duty ratio more efficiently and accurately. And the digital circuit is adopted to regulate the duty ratio, so that only a small chip area is occupied, and the cost is well saved while the technical problem is solved.
Description
Technical Field
The invention relates to an oscillator, belongs to the field of analog integrated circuits, and particularly relates to a digital adjustable oscillator.
Background
The generation of oscillators in circuits has been a development history for nearly a hundred years. During this period, along with the development of the semiconductor industry at home and abroad, oscillators have been gradually developed from the earliest electronic tubes and transistors to deep submicron or even nanometer level integrated components. As a kind of frequency source, oscillators play an irreplaceable role in various fields of electronics, communications, biotechnology, etc., and have a wide range of effects. Since the beginning of the development of radio, oscillators have become an important part of the received and transmitted signals, and can generate carrier voltages at high frequencies in the transmitter, and also as generators of mixing in the receiver. With the continued advancement of oscillator technology, oscillators are ubiquitous, from the clock generation of microprocessors to carrier synthesis in cellular telephones. Today, the CMOS analog integrated circuit design industry is evolving towards low voltage, low power consumption, high integration. The demand for wearable products is also increasing, the products will eventually develop in a thinner and longer-lasting direction, and the oscillator is used as a basic unit of the analog circuit, and the design of the oscillator is also a hot subject. A voltage-controlled oscillator (VCO) is an oscillator whose output frequency corresponds to an input control voltage, and whose frequency is a function of an input signal voltage, and whose operating state or element parameters of an oscillating circuit are controlled by the input control voltage, so that a voltage-controlled oscillator can be formed. The advantages of the voltage controlled oscillator are mainly: the frequency stability is good, the control sensitivity is high, the frequency modulation range is wide, the frequency offset and the control voltage form a linear relation, and the frequency offset and the control voltage are suitable for integration and the like. However, the duty ratio of the voltage-controlled oscillator is difficult to adjust, sometimes cannot be in a complete switching state, and the driving currents of the ring oscillator and the voltage-controlled oscillator are large, which is not suitable for an energy-saving circuit. Meanwhile, because the accuracy of the duty ratio of the voltage-controlled oscillator is not high, the output voltage of the voltage-controlled oscillator cannot achieve rail-to-rail, namely, the high level cannot reach the positive value of the power supply, the low level cannot reach the negative value of the power supply, and the overall working performance of the circuit is greatly influenced. How to reasonably solve the problem that the duty cycle of the existing oscillator is not easy to adjust is an important difficulty facing the person skilled in the art. The invention provides a digital adjustable oscillator, which realizes high-precision adjustment of the duty ratio of the oscillator by innovatively utilizing a digital circuit, occupies a small chip area, and well saves cost while solving the technical problem.
Disclosure of Invention
In view of one or more problems in the prior art, the invention provides a digital adjustable oscillator, which realizes high-precision adjustment of the duty ratio of the oscillator by using a digital circuit mode and efficiently solves the problem that the duty ratio of the existing oscillator is not easy to adjust.
A digitally tunable oscillator, comprising: the switching control array core circuit is used for adjusting the overturning voltage of the inverter, and the multivibrator core circuit is used for outputting square waves.
Wherein, switch control array core circuit includes:
The first NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the drain electrode of the second NMOS tube, the drain electrode is coupled to the drain electrode of the first PMOS tube, and the grid electrode is coupled to the first positive power supply end or a negative power supply end;
the second NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the first negative power end, the drain electrode is coupled to the source electrode of the first NMOS tube, and the grid electrode is coupled to the first end of the first diode, the grid electrode of the first PMOS tube and the grid electrode of the third NMOS tube;
The first PMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the first positive power supply end, the drain electrode is coupled to the drain electrode of the first NMOS tube, and the grid electrode is coupled to the grid electrode of the third NMOS tube, the grid electrode of the second NMOS tube and the input end of the second inverter;
the third NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the grid electrode is coupled to the grid electrode of the first PMOS tube and the grid electrode of the second NMOS tube, the source electrode is coupled to the first negative power end, and the drain electrode is coupled to the drain electrode of the first PMOS tube and the input end of the second inverter.
Multivibrator core circuit comprising:
The first inverter is provided with an input end, an output end, a positive power supply end and a negative power supply end, wherein the input end of the first inverter is coupled to the first end of the first resistor and the first end of the second capacitor;
A first resistor having a first end and a second end, the first end of the first resistor is coupled to the input end of the first inverter, and the second end of the first resistor is coupled to the first end of the first capacitor and the output end of the first inverter;
A first capacitor having a first end and a second end, the first end of the first capacitor is coupled to the output end of the first inverter, and the second end of the first capacitor is coupled to the first end of the second resistor and the first end of the first diode;
a second resistor having a first end and a second end, the first end of the second resistor is coupled to the second end of the first capacitor, and the second end of the second resistor is coupled to the input end of the second inverter;
The second inverter is provided with an input end, an output end, a positive power supply end and a negative power supply end, the input end of the second inverter is coupled to the second end of the second resistor and the second end of the second capacitor, the positive power supply end is coupled to the first positive power supply, and the negative power supply end is coupled to the first negative power supply end;
A second capacitor having a first end coupled to the input of the first inverter and a second end coupled to the first end of the second diode and the second end of the second resistor;
a first diode having a first terminal coupled to the second terminal of the first capacitor and a second terminal coupled to the first negative power terminal;
the second diode has a first end and a second end, the first end of the second diode is coupled to the second end of the second capacitor, and the second end of the second diode is coupled to the first negative power supply end.
Meanwhile, the first negative power terminal mentioned above is coupled to the ground, and the first positive power terminal mentioned above is coupled to the power source.
Meanwhile, the switch control array core circuit is characterized in that:
The transistors connected in parallel with the second NMOS tube in the switch control array core circuit are NMOS tubes, and the second NMOS tube and the NMOS tube connected in parallel with the second NMOS tube are used as input tubes;
the transistors connected in parallel with the first NMOS tube in the switch control array core circuit are NMOS tubes, and the first NMOS tube and the NMOS tube connected in parallel with the first NMOS tube are used as gating switch tubes.
The grid electrode of the first NMOS tube is coupled to the first positive power supply end or a negative power supply end, when the grid electrode of the first NMOS tube is coupled to the first positive power supply end, the gating switch tube works, the switch control array starts to work, and when the grid electrode of the first NMOS tube is coupled to the first negative power supply end, the gating switch tube is turned off, and the switch control array stops working.
In the switch control array core circuit, the operation of gating a plurality of switch tubes is equal to the parallel connection of a plurality of NMOS tubes serving as input, namely, the parallel connection of a plurality of input tubes.
Meanwhile, a first inverter (I1) and a switch control array core circuit in the multivibrator core circuit form two basic NOT gates of the monosymmetric multivibrator, the width-to-length ratio of the switch control array core circuit is adjusted, the overturning voltage of the inverter is adjusted, the duty ratio of an output waveform is controlled, the resistance value of a first resistor (R1) of a feedback resistor is equal to that of a second resistor (R2), the value of a first capacitor (C1) is equal to that of a second capacitor (C2), the oscillation period of the multivibrator is determined together, the second inverter (I2) is used as an output buffer, and rectangular square waves generated by the oscillator are shaped and denoised.
The digital adjustable oscillator provided by the invention has the advantages that the switch control array core circuit is used for adjusting the overturning voltage of the inverter, the multivibrator core circuit is used for outputting square waves, the duty ratio of pulse waves can be adjusted through the switch control array core circuit, the effect of the digital adjustable oscillator is achieved, the technical problem that the precision control capability of the oscillator is not high in the current technical field is solved, the purpose of digital adjustment is achieved by the novel method, and the control of the duty ratio is more efficient and accurate. And the digital circuit is adopted to regulate the duty ratio, so that only a small chip area is occupied, and the cost is well saved while the technical problem is solved.
Drawings
Specific embodiments of the present invention will be described in detail below with reference to the drawings, wherein like reference numerals refer to like parts or features.
FIG. 1 shows a schematic circuit diagram of a multi-harmonic oscillator;
fig. 2 shows a schematic diagram of a digitally tunable duty cycle multivibrator circuit according to one embodiment of the invention.
Detailed Description
The particular embodiments described below represent exemplary embodiments of the present invention and are merely exemplary in nature and not limiting. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that: these specific details are not necessary for the invention. In other instances, well-known circuits, materials, or methods have not been described in detail in order not to obscure the invention.
Reference in the specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not all referring to the same embodiment, nor are other embodiments or alternative embodiments mutually exclusive. All of the features disclosed in this specification, or all of the steps in a method or process disclosed, may be combined in any combination, except for mutually exclusive features and/or steps. Moreover, those of ordinary skill in the art will appreciate that the illustrations provided herein are for illustrative purposes and that the illustrations are not necessarily drawn to scale. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements present. Like reference numerals designate like elements. When an element is said to "receive" a signal, it may be directly received, or may be received through a switch, a resistor, a level shifter, a signal processing unit, or the like. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Fig. 1 shows a schematic circuit diagram of a multi-harmonic oscillator, and after the circuit is powered up, if u I1 increases in voltage in an initial state, the following positive feedback process is caused:
uI1↑→uo2↓→uI2↓→uo2↑→uI1↑ (1)
In the process, u O1 is quickly changed to low level, u O2 is changed to high level, and the circuit enters transient 1. After this, since u o2 is higher than u I2, capacitor C2 charges capacitor C1 through resistor R2, while u I1 decreases due to discharging of C2. Because the charging time constant is smaller than the discharging realization constant, the charging speed is faster than the discharging speed, u I1 reaches the threshold voltage of G2 to cause G2 to turn over, and the following positive feedback process is caused, and the circuit enters transient 2.
uI2↑→uo1↓→uI1↓→uo1↑→uI2↑ (2)
Thereafter C1 discharges and C2 charges, causing u I1 to rise further, triggering the positive feedback process of equation (1), and the circuit reverts back to transient 1. In this way, the circuit repeatedly cycles through transitions 1 and 2, thereby producing a rectangular pulse output.
According to the waveform analysis of the multivibrator, the oscillation frequency of the oscillator is related to two transients, and the two tentative settling times are determined by the charge and discharge times of the capacitors C1 and C2. Let the time of transient 1 of the oscillator be T1 and the time of transient 2 be T2.u I1 rises from-0.5V to the NOT threshold voltage for a time T1. Similarly, T2 is the time for u I2 to drop from +0.5V to the NOT threshold voltage.
According to the calculation formula of the charging and discharging process of the RC circuit:
the calculation formula of the charge and discharge time of the RC circuit is as follows:
Where τ is a time constant, τ=rc
At the moment the capacitor starts to charge, there is uc (t 0) = -0.7V, after the charging is completed and the steady state is entered, regarded as u c% infinity) =vdd. When the inverter MOS transistor is completely symmetrical, the final value u c(t0)＝uth =vdd/2 after the capacitor is charged can be considered. From the above conditions, the time for maintaining transient 1 can be known
Similarly, the maintenance time of transient 2 is known as:
and (3) synthesizing formulas (5) and (6), wherein the oscillation period of the oscillator is as follows:
T＝T1+T2＝1.4RC (7)
The oscillation frequency is the inverse of the oscillation period, and then the oscillation frequency is:
for the inverter in the multivibrator, when the PMOS tube and the NMOS tube are symmetrical, the inversion voltage of the inverter is generally regarded as VDD/2, and the NMOS tube and the PMOS tube work in a saturation region. For the MOS in the saturation region, the I-V characteristic equation is
When the input voltage of the inverter is just equal to the flip voltage, the NMOS and the PMOS both work in the saturation region, at the moment, the two tubes are both conducted, and the drain-source current I D is maximum. Under the condition that I D is fixed, according to the formula (9), the width-to-length ratio of the MOS tube is inversely proportional to the overdrive voltage. Thus, the inverting voltage of the inverter can be changed by adjusting the width-to-length ratio of the tube.
The invention provides an oscillator, which aims to solve the problem that the duty ratio of the existing oscillator is not easy to adjust.
To achieve the above-described idea, the present invention provides a digitally tunable oscillator, and fig. 2 shows a schematic diagram of a digitally tunable duty cycle multivibrator circuit according to one embodiment of the present invention. The digitally tunable oscillator includes: the switching control array core circuit is used for adjusting the overturning voltage of the inverter, and the multivibrator core circuit is used for outputting square waves.
Wherein, switch control array core circuit includes:
The first NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the drain electrode of the second NMOS tube, the drain electrode is coupled to the drain electrode of the first PMOS tube, and the grid electrode is coupled to the first positive power supply end or a negative power supply end;
the second NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the first negative power end, the drain electrode is coupled to the source electrode of the first NMOS tube, and the grid electrode is coupled to the first end of the first diode, the grid electrode of the first PMOS tube and the grid electrode of the third NMOS tube;
The first PMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the first positive power supply end, the drain electrode is coupled to the drain electrode of the first NMOS tube, and the grid electrode is coupled to the grid electrode of the third NMOS tube, the grid electrode of the second NMOS tube and the input end of the second inverter;
the third NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the grid electrode is coupled to the grid electrode of the first PMOS tube and the grid electrode of the second NMOS tube, the source electrode is coupled to the first negative power end, and the drain electrode is coupled to the drain electrode of the first PMOS tube and the input end of the second inverter.
Multivibrator core circuit comprising:
The first inverter is provided with an input end, an output end, a positive power supply end and a negative power supply end, wherein the input end of the first inverter is coupled to the first end of the first resistor and the first end of the second capacitor;
A first resistor having a first end and a second end, the first end of the first resistor is coupled to the input end of the first inverter, and the second end of the first resistor is coupled to the first end of the first capacitor and the output end of the first inverter;
A first capacitor having a first end and a second end, the first end of the first capacitor is coupled to the output end of the first inverter, and the second end of the first capacitor is coupled to the first end of the second resistor and the first end of the first diode;
a second resistor having a first end and a second end, the first end of the second resistor is coupled to the second end of the first capacitor, and the second end of the second resistor is coupled to the input end of the second inverter;
The second inverter is provided with an input end, an output end, a positive power supply end and a negative power supply end, the input end of the second inverter is coupled to the second end of the second resistor and the second end of the second capacitor, the positive power supply end is coupled to the first positive power supply, and the negative power supply end is coupled to the first negative power supply end;
A second capacitor having a first end coupled to the input of the first inverter and a second end coupled to the first end of the second diode and the second end of the second resistor;
a first diode having a first terminal coupled to the second terminal of the first capacitor and a second terminal coupled to the first negative power terminal;
the second diode has a first end and a second end, the first end of the second diode is coupled to the second end of the second capacitor, and the second end of the second diode is coupled to the first negative power supply end.
Meanwhile, the first negative power terminal mentioned above is coupled to the ground, and the first positive power terminal mentioned above is coupled to the power source.
Meanwhile, the switch control array core circuit is characterized in that:
The transistors connected in parallel with the second NMOS tube in the switch control array core circuit are NMOS tubes, and the second NMOS tube and the NMOS tube connected in parallel with the second NMOS tube are used as input tubes;
the transistors connected in parallel with the first NMOS tube in the switch control array core circuit are NMOS tubes, and the first NMOS tube and the NMOS tube connected in parallel with the first NMOS tube are used as gating switch tubes.
The grid electrode of the first NMOS tube is coupled to the first positive power supply end or a negative power supply end, when the grid electrode of the first NMOS tube is coupled to the first positive power supply end, the gating switch tube works, the switch control array starts to work, and when the grid electrode of the first NMOS tube is coupled to the first negative power supply end, the gating switch tube is turned off, and the switch control array stops working.
In the switch control array core circuit, the operation of gating a plurality of switch tubes is equal to the parallel connection of a plurality of NMOS tubes serving as input, namely, the parallel connection of a plurality of input tubes.
Meanwhile, the multivibrator core circuit is characterized in that:
The first inverter (I1) and the switch control array core circuit form two basic NOT gates of the single-symmetrical multivibrator, the width-to-length ratio of the switch control array core circuit is adjusted, the overturning voltage of the inverter is adjusted, the duty ratio of an output waveform is controlled, the resistance value of a first resistor (R1) of the feedback resistor is equal to that of a second resistor (R2), the value of a first capacitor (C1) is equal to that of a second capacitor (C2), the oscillation period of the multivibrator is determined jointly, the second inverter (I2) is used as an output buffer, and rectangular square waves generated by the oscillator are shaped and denoised.
The first diode (D1) and the second diode (D2) are parasitic diodes generated by process problems, and are reversely biased and grounded. The switch control array core circuit controls the conduction of the input NMOS tube by controlling the gating switch NMOS tube, so that the width-to-length ratio of the first PMOS tube PMOS1 and the third NMOS tube NMOS3 is changed to change the duty ratio of the output waveform of the oscillator.
The use of the terms "a," "an," and the like in this disclosure do not exclude a plurality. The terms "first," "second," and the like herein merely denote the order of appearance in the description of the embodiments, in order to distinguish one element from another. The presence of "first" and "second" in the claims is only for the purpose of facilitating a quick understanding of the claims and is not intended to be limiting. Any reference signs in the claims shall not be construed as limiting the scope.
The foregoing description of the embodiments has been provided for the purpose of illustrating the general principles of the invention, and is not meant to limit the invention thereto, but to limit the invention thereto, and any modifications, equivalents, improvements and equivalents thereof may be made without departing from the spirit and principles of the invention.
Claims (7)
1. A digitally tunable oscillator, comprising: the switching control array core circuit is used for adjusting the overturning voltage of the inverter, and the multivibrator core circuit is used for outputting square waves;
The switch control array core circuit comprises:
The first NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the drain electrode of the second NMOS tube, the drain electrode is coupled to the drain electrode of the first PMOS tube, and the grid electrode is coupled to the first positive power supply end or a negative power supply end;
the second NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the first negative power end, the drain electrode is coupled to the source electrode of the first NMOS tube, and the grid electrode is coupled to the first end of the first diode, the grid electrode of the first PMOS tube and the grid electrode of the third NMOS tube;
The first PMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the source electrode is coupled to the first positive power supply end, the drain electrode is coupled to the drain electrode of the first NMOS tube, and the grid electrode is coupled to the grid electrode of the third NMOS tube, the grid electrode of the second NMOS tube and the input end of the second inverter;
The third NMOS tube is provided with a grid electrode, a source electrode and a drain electrode, wherein the grid electrode is coupled to the grid electrode of the first PMOS tube and the grid electrode of the second NMOS tube, the source electrode is coupled to the first negative power supply end, and the drain electrode is coupled to the drain electrode of the first PMOS tube and the input end of the second inverter;
The multivibrator core circuit comprises:
The first inverter is provided with an input end, an output end, a positive power supply end and a negative power supply end, wherein the input end of the first inverter is coupled to the first end of the first resistor and the first end of the second capacitor;
A first resistor having a first end and a second end, the first end of the first resistor is coupled to the input end of the first inverter, and the second end of the first resistor is coupled to the first end of the first capacitor and the output end of the first inverter;
A first capacitor having a first end and a second end, the first end of the first capacitor is coupled to the output end of the first inverter, and the second end of the first capacitor is coupled to the first end of the second resistor and the first end of the first diode;
a second resistor having a first end and a second end, the first end of the second resistor is coupled to the second end of the first capacitor, and the second end of the second resistor is coupled to the input end of the second inverter;
The second inverter is provided with an input end, an output end, a positive power supply end and a negative power supply end, the input end of the second inverter is coupled to the second end of the second resistor and the second end of the second capacitor, the positive power supply end is coupled to the first positive power supply, and the negative power supply end is coupled to the first negative power supply end;
A second capacitor having a first end coupled to the input of the first inverter and a second end coupled to the first end of the second diode and the second end of the second resistor;
a first diode having a first terminal coupled to the second terminal of the first capacitor and a second terminal coupled to the first negative power terminal;
the second diode has a first end and a second end, the first end of the second diode is coupled to the second end of the second capacitor, and the second end of the second diode is coupled to the first negative power supply end.
2. The digitally tunable oscillator of claim 1, wherein the first negative power terminal is coupled to ground and the first positive power terminal is coupled to a power supply.
3. A digitally tunable oscillator according to claim 2, wherein,
The transistors connected in parallel with the second NMOS tube in the switch control array core circuit are NMOS tubes, and the second NMOS tube and the NMOS tube connected in parallel with the second NMOS tube are used as input tubes;
the transistors connected in parallel with the first NMOS tube in the switch control array core circuit are NMOS tubes, and the first NMOS tube and the NMOS tube connected in parallel with the first NMOS tube are used as gating switch tubes.
4. The digitally tunable oscillator of claim 2, wherein the gate of the first NMOS transistor is coupled to the first positive power terminal or a negative power terminal, the gate switch transistor is turned on when the gate of the first NMOS transistor is coupled to the first positive power terminal, the switch control array is turned on, and the gate switch transistor is turned off when the gate of the first NMOS transistor is coupled to the first negative power terminal, the switch control array is turned off.
5. A digitally tunable oscillator according to claim 2, wherein the switching control array core circuit is operable by gating a plurality of switching transistors to equal a plurality of NMOS transistors serving as inputs in parallel, i.e. to equal a plurality of input transistors in parallel.
6. A digitally tunable oscillator according to claim 2, wherein the multivibrator core circuit:
The first resistor and the second resistor are used as feedback resistors, the resistance value of the first resistor is equal to that of the second resistor, the capacitance value of the first capacitor is equal to that of the second capacitor, and the oscillation period of the multivibrator is determined by the first resistor, the second resistor, the first capacitor and the second capacitor together.
7. A digitally tunable oscillator according to claim 2, wherein the second inverter in the multivibrator core circuit acts as an output buffer to shape and denoise a rectangular square wave generated by the oscillator.
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