CN113810030B - Pulse width modulation detection circuit and method for power saving and noise immunity - Google Patents

The invention discloses a pulse width modulation detection circuit and a method for saving electricity and resisting noise. The second circuit is coupled between the first circuit and the output circuit. When the first circuit receives the PWM signal, the first circuit generates a current sampling result by asynchronous sampling to the time when the PWM signal is at a high level, and compares the current sampling result with at least one previous sampling result to generate a comparison result. The comparison result is related to whether the time when the pwm signal is at the high level is changed. The second circuit is controlled by the first circuit to selectively calculate a current duty cycle value or an on-going duty cycle value according to the comparison result and the current sampling result. The output circuit generates an output current according to the current duty cycle value or the previous duty cycle value provided by the second circuit.

用以省电及抗噪声的脉宽调变侦测电路及方法Pulse width modulation detection circuit and method for power saving and noise resistance

技术领域Technical Field

本发明与脉宽调变(Pulse-width modulation,PWM)技术有关，尤其是关于一种用以省电及抗噪声的脉宽调变侦测电路及方法。The present invention relates to pulse-width modulation (PWM) technology, and more particularly to a PWM detection circuit and method for power saving and noise resistance.

背景技术Background technique

在现有技术中，一般常见的省电作法是通过输出迟滞(Input hysteresis)单元计算脉宽调变信号的连续两个工作周期(Duty cycle)的长度差异并设定一阈值。当两个工作周期的长度差异大于阈值时，则判定两个工作周期不同，因此，仍继续进行后续的正常运算程序直至产生输出电流为止；当两个工作周期的长度差异小于阈值时，则判定两个工作周期相同，因此，后续的运算程序将会停止并直接沿用先前的工作周期值，以达到省电效果。In the prior art, a common power saving method is to calculate the length difference between two consecutive duty cycles of the PWM signal through an input hysteresis unit and set a threshold. When the length difference between the two duty cycles is greater than the threshold, the two duty cycles are determined to be different, so the subsequent normal operation process continues until the output current is generated; when the length difference between the two duty cycles is less than the threshold, the two duty cycles are determined to be the same, so the subsequent operation process will stop and directly use the previous duty cycle value to achieve power saving effect.

然而，当输入的脉宽调变信号的工作周期值愈大时，脉宽调变信号所产生的抖动也愈大，其造成的噪声也更加严重而难以有效滤除，亟待改善。However, when the duty cycle of the input PWM signal is larger, the jitter generated by the PWM signal is also larger, and the noise caused by it is also more serious and difficult to filter out effectively, which needs to be improved urgently.

发明内容Summary of the invention

有鉴于此，本发明提出一种用以省电及抗噪声的脉宽调变侦测电路及方法，以有效解决现有技术所遭遇到的上述问题。In view of this, the present invention proposes a pulse width modulation detection circuit and method for saving power and resisting noise, so as to effectively solve the above problems encountered in the prior art.

依据本发明的一具体实施例为一种脉宽调变侦测电路。于此实施例中，脉宽调变侦测电路能同时兼顾省电及抗噪声的功效。脉宽调变侦测电路包含第一电路、第二电路及输出电路。第二电路耦接于第一电路与输出电路之间。当第一电路接收到输入的脉宽调变信号时，第一电路以非同步取样到脉宽调变信号位于高位准的时间而产生目前取样结果，并比较目前取样结果与至少一先前取样结果以产生比较结果。其中，比较结果与脉宽调变信号位于高位准的时间是否改变有关。第二电路受控于第一电路而根据比较结果选择性地以目前取样结果计算目前工作周期值或沿用先前工作周期值。输出电路根据第二电路所提供的目前工作周期值或先前工作周期值产生输出电流。According to a specific embodiment of the present invention, a pulse width modulation detection circuit is provided. In this embodiment, the pulse width modulation detection circuit can take into account both power saving and anti-noise effects. The pulse width modulation detection circuit includes a first circuit, a second circuit and an output circuit. The second circuit is coupled between the first circuit and the output circuit. When the first circuit receives an input pulse width modulation signal, the first circuit generates a current sampling result by asynchronously sampling the time when the pulse width modulation signal is at a high level, and compares the current sampling result with at least one previous sampling result to generate a comparison result. Among them, the comparison result is related to whether the time when the pulse width modulation signal is at a high level changes. The second circuit is controlled by the first circuit and selectively calculates the current working cycle value with the current sampling result or uses the previous working cycle value according to the comparison result. The output circuit generates an output current according to the current working cycle value or the previous working cycle value provided by the second circuit.

于一实施例中，第一电路包含取样单元，用以对脉宽调变信号位于高位准的时间进行非同步取样，以产生目前取样结果。In one embodiment, the first circuit includes a sampling unit for asynchronously sampling the time when the PWM signal is at a high level to generate a current sampling result.

于一实施例中，第一电路包含比较单元，用以比较目前取样结果与至少一先前取样结果，以产生比较结果。In one embodiment, the first circuit includes a comparison unit for comparing a current sampling result with at least one previous sampling result to generate a comparison result.

于一实施例中，第一电路包含切换单元，耦接第二电路，用以根据比较结果产生控制信号至第二电路，以控制第二电路的运作。In one embodiment, the first circuit includes a switching unit coupled to the second circuit for generating a control signal to the second circuit according to a comparison result to control the operation of the second circuit.

于一实施例中，第一电路还包含去噪声单元，耦接比较单元，用以根据频率设定一调整阈值，并以先前工作周期值调整该调整阈值后提供给比较单元，由以判断脉宽调变信号位于高位准的时间是否改变。In one embodiment, the first circuit further includes a noise removal unit coupled to the comparison unit for setting an adjustment threshold according to the frequency, and adjusting the adjustment threshold with a previous duty cycle value and providing it to the comparison unit to determine whether the time when the PWM signal is at a high level changes.

于一实施例中，第一电路包含去噪声单元。去噪声单元用以记录多个先前工作周期值。若该多个先前工作周期值中的两两先前工作周期值之间的振幅小于一调整阈值，则第一电路判定脉宽调变信号位于高位准的时间有改变。In one embodiment, the first circuit includes a noise removal unit. The noise removal unit is used to record a plurality of previous duty cycle values. If the amplitude between two of the plurality of previous duty cycle values is less than an adjustment threshold, the first circuit determines that the time when the PWM signal is at a high level has changed.

于一实施例中，第一电路包含去噪声单元。去噪声单元用以记录多个先前工作周期值并根据该多个先前工作周期值中的两两先前工作周期值的平均差编码为一工作周期变化轮廓(Profile)。若工作周期变化轮廓的跳变次数为1且工作周期变化轮廓符合一特定轮廓，则第一电路判定脉宽调变信号位于高位准的时间有改变。In one embodiment, the first circuit includes a noise removal unit. The noise removal unit is used to record a plurality of previous duty cycle values and encode a duty cycle variation profile according to an average difference between two of the plurality of previous duty cycle values. If the number of jumps of the duty cycle variation profile is 1 and the duty cycle variation profile meets a specific profile, the first circuit determines that the time when the pulse width modulation signal is at a high level has changed.

于一实施例中，当比较结果为脉宽调变信号位于高位准的时间未改变时，第二电路沿用先前工作周期值。In one embodiment, when the comparison result is that the time during which the PWM signal is at a high level does not change, the second circuit continues to use the previous duty cycle value.

于一实施例中，当比较结果为脉宽调变信号位于高位准的时间有改变时，第二电路根据目前取样结果计算目前工作周期值。In one embodiment, when the comparison result is that the time during which the PWM signal is at a high level has changed, the second circuit calculates the current duty cycle value according to the current sampling result.

于一实施例中，第二电路包含判断单元及运算单元。判断单元耦接于第一电路与运算单元之间，用以受控于第一电路而判断计算是否需进行。运算单元耦接于判断单元与输出电路之间，用以根据判断单元的判断结果选择性地根据目前取样结果计算目前工作周期值或沿用先前工作周期值。In one embodiment, the second circuit includes a judgment unit and a calculation unit. The judgment unit is coupled between the first circuit and the calculation unit, and is used to be controlled by the first circuit to judge whether the calculation needs to be performed. The calculation unit is coupled between the judgment unit and the output circuit, and is used to selectively calculate the current working cycle value according to the current sampling result or continue to use the previous working cycle value according to the judgment result of the judgment unit.

于一实施例中，输出电路包含输出迟滞单元及数字模拟转换单元。输出迟滞单元耦接于第二电路与数字模拟转换单元之间，用以根据第二电路所提供的目前工作周期值或先前工作周期值产生输出迟滞信号。数字模拟转换单元耦接输出迟滞单元，用以根据输出迟滞信号产生输出电流。In one embodiment, the output circuit includes an output hysteresis unit and a digital-to-analog conversion unit. The output hysteresis unit is coupled between the second circuit and the digital-to-analog conversion unit to generate an output hysteresis signal according to a current duty cycle value or a previous duty cycle value provided by the second circuit. The digital-to-analog conversion unit is coupled to the output hysteresis unit to generate an output current according to the output hysteresis signal.

依据本发明的另一具体实施例为一种脉宽调变侦测方法。于此实施例中，脉宽调变侦测方法应用于脉宽调变侦测电路且能同时兼顾省电及抗噪声的功效。脉宽调变侦测电路包含第一电路、第二电路及输出电路。第二电路耦接于第一电路与输出电路之间。脉宽调变侦测方法包含下列步骤：Another specific embodiment of the present invention is a pulse width modulation detection method. In this embodiment, the pulse width modulation detection method is applied to a pulse width modulation detection circuit and can simultaneously take into account the effects of power saving and noise resistance. The pulse width modulation detection circuit includes a first circuit, a second circuit and an output circuit. The second circuit is coupled between the first circuit and the output circuit. The pulse width modulation detection method includes the following steps:

步骤(a)：当第一电路接收到输入的脉宽调变信号时，第一电路以非同步取样到脉宽调变信号位于高位准的时间而产生目前取样结果；Step (a): When the first circuit receives the input pulse width modulation signal, the first circuit asynchronously samples the time when the pulse width modulation signal is at a high level to generate a current sampling result;

步骤(b)：第一电路比较目前取样结果与至少一先前取样结果以产生比较结果，其中比较结果与脉宽调变信号位于高位准的时间是否改变有关；Step (b): the first circuit compares the current sampling result with at least one previous sampling result to generate a comparison result, wherein the comparison result is related to whether the time during which the PWM signal is at a high level changes;

步骤(c)：第二电路受控于第一电路而根据比较结果选择性地以目前取样结果计算目前工作周期值或沿用先前工作周期值；以及Step (c): the second circuit is controlled by the first circuit and selectively calculates the current duty cycle value with the current sampling result or continues to use the previous duty cycle value according to the comparison result; and

步骤(d)：输出电路根据第二电路所提供的目前工作周期值或先前工作周期值产生输出电流。Step (d): the output circuit generates an output current according to the current duty cycle value or the previous duty cycle value provided by the second circuit.

于一实施例中，所述的脉宽调变侦测方法还包含：该第一电路根据该比较结果产生一控制信号至该第二电路，以控制该第二电路的运作。In one embodiment, the PWM detection method further includes: the first circuit generates a control signal to the second circuit according to the comparison result to control the operation of the second circuit.

于一实施例中，所述的脉宽调变侦测方法还包含：根据频率设定一调整阈值，并以该先前工作周期值调整该调整阈值，以判断该脉宽调变信号位于高位准的时间是否改变。In one embodiment, the PWM detection method further includes: setting an adjustment threshold according to the frequency, and adjusting the adjustment threshold with the previous duty cycle value to determine whether the time during which the PWM signal is at a high level changes.

于一实施例中，所述的脉宽调变侦测方法还包含：记录多个先前工作周期值，若该多个先前工作周期值中的两两先前工作周期值之间的振幅小于一调整阈值，则判定该脉宽调变信号位于高位准的时间有改变。In one embodiment, the PWM detection method further comprises: recording a plurality of previous duty cycle values, and if the amplitude between any two of the plurality of previous duty cycle values is less than an adjustment threshold, determining that the time during which the PWM signal is at a high level has changed.

于一实施例中，所述的脉宽调变侦测方法还包含：记录多个先前工作周期值并根据该多个先前工作周期值中的两两先前工作周期值的平均差编码为一工作周期变化轮廓，若该工作周期变化轮廓的跳变次数为1且该工作周期变化轮廓符合一特定轮廓，则判定该脉宽调变信号位于高位准的时间有改变。In one embodiment, the pulse width modulation detection method further includes: recording multiple previous working cycle values and encoding them into a working cycle change profile based on the average difference between any two of the multiple previous working cycle values; if the number of jumps of the working cycle change profile is 1 and the working cycle change profile conforms to a specific profile, it is determined that the time that the pulse width modulation signal is at a high level has changed.

于一实施例中，当该比较结果为该脉宽调变信号位于高位准的时间未改变时，步骤(c)中的该第二电路沿用该先前工作周期值。In one embodiment, when the comparison result is that the time during which the PWM signal is at a high level does not change, the second circuit in step (c) continues to use the previous duty cycle value.

于一实施例中，当该比较结果为该脉宽调变信号位于高位准的时间有改变时，步骤(c)中的该第二电路根据该目前取样结果计算该目前工作周期值。In one embodiment, when the comparison result is that the time during which the PWM signal is at a high level has changed, the second circuit in step (c) calculates the current duty cycle value according to the current sampling result.

于一实施例中，步骤(c)包含：(c1)受控于该第一电路而判断后续运算程序是否需进行；以及(c2)根据步骤(c1)的判断结果选择性地根据该目前取样结果计算该目前工作周期值或沿用该先前工作周期值。In one embodiment, step (c) includes: (c1) being controlled by the first circuit to determine whether a subsequent operation procedure needs to be performed; and (c2) selectively calculating the current duty cycle value based on the current sampling result or continuing to use the previous duty cycle value based on the determination result of step (c1).

于一实施例中，步骤(d)包含：(d1)根据该第二电路所提供的该目前工作周期值或该先前工作周期值产生一输出迟滞信号；以及(d2)根据该输出迟滞信号产生该输出电流。In one embodiment, step (d) includes: (d1) generating an output hysteresis signal according to the current duty cycle value or the previous duty cycle value provided by the second circuit; and (d2) generating the output current according to the output hysteresis signal.

相较于现有技术，根据本发明的脉宽调变侦测电路及方法能够同时兼顾省电及抗噪声的功效，在根据脉宽调变信号的目前取样结果与至少一先前取样结果的比较结果判定脉宽调变信号位于高位准的时间不变时，停止后续的正常运算程序而直接沿用先前的工作周期值，以达到省电效果，即使在输入的脉宽调变信号的工作周期值变大而产生较剧烈的抖动时，根据本发明的脉宽调变侦测电路及方法仍可有效消除脉宽调变信号抖动所造成的噪声。Compared with the prior art, the PWM detection circuit and method according to the present invention can take into account both power saving and noise resistance. When it is determined that the time when the PWM signal is at a high level remains unchanged based on the comparison result of the current sampling result of the PWM signal with at least one previous sampling result, the subsequent normal operation program is stopped and the previous duty cycle value is directly used to achieve power saving. Even when the duty cycle value of the input PWM signal increases and generates more severe jitter, the PWM detection circuit and method according to the present invention can still effectively eliminate the noise caused by the jitter of the PWM signal.

关于本发明的优点与精神可以通过以下的发明详述及所附附图得到进一步的了解。The advantages and spirit of the present invention can be further understood through the following detailed description of the invention and the attached drawings.

附图说明BRIEF DESCRIPTION OF THE DRAWINGS

图1为根据本发明的一较佳具体实施例中的脉宽调变侦测电路的功能方块图。FIG. 1 is a functional block diagram of a pulse width modulation detection circuit according to a preferred embodiment of the present invention.

图2为根据本发明的另一较佳具体实施例中的脉宽调变侦测电路的功能方块图。FIG. 2 is a functional block diagram of a pulse width modulation detection circuit according to another preferred embodiment of the present invention.

图3为根据本发明的另一较佳具体实施例中的脉宽调变侦测方法的流程图。FIG. 3 is a flow chart of a pulse width modulation detection method according to another preferred embodiment of the present invention.

主要元件符号说明：Description of main component symbols:

S10～S16 步骤Steps S10 to S16

1 脉宽调变侦测电路1 PWM detection circuit

10 第一电路10 First Circuit

12 第二电路12 Second Circuit

14 输出电路14 Output Circuit

PWM 脉宽调变信号PWM pulse width modulation signal

CSR 目前取样结果CSR Current Sampling Results

PSR 先前取样结果PSR Previous Sampling Results

CR 比较结果CR comparison results

SS 控制信号SS control signal

CDV 目前工作周期值CDV Current duty cycle value

PDV 先前工作周期值PDV Previous duty cycle value

IOUT 输出电流IOUT Output current

100 取样单元100 Sampling Units

102 去噪声单元102 De-noising Unit

104 比较单元104 Comparison Unit

106 切换单元106 Switching Unit

MF 调整阈值MF Adjustment Threshold

1020 设定器1020 Setting tool

1022 调整器1022 Regulator

1024 多工器1024 Multiplexer

120 判断单元120 Judgment Unit

122 运算单元122 Arithmetic Unit

140 输出迟滞单元140 Output hysteresis unit

142 数字模拟转换单元142 Digital to Analog Conversion Unit

HY 输出迟滞信号HY output hysteresis signal

102’ 去噪声单元102’ Noise Removal Unit

PDV1～PDVN 先前工作周期值PDV1～PDVN Previous working cycle value

DP 工作周期变化轮廓DP duty cycle variation profile

1020’ 记录器1020’ Recorder

1022’ 编码器1022’ encoder

1024’ 多工器1024’ Multiplexer

具体实施方式Detailed ways

现在将详细参考本发明的示范性实施例，并在附图中说明所述示范性实施例的实例。在附图及实施方式中所使用相同或类似标号的元件/构件是用来代表相同或类似部分。Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Elements/components using the same or similar reference numerals in the drawings and embodiments are intended to represent the same or similar parts.

依据本发明的一具体实施例为一种脉宽调变侦测电路。于此实施例中，脉宽调变侦测电路能同时兼顾省电及抗噪声的功效。请参照图1，图1为此实施例的脉宽调变侦测电路的功能方块图。According to a specific embodiment of the present invention, a pulse width modulation detection circuit is provided. In this embodiment, the pulse width modulation detection circuit can simultaneously take into account the effects of power saving and noise resistance. Please refer to FIG. 1, which is a functional block diagram of the pulse width modulation detection circuit of this embodiment.

如图1所示，脉宽调变侦测电路1包含第一电路10、第二电路12及输出电路14。第二电路12耦接于第一电路10与输出电路14之间。As shown in FIG1 , the PWM detection circuit 1 includes a first circuit 10 , a second circuit 12 and an output circuit 14 . The second circuit 12 is coupled between the first circuit 10 and the output circuit 14 .

当第一电路10接收到输入的脉宽调变信号PWM时，第一电路10会以非同步取样(Asynchronous sampling)的方式对输入的脉宽调变信号PWM进行取样，以取样得到脉宽调变信号位于高位准(High-level)的时间，并据以产生一目前取样结果CSR。When the first circuit 10 receives the input PWM signal PWM, the first circuit 10 samples the input PWM signal PWM in an asynchronous sampling manner to obtain the time when the PWM signal is at a high level, and generates a current sampling result CSR accordingly.

接着，第一电路10还会比较目前取样结果CSR与至少一先前取样结果PSR，以产生一比较结果CR至第二电路12。此外，第一电路10还会根据比较结果CR产生一控制信号SS至第二电路12。其中，比较结果CR与脉宽调变信号PWM位于高位准的时间是否改变有关。Next, the first circuit 10 further compares the current sampling result CSR with at least one previous sampling result PSR to generate a comparison result CR to the second circuit 12. In addition, the first circuit 10 further generates a control signal SS to the second circuit 12 according to the comparison result CR. The comparison result CR is related to whether the time when the pulse width modulation signal PWM is at a high level changes.

第二电路12受控于第一电路10的控制信号SS而根据比较结果CR选择性地以目前取样结果CSR计算一目前工作周期值CDV或沿用一先前工作周期值PDV，并输出目前工作周期值CDV或先前工作周期值PDV至输出电路14。输出电路14再根据第二电路12所提供的目前工作周期值CDV或先前工作周期值PDV产生输出电流IOUT。The second circuit 12 is controlled by the control signal SS of the first circuit 10 and selectively calculates a current duty cycle value CDV or uses a previous duty cycle value PDV with the current sampling result CSR according to the comparison result CR, and outputs the current duty cycle value CDV or the previous duty cycle value PDV to the output circuit 14. The output circuit 14 then generates an output current IOUT according to the current duty cycle value CDV or the previous duty cycle value PDV provided by the second circuit 12.

接下来，将分别就第一电路10、第二电路12及输出电路14的内部电路架构进行详细说明。Next, the internal circuit architectures of the first circuit 10 , the second circuit 12 and the output circuit 14 will be described in detail respectively.

如图1所示，于此实施例中，第一电路10可包含取样单元100、去噪声单元102、比较单元104及切换单元106。取样单元100耦接去噪声单元102及比较单元104。去噪声单元102耦接取样单元100及比较单元104。比较单元104耦接取样单元100、切换单元106及第二电路12。切换单元106耦接比较单元104及第二电路12。As shown in FIG1 , in this embodiment, the first circuit 10 may include a sampling unit 100, a denoising unit 102, a comparison unit 104, and a switching unit 106. The sampling unit 100 is coupled to the denoising unit 102 and the comparison unit 104. The denoising unit 102 is coupled to the sampling unit 100 and the comparison unit 104. The comparison unit 104 is coupled to the sampling unit 100, the switching unit 106, and the second circuit 12. The switching unit 106 is coupled to the comparison unit 104 and the second circuit 12.

取样单元100用以对输入的脉宽调变信号PWM进行非同步取样，以取样得到脉宽调变信号PWM位于高位准的时间，并据以产生目前取样结果CSR。比较单元104用以比较目前取样结果CSR与至少一先前取样结果PSR，并据以产生比较结果CR至第二电路12。切换单元106用以根据比较结果CR产生控制信号SS至第二电路12，以控制第二电路12的运作。The sampling unit 100 is used to perform asynchronous sampling on the input pulse width modulation signal PWM to sample the time when the pulse width modulation signal PWM is at a high level, and generate a current sampling result CSR accordingly. The comparison unit 104 is used to compare the current sampling result CSR with at least one previous sampling result PSR, and generate a comparison result CR to the second circuit 12 accordingly. The switching unit 106 is used to generate a control signal SS to the second circuit 12 according to the comparison result CR, so as to control the operation of the second circuit 12.

需说明的是，此实施例中的去噪声单元102用以根据频率设定一调整阈值MF，并以先前工作周期值PDV调整该调整阈值MF后提供给比较单元104，由以在比较单元104比较目前取样结果CSR与至少一先前取样结果PSR时，能够判断脉宽调变信号PWM位于高位准的时间是否改变。It should be noted that the denoising unit 102 in this embodiment is used to set an adjustment threshold MF according to the frequency, and adjust the adjustment threshold MF with the previous duty cycle value PDV and then provide it to the comparison unit 104, so that when the comparison unit 104 compares the current sampling result CSR with at least one previous sampling result PSR, it can determine whether the time when the pulse width modulation signal PWM is at a high level has changed.

举例而言，如图1所示，去噪声单元102可包含设定器1020、调整器1022及多工器1024。设定器1020耦接于取样单元100与多工器1024之间。调整器1022耦接于取样单元100与多工器1024之间。多工器1024分别耦接设定器1020、调整器1022及比较单元104。设定器1020用以根据频率设定一调整阈值MF。调整器1022用以通过先前工作周期值PDV调整该调整阈值MF。多工器1024用以将调整后的调整阈值MF提供给比较单元104。For example, as shown in FIG1 , the denoising unit 102 may include a setter 1020, an adjuster 1022, and a multiplexer 1024. The setter 1020 is coupled between the sampling unit 100 and the multiplexer 1024. The adjuster 1022 is coupled between the sampling unit 100 and the multiplexer 1024. The multiplexer 1024 is coupled to the setter 1020, the adjuster 1022, and the comparison unit 104, respectively. The setter 1020 is used to set an adjustment threshold MF according to the frequency. The adjuster 1022 is used to adjust the adjustment threshold MF according to the previous duty cycle value PDV. The multiplexer 1024 is used to provide the adjusted adjustment threshold MF to the comparison unit 104.

如图1所示，于此实施例中，第二电路12可包含判断单元120及运算单元122。判断单元120耦接于第一电路10与运算单元122之间，用以受控于第一电路10的控制信号SS而判断后续的计算程序是否仍需进行。运算单元122耦接于判断单元120与输出电路14之间，用以根据判断单元120的判断结果选择性地根据目前取样结果CSR计算目前工作周期值CDV或直接沿用先前工作周期值PDV。As shown in FIG1 , in this embodiment, the second circuit 12 may include a determination unit 120 and a calculation unit 122. The determination unit 120 is coupled between the first circuit 10 and the calculation unit 122, and is used to be controlled by the control signal SS of the first circuit 10 to determine whether the subsequent calculation process still needs to be performed. The calculation unit 122 is coupled between the determination unit 120 and the output circuit 14, and is used to selectively calculate the current duty cycle value CDV according to the current sampling result CSR or directly use the previous duty cycle value PDV according to the determination result of the determination unit 120.

需说明的是，当比较单元104比较目前取样结果CSR与至少一先前取样结果PSR所得到的比较结果CR为脉宽调变信号PWM位于高位准的时间未改变时，判断单元120受控于第一电路10的控制信号SS而判定后续的计算程序不需进行，故运算单元122不进行运算而直接沿用先前工作周期值PDV。当比较单元104比较目前取样结果CSR与至少一先前取样结果PSR所得到的比较结果CR为脉宽调变信号PWM位于高位准的时间有改变时，判断单元120受控于第一电路10的控制信号SS而判定后续的计算程序仍需进行，故运算单元122仍进行正常运算而根据目前取样结果CSR计算目前工作周期值CDV。It should be noted that when the comparison result CR obtained by the comparison unit 104 comparing the current sampling result CSR with at least one previous sampling result PSR is that the time when the pulse width modulation signal PWM is at a high level has not changed, the judgment unit 120 is controlled by the control signal SS of the first circuit 10 and determines that the subsequent calculation process does not need to be performed, so the calculation unit 122 does not perform calculations and directly uses the previous duty cycle value PDV. When the comparison result CR obtained by the comparison unit 104 comparing the current sampling result CSR with at least one previous sampling result PSR is that the time when the pulse width modulation signal PWM is at a high level has changed, the judgment unit 120 is controlled by the control signal SS of the first circuit 10 and determines that the subsequent calculation process still needs to be performed, so the calculation unit 122 still performs normal calculations and calculates the current duty cycle value CDV according to the current sampling result CSR.

如图1所示，于此实施例中，输出电路14包含输出迟滞单元140及数字模拟转换单元142。输出迟滞单元140耦接于第二电路12与数字模拟转换单元142之间，用以根据第二电路12所提供的目前工作周期值CDV或先前工作周期值PDV产生一输出迟滞信号HY。数字模拟转换单元142耦接输出迟滞单元140，用以对输出迟滞信号HY进行数字模拟转换，以产生输出电流IOUT。As shown in FIG1 , in this embodiment, the output circuit 14 includes an output hysteresis unit 140 and a digital-to-analog conversion unit 142. The output hysteresis unit 140 is coupled between the second circuit 12 and the digital-to-analog conversion unit 142 to generate an output hysteresis signal HY according to the current duty cycle value CDV or the previous duty cycle value PDV provided by the second circuit 12. The digital-to-analog conversion unit 142 is coupled to the output hysteresis unit 140 to perform digital-to-analog conversion on the output hysteresis signal HY to generate an output current IOUT.

于另一实施例中，请参照图2，去噪声单元102’亦可用以记录多个先前工作周期值(例如PDV1～PDVN，N为大于1的正整数，但不以此为限)并提供给比较单元104。去噪声单元102’还可根据该多个先前工作周期值(例如PDV1～PDVN)中的两两先前工作周期值(例如PDV1与PDV2，但不以此为限)的平均差编码为一工作周期变化轮廓(Profile)DP并提供给比较单元104。In another embodiment, referring to FIG. 2 , the denoising unit 102′ may also be used to record a plurality of previous duty cycle values (e.g., PDV1-PDVN, N is a positive integer greater than 1, but not limited thereto) and provide them to the comparison unit 104. The denoising unit 102′ may also encode a duty cycle variation profile DP according to the average difference between two previous duty cycle values (e.g., PDV1 and PDV2, but not limited thereto) among the plurality of previous duty cycle values (e.g., PDV1-PDVN) and provide it to the comparison unit 104.

举例而言，如图2所示，去噪声单元102’可包含记录器1020’、编码器1022’及多工器1024’。记录器1020’耦接于取样单元100与多工器1024’之间。编码器1022’耦接于取样单元100与多工器1024’之间。多工器1024’分别耦接记录器1020’、编码器1022’及比较单元104。记录器1020’用以记录多个先前工作周期值(例如PDV1～PDVN，N为大于1的正整数，但不以此为限)。编码器1022’用以根据该多个先前工作周期值(例如PDV1～PDVN)中的两两先前工作周期值(例如PDV1与PDV2)的平均差编码为一工作周期变化轮廓DP。多工器1024’用以将多个先前工作周期值(例如PDV1～PDVN)或工作周期变化轮廓DP提供给比较单元104。For example, as shown in FIG2 , the denoising unit 102’ may include a recorder 1020’, an encoder 1022’ and a multiplexer 1024’. The recorder 1020’ is coupled between the sampling unit 100 and the multiplexer 1024’. The encoder 1022’ is coupled between the sampling unit 100 and the multiplexer 1024’. The multiplexer 1024’ is coupled to the recorder 1020’, the encoder 1022’ and the comparison unit 104, respectively. The recorder 1020’ is used to record a plurality of previous duty cycle values (e.g., PDV1 to PDVN, N is a positive integer greater than 1, but not limited thereto). The encoder 1022’ is used to encode a duty cycle variation profile DP according to the average difference between two previous duty cycle values (e.g., PDV1 and PDV2) among the plurality of previous duty cycle values (e.g., PDV1 to PDVN). The multiplexer 1024' is used to provide a plurality of previous duty cycle values (e.g., PDV1-PDVN) or a duty cycle variation profile DP to the comparison unit 104.

若该多个先前工作周期值(例如PDV1～PDVN)中的两两先前工作周期值(例如PDV1与PDV2)之间的振幅小于一调整阈值MF，则在比较单元104比较目前取样结果CSR与至少一先前取样结果PSR时会判定脉宽调变信号PWM位于高位准的时间改变。若工作周期变化轮廓DP的跳变次数为1且工作周期变化轮廓DP符合一特定轮廓，则在比较单元104比较目前取样结果CSR与至少一先前取样结果PSR时会判定脉宽调变信号PWM位于高位准的时间改变。If the amplitude between two previous duty cycle values (e.g., PDV1 and PDV2) among the plurality of previous duty cycle values (e.g., PDV1-PDVN) is less than an adjustment threshold MF, the time change of the pulse width modulation signal PWM at the high level is determined when the comparison unit 104 compares the current sampling result CSR with at least one previous sampling result PSR. If the number of jumps of the duty cycle variation profile DP is 1 and the duty cycle variation profile DP conforms to a specific profile, the time change of the pulse width modulation signal PWM at the high level is determined when the comparison unit 104 compares the current sampling result CSR with at least one previous sampling result PSR.

表1Table 1

举例而言，如表1所示，若以记录三个先前工作周期值PDV1～PDV3为例，假设特定轮廓为{110，001}，则在比较单元104比较目前取样结果CSR与至少一先前取样结果PSR时，只有在工作周期变化轮廓DP跳变1次且符合特定轮廓{110，001}时才会判定脉宽调变信号PWM位于高位准的时间改变，否则均会判定为脉宽调变信号PWM位于高位准的时间不变。For example, as shown in Table 1, if three previous duty cycle values PDV1~PDV3 are recorded as an example, assuming that the specific profile is {110, 001}, then when the comparison unit 104 compares the current sampling result CSR with at least one previous sampling result PSR, it is determined that the time that the pulse width modulation signal PWM is at a high level has changed only when the duty cycle change profile DP jumps once and meets the specific profile {110, 001}, otherwise it is determined that the time that the pulse width modulation signal PWM is at a high level remains unchanged.

依据本发明的另一具体实施例为一种脉宽调变侦测方法。于此实施例中，脉宽调变侦测方法应用于脉宽调变侦测电路且能同时兼顾省电及抗噪声的功效。脉宽调变侦测电路包含第一电路、第二电路及输出电路。第二电路耦接于第一电路与输出电路之间。Another specific embodiment of the present invention is a pulse width modulation detection method. In this embodiment, the pulse width modulation detection method is applied to a pulse width modulation detection circuit and can simultaneously take into account the effects of power saving and noise resistance. The pulse width modulation detection circuit includes a first circuit, a second circuit and an output circuit. The second circuit is coupled between the first circuit and the output circuit.

请参照图3，图3为此实施例中的脉宽调变侦测方法的流程图。如图3所示，脉宽调变侦测方法包含下列步骤：Please refer to FIG3 , which is a flow chart of the pulse width modulation detection method in this embodiment. As shown in FIG3 , the pulse width modulation detection method includes the following steps:

步骤S10：当第一电路接收到脉宽调变信号时，第一电路以非同步取样到脉宽调变信号位于高位准的时间而产生目前取样结果；Step S10: When the first circuit receives the PWM signal, the first circuit asynchronously samples the time when the PWM signal is at a high level to generate a current sampling result;

步骤S12：第一电路比较目前取样结果与至少一先前取样结果以产生比较结果，其中比较结果与脉宽调变信号位于高位准的时间是否改变有关；Step S12: the first circuit compares the current sampling result with at least one previous sampling result to generate a comparison result, wherein the comparison result is related to whether the time during which the PWM signal is at a high level changes;

步骤S14：第二电路受控于第一电路而根据比较结果选择性地以目前取样结果计算目前工作周期值或沿用先前工作周期值；以及Step S14: the second circuit is controlled by the first circuit and selectively calculates the current duty cycle value with the current sampling result or continues to use the previous duty cycle value according to the comparison result; and

步骤S16：输出电路根据第二电路所提供的目前工作周期值或先前工作周期值产生输出电流。Step S16: the output circuit generates an output current according to the current duty cycle value or the previous duty cycle value provided by the second circuit.

于一实施例中，步骤S14中的第二电路受控于第一电路是指：第一电路根据比较结果产生一控制信号至第二电路，以控制第二电路的运作，但不以此为限。In one embodiment, the second circuit in step S14 being controlled by the first circuit means that the first circuit generates a control signal to the second circuit according to the comparison result to control the operation of the second circuit, but the present invention is not limited thereto.

于另一实施例中，脉宽调变侦测方法还可包含下列步骤：In another embodiment, the PWM detection method may further include the following steps:

根据频率设定一调整阈值，并以先前工作周期值调整该调整阈值，由以判断脉宽调变信号位于高位准的时间是否改变。An adjustment threshold is set according to the frequency, and the adjustment threshold is adjusted according to the previous working cycle value to determine whether the time when the pulse width modulation signal is at a high level changes.

于另一实施例中，脉宽调变侦测方法还可包含下列步骤：In another embodiment, the PWM detection method may further include the following steps:

记录多个先前工作周期值。Record multiple previous working cycle values.

在实际应用中，若该多个先前工作周期值中的两两先前工作周期值之间的振幅小于一调整阈值，则步骤S12的比较结果将会判定脉宽调变信号位于高位准的时间有改变。In practical applications, if the amplitude between any two of the plurality of previous duty cycle values is smaller than an adjustment threshold, the comparison result of step S12 will determine that the time during which the PWM signal is at a high level has changed.

于另一实施例中，脉宽调变侦测方法还可包含下列步骤：In another embodiment, the PWM detection method may further include the following steps:

记录多个先前工作周期值并根据该多个先前工作周期值中的两两先前工作周期值的平均差编码为一工作周期变化轮廓。A plurality of previous duty cycle values are recorded and encoded into a duty cycle variation profile according to average differences between any two of the previous duty cycle values in the plurality of previous duty cycle values.

在实际应用中，若工作周期变化轮廓的跳变次数为1且工作周期变化轮廓符合一特定轮廓，则步骤S12的比较结果将会判定脉宽调变信号位于高位准的时间有改变。In practical applications, if the number of jumps of the duty cycle variation profile is 1 and the duty cycle variation profile conforms to a specific profile, the comparison result of step S12 will determine that the time during which the PWM signal is at a high level has changed.

需说明的是，当步骤S12的比较结果为脉宽调变信号位于高位准的时间不变时，步骤S14中的第二电路沿用先前工作周期值。当步骤S12的比较结果为脉宽调变信号位于高位准的时间改变时，步骤S14中的第二电路是根据目前取样结果计算目前工作周期值。It should be noted that when the comparison result of step S12 is that the time when the PWM signal is at a high level does not change, the second circuit in step S14 continues to use the previous duty cycle value. When the comparison result of step S12 is that the time when the PWM signal is at a high level changes, the second circuit in step S14 calculates the current duty cycle value according to the current sampling result.

于实际应用中，步骤S14可包含下列两个子步骤，但不以此为限：In practical applications, step S14 may include the following two sub-steps, but is not limited thereto:

受控于第一电路而判断后续运算程序是否需进行；以及Being controlled by the first circuit, determining whether a subsequent operation procedure needs to be performed; and

根据上述判断结果选择性地根据目前取样结果计算目前工作周期值或沿用先前工作周期值。According to the above judgment result, the current working cycle value is selectively calculated according to the current sampling result or the previous working cycle value is used.

于实际应用中，步骤S16可包含下列两个子步骤，但不以此为限：In practical applications, step S16 may include the following two sub-steps, but is not limited thereto:

根据第二电路所提供的目前工作周期值或先前工作周期值产生一输出迟滞信号；以及Generate an output hysteresis signal according to the current duty cycle value or the previous duty cycle value provided by the second circuit; and

根据输出迟滞信号产生输出电流。An output current is generated according to the output hysteresis signal.

相较于现有技术，根据本发明的脉宽调变侦测电路及方法能够同时兼顾省电及抗噪声的功效，在根据脉宽调变信号的目前取样结果与至少一先前取样结果的比较结果判定脉宽调变信号位于高位准的时间不变时，停止后续的正常运算程序而直接沿用先前的工作周期值，以达到省电效果，即使在输入的脉宽调变信号的工作周期值变大而产生较剧烈的抖动时，根据本发明的脉宽调变侦测电路及方法仍可有效消除脉宽调变信号抖动所造成的噪声。Compared with the prior art, the PWM detection circuit and method according to the present invention can take into account both power saving and noise resistance. When it is determined that the time when the PWM signal is at a high level remains unchanged based on the comparison result of the current sampling result of the PWM signal with at least one previous sampling result, the subsequent normal operation program is stopped and the previous duty cycle value is directly used to achieve power saving. Even when the duty cycle value of the input PWM signal increases and generates more severe jitter, the PWM detection circuit and method according to the present invention can still effectively eliminate the noise caused by the jitter of the PWM signal.