CN116955217A - Operation method of two-port memory, two-port memory, equipment and media - Google Patents

The embodiment of the application relates to the field of memories and discloses an operation method of a two-port memory, the two-port memory, equipment and a medium, wherein the method comprises the following steps: the two-port memory is applied to the two-port memory, and comprises: at least two single port memories, a redundant memory and a tag bit memory, the method comprising: receiving a service operation request, wherein the service operation request comprises a first memory mark and an index address; the first memory tag is used to uniquely indicate a single port memory; acquiring the marking information from the marking bit memory based on the index address; the method comprises the steps of indicating whether a redundant memory stores latest data of a single-port memory corresponding to a first memory mark at an index address; in the case where the service operation request includes a read operation request, the read operation request is performed in the redundant memory or in the single port memory based on the tag information and the index address; the memory is a single-port memory corresponding to the first memory mark, so that the time delay of read-write access is reduced, and data loss is avoided.

两端口存储器的运行方法、两端口存储器、设备及介质Two-port memory operation method, two-port memory, equipment and media

技术领域Technical field

本发明涉及存储器领域，尤其涉及一种两端口存储器的运行方法、两端口存储器、设备及介质。The present invention relates to the field of memory, and in particular, to an operating method of a two-port memory, a two-port memory, a device and a medium.

背景技术Background technique

在网络交换设备芯片中，常用到两端口存储器。两端口存储器是具有两个独立端口的随机存储器。其中一个端口仅用作读访问，另一个端口仅用作写访问。两端口存储器和读写分时复用一个端口的单端口存储器相比，具有更快的读写访问速率，在网络交换设备芯片、专用集成芯片等领域有着广泛的应用。然而在同等的工艺条件下，相同容量的两端口存储器比单端口存储器要占用更多的芯片面积资源，对于使用了大量两端口存储器的网络交换芯片而言，这在一定程度上增加了芯片的设计面积，提高了其制造成本。In network switching equipment chips, two-port memories are commonly used. Two-port memory is random access memory with two independent ports. One port is used only for read access and the other port is used only for write access. Compared with single-port memory that uses one port for time-sharing reading and writing, two-port memory has a faster read and write access rate and is widely used in network switching equipment chips, special-purpose integrated chips and other fields. However, under the same process conditions, a two-port memory of the same capacity takes up more chip area resources than a single-port memory. For network switching chips that use a large number of two-port memories, this increases the chip size to a certain extent. The design area increases its manufacturing cost.

目前，在使用单端口存储器生成两端口存储器方案中，主要是围绕减少芯片占用面积这一目的展开，并取得了一定的效果。然而，在5G以及未来的6G通信网络时代，都对交换网络芯片中的存储器提出了更高的要求。一方面需要其能占用更少的芯片面积，另一方面还需要其具有更快的读写访问速率和较低的读写访问延时。然而，在相关技术手段中仍然存在着进行读写访问时写数据被丢弃和高访问时延的问题。At present, the scheme of using single-port memory to generate two-port memory mainly focuses on the purpose of reducing the chip occupation area, and has achieved certain results. However, in the 5G and future 6G communication network era, higher requirements are placed on the memory in switching network chips. On the one hand, it needs to occupy less chip area, and on the other hand, it also needs to have faster read and write access rates and lower read and write access delays. However, in related technical means, there are still problems such as write data being discarded and high access latency during read and write access.

发明内容Contents of the invention

本发明的目的在于解决上述问题，提供一种两端口存储器的运行方法、两端口存储器、设备及介质，解决了对两端口存储器进行读写访问时存在数据丢失和高访问时延的问题。The purpose of the present invention is to solve the above problems, provide a two-port memory operating method, two-port memory, equipment and media, and solve the problems of data loss and high access delay during read and write access to the two-port memory.

为解决上述问题，本申请的实施例提供了一种两端口存储器的运行方法、两端口存储器、设备及介质，方法包括：应用于两端口存储器，两端口存储器包括：至少两个单端口存储器、冗余存储器和标记位存储器，方法包括：接收业务操作请求，业务操作请求包括第一存储器标记和索引地址；其中，第一存储器标记用于唯一指示单端口存储器；基于索引地址，从标记位存储器获取标记信息；其中，标记信息用于指示冗余存储器是否在索引地址存储有第一存储器标记对应的单端口存储器的最新数据；在业务操作请求包括读操作请求的情况下，基于标记信息和索引地址，在冗余存储器或在第一单端口存储器中执行读操作请求；其中，第一单端口存储器为第一存储器标记所对应的单端口存储器。In order to solve the above problems, embodiments of the present application provide a two-port memory operating method, a two-port memory, a device and a medium. The method includes: being applied to a two-port memory. The two-port memory includes: at least two single-port memories, Redundant memory and mark bit memory, the method includes: receiving a service operation request, the service operation request includes a first memory mark and an index address; wherein the first memory mark is used to uniquely indicate a single-port memory; based on the index address, from the mark bit memory Obtain mark information; where the mark information is used to indicate whether the redundant memory stores the latest data of the single-port memory corresponding to the first memory mark at the index address; when the business operation request includes a read operation request, based on the mark information and the index Address, execute the read operation request in the redundant memory or the first single-port memory; wherein the first single-port memory is the single-port memory corresponding to the first memory mark.

为解决上述问题，本申请的实施例提供了一种两端口存储器，两端口存储器包括：至少两个单端口存储器、冗余存储器和标记位存储器，两端口存储器包括：接收模块，用于接收业务操作请求，业务操作请求包括第一存储器标记和索引地址；其中，第一存储器标记用于唯一指示单端口存储器；获取模块，用于基于索引地址，从标记位存储器获取标记信息；其中，标记信息用于指示冗余存储器是否在索引地址存储有第一存储器标记对应的单端口存储器的最新数据；执行模块，用于在业务操作请求包括读操作请求的情况下，基于标记信息和索引地址，在冗余存储器或在第一单端口存储器中执行读操作请求；其中，第一单端口存储器为第一存储器标记所对应的单端口存储器。In order to solve the above problems, embodiments of the present application provide a two-port memory. The two-port memory includes: at least two single-port memories, a redundant memory and a flag bit memory. The two-port memory includes: a receiving module for receiving services. Operation request, the business operation request includes a first memory tag and an index address; wherein the first memory tag is used to uniquely indicate a single-port memory; an acquisition module is used to obtain tag information from the tag bit memory based on the index address; wherein, the tag information Used to indicate whether the redundant memory stores the latest data of the single-port memory corresponding to the first memory mark at the index address; the execution module is used to, when the business operation request includes a read operation request, based on the mark information and the index address, in The redundant memory or performs the read operation request in the first single-port memory; wherein the first single-port memory is the single-port memory corresponding to the first memory mark.

为解决上述问题，本申请的实施例还提供了一种电子设备，包括：至少一个处理器；以及，与所述至少一个处理器通信连接的存储器；其中，所述存储器存储有可被所述至少一个处理器执行的指令，所述指令被所述至少一个处理器执行，以使所述至少一个处理器能够执行上述两端口存储器的运行方法。In order to solve the above problem, an embodiment of the present application also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores information that can be used by the Instructions executed by at least one processor, the instructions being executed by the at least one processor, so that the at least one processor can execute the above two-port memory operating method.

为解决上述问题，本申请的实施例还提供了一种计算机可读存储介质，存储有计算机程序，所述计算机程序被处理器执行时实现上述两端口存储器的运行方法。In order to solve the above problem, embodiments of the present application also provide a computer-readable storage medium that stores a computer program. When the computer program is executed by a processor, the above-mentioned two-port memory operating method is implemented.

在本申请实施例中，通过业务操作请求中携带的索引地址，可以在标记位存储器的索引地址处，获得冗余存储器在索引地址处是否有缓存与业务操作请求的第一存储器标记所对应的单端口存储器的最新数据，从而在业务操作为读操作请求的时候，根据获取的标记信息和索引地址，可以知道是从冗余存储器的索引地址处读数据，还是从第一存储器标记所对应的单端口存储器的索引地址处读数据，使得在执行读操作之前，不需要先通过其他存储器的访问来获得端口存储器的片选地址，降低了进行读操作时的访问时延，并且避免了数据的丢失。In this embodiment of the present application, through the index address carried in the business operation request, it is possible to obtain at the index address of the mark bit memory whether the redundant memory has a cache corresponding to the first memory mark of the business operation request at the index address. The latest data of the single-port memory, so when the business operation is a read operation request, based on the obtained tag information and index address, it can be known whether to read the data from the index address of the redundant memory or from the first memory tag corresponding to Reading data at the index address of the single-port memory eliminates the need to obtain the chip select address of the port memory through access to other memories before performing a read operation, which reduces the access delay during read operations and avoids data corruption. lost.

附图说明Description of the drawings

一个或多个实施例通过与之对应的附图中的图片进行示例性说明，这些示例性说明并不构成对实施例的限定，附图中具有相同参考数字标号的元件表示为类似的元件，除非有特别申明，附图中的图不构成比例限制。One or more embodiments are exemplified by the pictures in the corresponding drawings. These illustrative illustrations do not constitute limitations to the embodiments. Elements with the same reference numerals in the drawings are represented as similar elements. Unless otherwise stated, the figures in the drawings are not intended to be limited to scale.

图1是本申请一实施例提供的两端口存储器的运行方法的流程图；Figure 1 is a flow chart of an operating method of a two-port memory provided by an embodiment of the present application;

图2是本申请一实施例提供的两端口存储器的示意图；Figure 2 is a schematic diagram of a two-port memory provided by an embodiment of the present application;

图3是本申请一实施例提供两端口存储器的结构示意图；Figure 3 is a schematic structural diagram of a two-port memory provided by an embodiment of the present application;

图4是本申请一实施例提供的电子设备的结构示意图。FIG. 4 is a schematic structural diagram of an electronic device provided by an embodiment of the present application.

具体实施方式Detailed ways

本申请的实施例涉及一种两端口存储器的运行方法、两端口存储器、设备及介质，方法包括：应用于两端口存储器，两端口存储器包括：至少两个单端口存储器、冗余存储器和标记位存储器，方法包括：接收业务操作请求，业务操作请求包括第一存储器标记和索引地址；其中，第一存储器标记用于唯一指示单端口存储器；基于索引地址，从标记位存储器获取标记信息；其中，标记信息用于指示冗余存储器是否在索引地址存储有第一存储器标记对应的单端口存储器的最新数据；在业务操作请求包括读操作请求的情况下，基于标记信息和索引地址，在冗余存储器或在第一单端口存储器中执行读操作请求；其中，第一单端口存储器为第一存储器标记所对应的单端口存储器。Embodiments of the present application relate to an operating method of a two-port memory, a two-port memory, a device and a medium. The method includes: being applied to a two-port memory. The two-port memory includes: at least two single-port memories, a redundant memory and a flag bit. Memory, the method includes: receiving a service operation request, the service operation request including a first memory tag and an index address; wherein the first memory tag is used to uniquely indicate a single-port memory; based on the index address, obtain tag information from the tag bit memory; wherein, The mark information is used to indicate whether the redundant memory stores the latest data of the single-port memory corresponding to the first memory mark at the index address; when the business operation request includes a read operation request, based on the mark information and the index address, in the redundant memory Or execute the read operation request in the first single-port memory; wherein the first single-port memory is the single-port memory corresponding to the first memory tag.

本申请实施例提供的两端口存储器的运行方法应用于两端口存储器，且两端口存储器中标包括至少两个单端口存储器、用于缓存最新数据的冗余存储器以及用于指示冗余存储器中的某一地址是否存储了最新数据的标记位存储器，使得本申请具有读写冲突时写数据不丢失的特点，并且，在申请中读或写的直接访问对象是用于拼接的单端口存储器，即它不休要先通过其对其他存储器的访问来获得端口存储器的片选地址，然后再选中单端口存储器进行访问，因此，本申请具有更低的读写访问时延。The operating method of the two-port memory provided by the embodiment of the present application is applied to the two-port memory, and the two-port memory bid includes at least two single-port memories, a redundant memory for caching the latest data, and a redundant memory for indicating a certain Whether the latest data is stored in the tag bit memory at an address makes this application have the characteristics of not losing the written data when there is a read-write conflict, and the direct access object for reading or writing in the application is a single-port memory used for splicing, that is, it It is necessary to first obtain the chip select address of the port memory through its access to other memories, and then select the single-port memory for access. Therefore, this application has lower read and write access delays.

本申请实施例提供的两端口存储器的运行方法，可应用在在网络通信ASIC领域，在网络通信ASIC领域中需要存储器具有更小的占用面积、较高的读写访问速率和更低的读写访问延时。The operation method of the two-port memory provided by the embodiment of the present application can be applied in the field of network communication ASIC. In the field of network communication ASIC, the memory needs to have a smaller occupied area, a higher read and write access rate and a lower read and write speed. Access delay.

为使本申请实施例的目的、技术方案和优点更加清楚，下面将结合附图对本申请的各实施方式进行详细的阐述。然而，本领域的普通技术人员可以理解，在本申请各实施方式中，为了使读者更好地理解本申请而提出了许多技术细节。但是，即使没有这些技术细节和基于以下各实施方式的种种变化和修改，也可以实现本申请所要求保护的技术方案。In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, each implementation mode of the present application will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art can understand that in each embodiment of the present application, many technical details are provided to enable readers to better understand the present application. However, even without these technical details and various changes and modifications based on the following embodiments, the technical solution claimed in this application can also be implemented.

下面对本实施例中的两端口存储器的运行方法的实现细节进行具体的说明，以下内容仅为方便理解本方案的实现细节，并非实施本方案的必须。具体流程如图1所示，可包括如下步骤：The implementation details of the operation method of the two-port memory in this embodiment will be described in detail below. The following content is only for the convenience of understanding the implementation details of this solution and is not necessary for the implementation of this solution. The specific process is shown in Figure 1, which may include the following steps:

在步骤101中，接收业务操作请求，业务操作请求包括第一存储器标记和索引地址；其中，第一存储器标记用于唯一指示单端口存储器。In step 101, a service operation request is received. The service operation request includes a first memory tag and an index address; wherein the first memory tag is used to uniquely indicate a single-port memory.

本申请实施例中的两端口存储器的运行方法应用于两端口存储器，其中，所述两端口存储器包括单端口存储器、冗余存储器和标记位存储器，其中，冗余存储器用于缓存最新的数据，标记位存储器用于指示冗余存储器中的某一地址是否存储了最新数据的标记位存储器。使得在发生读写冲突时，写数据不会存在丢失的问题。The operating method of the two-port memory in the embodiment of the present application is applied to the two-port memory, where the two-port memory includes a single-port memory, a redundant memory and a mark bit memory, where the redundant memory is used to cache the latest data, The flag bit memory is used to indicate whether a certain address in the redundant memory stores the latest data. This ensures that when a read-write conflict occurs, the write data will not be lost.

另外，本申请实施例使用的是一组数量可扩展的单端口存储器拼接成两端口存储器，可用于拼接的单端口存储器的数量可以是N个(N为大于等于2的整数)。比相关技术中使用同等容量的两端口存储器，减少了大约一半的芯片面积。In addition, the embodiment of the present application uses a set of scalable single-port memories to be spliced into a two-port memory. The number of single-port memories that can be spliced can be N (N is an integer greater than or equal to 2). Compared with related technologies using two-port memories of the same capacity, the chip area is reduced by about half.

其中，业务操作请求包括读操作请求或/和写操作请求，在接收到业务操作请求后，获取业务操作请求包括：第一存储器标记和索引地址。The business operation request includes a read operation request or/and a write operation request. After receiving the business operation request, obtaining the business operation request includes: a first memory mark and an index address.

在一个例子中，接收业务操作请求的两端口存储器的规格为4K*21，说明上述两端口存储器中有4个1K的单端口存储器，那么第一存储器标记的数据位宽为2bit，第一存储器标记为00、01、10和11时分别表示四个单端口存储器，索引地址的数据位宽为10bit，分别用来作为各单端口存储器、冗余存储器和标记位存储器的索引地址。因此，业务操作请求的索引地址数据位宽为10bit。In one example, the specification of the two-port memory that receives the service operation request is 4K*21, which means that there are four 1K single-port memories in the above two-port memory. Then the data bit width of the first memory mark is 2 bits. When marked as 00, 01, 10 and 11, they respectively represent four single-port memories. The data bit width of the index address is 10 bits, which are used as the index addresses of each single-port memory, redundant memory and mark bit memory respectively. Therefore, the index address data bit width requested by the business operation is 10 bits.

在一个例子中，两端口存储器的规格为4K*21，四块单端口存储器分别为Ram_0、Ram_1、Ram_2和Ram_3，其对应的第一存储器标记分别为00、01、10、11。当两端口存储器接收到读操作请求，读操作请求中携带的第一存储器标记为01，索引地址为1，那么表明请求发起方请求在Ram_1的1地址处执行读操作。In one example, the specification of the two-port memory is 4K*21, and the four single-port memories are Ram_0, Ram_1, Ram_2, and Ram_3, and their corresponding first memory labels are 00, 01, 10, and 11 respectively. When the two-port memory receives a read operation request, the first memory tag carried in the read operation request is 01, and the index address is 1, which indicates that the request initiator requests to perform a read operation at address 1 of Ram_1.

需要说明的是，业务操作请求的数据位宽不受上述例子的限制，在实际应用中根据访问的两端口存储器的规格来决定数据位宽，根据业务操作请求访问的具体单端口存储器和具体地址，决定业务操作请求中的第一存储器标记和索引地址的值。It should be noted that the data bit width requested by the business operation is not limited by the above example. In actual applications, the data bit width is determined according to the specifications of the two-port memory accessed, and the specific single-port memory accessed by the business operation request and the specific address. , determine the value of the first memory mark and index address in the service operation request.

在步骤102中，基于索引地址，从标记位存储器获取标记信息；其中，所述标记信息用于指示所述冗余存储器是否在所述索引地址存储有第一存储器标记对应的单端口存储器的最新数据。其中，标记信息包括：缓存值和第二存储器标记；缓存值用于指示冗余存储器在索引地址是否缓存有最新数据，第二存储器标记用于指示最新数据所属的单端口存储器。In step 102, based on the index address, obtain tag information from the tag bit memory; wherein the tag information is used to indicate whether the redundant memory stores the latest single-port memory corresponding to the first memory tag at the index address. data. The tag information includes: a cache value and a second memory tag; the cache value is used to indicate whether the redundant memory caches the latest data at the index address, and the second memory tag is used to indicate the single-port memory to which the latest data belongs.

在一个例子中，两端口存储器的规格为4K*21，四块单端口存储器分别为Ram_0、Ram_1、Ram_2和Ram_3，其对应的第一存储器标记分别为00、01、10、11。当两端口存储器接收到读操作请求，读操作请求中携带的第一存储器标记为01，索引地址为1，那么基于索引地址，从标记位存储器的1地址处获取缓存值和第二存储器标记，即标记信息，标记信息指示冗余存储器在1地址处是否存储有Ram_1的最新数据。In one example, the specification of the two-port memory is 4K*21, and the four single-port memories are Ram_0, Ram_1, Ram_2, and Ram_3, and their corresponding first memory labels are 00, 01, 10, and 11 respectively. When the two-port memory receives a read operation request, the first memory mark carried in the read operation request is 01, and the index address is 1. Then based on the index address, the cache value and the second memory mark are obtained from the 1 address of the mark bit memory, That is, the tag information indicates whether the redundant memory stores the latest data of Ram_1 at address 1.

在本申请实施例中，单端口端存储器、冗余存储器和标记位存储器具有相同的深度，单端口存储器与冗余存储器具有相同的数据位宽。其中，标记位存储器的数据位宽的最高bit(即缓存值)用来指示冗余存储器中的相应地址是否缓存了最新数据，其余b it(即第二存储器标记)用来指示冗余存储器中缓存了的新数据所属的单端口存储器。In the embodiment of the present application, the single-port memory, the redundant memory and the tag bit memory have the same depth, and the single-port memory and the redundant memory have the same data bit width. Among them, the highest bit of the data bit width of the mark bit memory (i.e., cache value) is used to indicate whether the corresponding address in the redundant memory caches the latest data, and the remaining bits (i.e., the second memory mark) are used to indicate whether the corresponding address in the redundant memory caches the latest data. The single-port memory to which the cached new data belongs.

在一个例子中，提供一个规格为4k*21的两端口存储器，如图2所示，需要4个深度为1K，数据位宽为21bit的单端口存储器、一个深度为1K，数据位宽为21bit的冗余存储器和一个深度为1K，数据位宽为3bit的标记位存储器。由于单端口存储器的数量为4个，因此，通过00、01、10和11作为第二存储器标记的值，可以分别表示各单端口存储器，因此，第二存储器标记的数据位宽为2bit即可。另外，缓存值用来指示冗余存储器中的相应地址是否缓存了最新数据，那么缓存值为0或1即可达到上述作用，那么缓存值所需的数据位宽为1bit，因此，标记位存储器的数据位宽为3bit。In an example, a two-port memory with a specification of 4k*21 is provided, as shown in Figure 2. Four single-port memories with a depth of 1K and a data bit width of 21 bits, and one memory with a depth of 1K and a data bit width of 21 bits are required. Redundant memory and a mark bit memory with a depth of 1K and a data bit width of 3bit. Since the number of single-port memories is 4, each single-port memory can be represented separately by using 00, 01, 10 and 11 as the values of the second memory tag. Therefore, the data bit width of the second memory tag can be 2 bits. . In addition, the cache value is used to indicate whether the corresponding address in the redundant memory caches the latest data. Then the cache value is 0 or 1 to achieve the above effect. Then the data bit width required for the cache value is 1 bit. Therefore, the mark bit memory The data bit width is 3bit.

需要说明的是，本申请实施例不对两端口存储器中各存储器的深度和数据位宽进行限制，具体的深度和数据位宽根据两端口存储器的实际应用情况决定。It should be noted that the embodiment of the present application does not limit the depth and data bit width of each memory in the two-port memory. The specific depth and data bit width are determined according to the actual application situation of the two-port memory.

在步骤103中，在业务操作请求包括读操作请求的情况下，基于标记信息和索引地址，在冗余存储器或在第一单端口存储器中执行读操作请求；其中，第一单端口存储器为第一存储器标记所对应的单端口存储器。In step 103, if the service operation request includes a read operation request, based on the tag information and the index address, the read operation request is executed in the redundant memory or in the first single-port memory; wherein the first single-port memory is the A single-port memory corresponding to a memory tag.

在本申请实施例中，在业务操作请求包括读操作请求的情况下，基于标记信息和索引地址，在冗余存储器或在第一单端口存储器中执行读操作请求，包括：在标记信息满足预设条件的情况下，在冗余存储器中执行读操作；在标记信息不满足预设条件的情况下，在第一单端口存储器中执行读操作请求；其中，预设条件包括：缓存值指示冗余存储器在索引地址缓存有最新数据，且第二存储器标记指示的单端口存储器与第一存储器标记指示的单端口存储器相同。In the embodiment of the present application, when the service operation request includes a read operation request, based on the tag information and the index address, executing the read operation request in the redundant memory or the first single-port memory includes: when the tag information meets the predetermined If conditions are assumed, a read operation is performed in the redundant memory; if the tag information does not meet the preset conditions, a read operation request is performed in the first single-port memory; where the preset conditions include: the cache value indicates redundancy The remaining memory caches the latest data at the index address, and the single-port memory indicated by the second memory mark is the same as the single-port memory indicated by the first memory mark.

在一个例子中，两端口存储器的规格为4K*21，四块单端口存储器分别为Ram_0、Ram_1、Ram_2和Ram_3，其对应的存储器标记分别为00、01、10、11，冗余存储器为Ram_n，标记位存储器为R_x。In an example, the specification of the two-port memory is 4K*21, the four single-port memories are Ram_0, Ram_1, Ram_2 and Ram_3, their corresponding memory tags are 00, 01, 10, 11 respectively, and the redundant memory is Ram_n , the mark bit memory is R_x.

在业务操作请求为读操作请求，读操作请求的第一存储器标记为00，索引地址为1的情况下，说明读操作要读的数据为Ram_0的1地址处所对应的数据，由于Ram_0的1地址处所对应的数据可能存放在Ram_n中，因此，首先需要判断要读的数据是否在Ram_n的1地址处，即查看R_x的1地址处的标记信息的内容，在R_x的1地址处的缓存值为1且第二存储器标记为00的情况下，则表明本次读操作要读的数据存放在Ram_n的1地址处，那么从Ram_n的1地址处读出对应的数据即可，若R_x的1地址处的标记信息不满足缓存值为1和第二存储器标记为00,则表明本次要读的数据不在Ram_n的1地址处，此时从Ram_0的1地址处读出对应的数据。When the business operation request is a read operation request, the first memory mark of the read operation request is 00, and the index address is 1, it means that the data to be read by the read operation is the data corresponding to the 1 address of Ram_0. Since the 1 address of Ram_0 The data corresponding to the location may be stored in Ram_n. Therefore, you first need to determine whether the data to be read is at the 1 address of Ram_n, that is, check the content of the tag information at the 1 address of R_x. The cache value at the 1 address of R_x is 1 and the second memory mark is 00, it means that the data to be read in this read operation is stored at the 1 address of Ram_n, then the corresponding data can be read from the 1 address of Ram_n. If the 1 address of R_x The tag information at does not satisfy that the cache value is 1 and the second memory tag is 00, which means that the data to be read this time is not at the 1 address of Ram_n. At this time, the corresponding data is read from the 1 address of Ram_0.

在本申请实施例中，在冗余存储器或在第一单端口存储器中执行读操作请求之后，还包括：在标记信息的缓存值指示冗余存储器在写操作请求的索引地址缓存有最新数据，且标记信息的第二存储器标记与写操作请求的第一存储器标记不相同的情况下，读取缓存的最新数据，并在标记信息的第二存储器标记所对应的单端口存储器空闲时，将读取的最新数据写入第二存储器标记所对应的单端口存储器。In the embodiment of the present application, after the read operation request is executed in the redundant memory or in the first single-port memory, it also includes: the cache value of the tag information indicates that the redundant memory caches the latest data at the index address of the write operation request, And when the second memory mark of the mark information is different from the first memory mark of the write operation request, the latest cached data is read, and when the single-port memory corresponding to the second memory mark of the mark information is idle, the read The latest data fetched is written into the single-port memory corresponding to the second memory mark.

在一个例子中，对上述规格为4k*21的两端口存储器发起读操作请求，其中，读操作请求的第一存储器标记为00，索引地址为1。获取R_x的1地址处的标记信息的内容，在R_x的1地址处的缓存值为1且第二存储器标记为01的情况下，即冗余存储器的1地址处缓存了Ram_1的最新数据，因此，在对Ram_0的1地址处读出对应的数据之后，将冗余存储器的1地址处的最新数据读出，并暂存在寄存器中，当Ram_1空闲时，将上述最新数据写入Ram_1。并将R_x的1地址处的标记信息的缓存值置为0。在本申请实施例中，在业务操作请求包括写操作请求的情况下，基于写操作请求的存储器标记和索引地址，在第二单端口存储器执行写操作请求；其中第二单端口存储器为所述操作请求的第一存储器标记所对应单端口存储器；在标记信息满足预设条件的情况下，将标记信息的缓存值更新为指示冗余存储器在索引地址没有缓存最新数据。In one example, a read operation request is initiated for the two-port memory with the above specification of 4k*21, in which the first memory mark of the read operation request is 00 and the index address is 1. Obtain the content of the tag information at address 1 of R_x. When the cache value at address 1 of R_x is 1 and the second memory tag is 01, that is, the latest data of Ram_1 is cached at address 1 of the redundant memory. Therefore, , after reading the corresponding data at address 1 of Ram_0, read the latest data at address 1 of the redundant memory and temporarily store it in the register. When Ram_1 is idle, write the latest data to Ram_1. And set the cache value of the tag information at the 1 address of R_x to 0. In the embodiment of the present application, when the business operation request includes a write operation request, based on the memory mark and index address of the write operation request, the write operation request is executed in the second single-port memory; wherein the second single-port memory is the The single-port memory corresponding to the first memory mark of the operation request; when the mark information meets the preset conditions, the cache value of the mark information is updated to indicate that the redundant memory does not cache the latest data at the index address.

在一个例子中，对上述规格为4k*21的两端口存储器发起写操作请求，写操作请求的第一存储器标记为00，索引地址为1的情况下，由于此时没有发生读写冲突，因此可以直接对Ram_0的1地址执行写操作。与此同时，还需要获取R_x的1地址处的标记信息的内容，来判断Ram_n的1地址处的数据是否为Ram_0的1地址之前的最新数据，在R_x的1地址处的缓存值为1且第二存储器标记为00的情况下，说明Ram_n中的1地址处缓存了Ram_0的1地址之前的最新数据，由于在Ram_0的1地址执行本次写操作后，此次写操作存放在Ram_0的1地址处的数据成为了最新数据，因此，此时就需要将R_x的1地址处的标记信息的缓存值置为0,用来表示Ram_0的1地址处的最新数据已经不在Ram_n中了。反之，如果从R_x的1地址处读出的标记信息，不满足最高缓存值为1和第二存储器标记为00的条件,则不改动R_x的1地址处标记信息。In one example, a write operation request is initiated for the two-port memory with the above specification of 4k*21. When the first memory mark of the write operation request is 00 and the index address is 1, since there is no read-write conflict at this time, Write operations can be performed directly on address 1 of Ram_0. At the same time, it is also necessary to obtain the content of the tag information at address 1 of R_x to determine whether the data at address 1 of Ram_n is the latest data before address 1 of Ram_0. The cache value at address 1 of R_x is 1 and When the second memory is marked as 00, it means that the latest data before the 1 address of Ram_0 is cached at the 1 address in Ram_n. Since this write operation is performed at the 1 address of Ram_0, the write operation is stored in the 1 address of Ram_0. The data at the address has become the latest data. Therefore, at this time, it is necessary to set the cache value of the tag information at address 1 of R_x to 0 to indicate that the latest data at address 1 of Ram_0 is no longer in Ram_n. On the contrary, if the tag information read from address 1 of R_x does not meet the conditions of the highest cache value being 1 and the second memory tag being 00, the tag information at address 1 of R_x will not be changed.

在一个例子中，对上述规格为4k*21的两端口存储器发起写操作请求，其中，写操作请求的第一存储器标记为00，索引地址为1。获取R_x的1地址处的标记信息的内容，在R_x的1地址处的缓存值为1且第二存储器标记为01的情况下，即冗余存储器的1地址处缓存了Ram_1的最新数据，因此，在对Ram_0的1地址处写入对应的数据之后，将冗余存储器的1地址处的最新数据读出，并暂存在寄存器中，当Ram_1空闲时，将上述最新数据写入Ram_1，并将R_x的1地址处的标记信息的缓存值置为0。In one example, a write operation request is initiated for the two-port memory with the above specifications of 4k*21, in which the first memory mark of the write operation request is 00 and the index address is 1. Obtain the content of the tag information at address 1 of R_x. When the cache value at address 1 of R_x is 1 and the second memory tag is 01, that is, the latest data of Ram_1 is cached at address 1 of the redundant memory. Therefore, , after writing the corresponding data to address 1 of Ram_0, read the latest data at address 1 of the redundant memory and temporarily store it in the register. When Ram_1 is idle, write the latest data to Ram_1 and store it temporarily in the register. The cache value of the tag information at the 1 address of R_x is set to 0.

在本申请实施例中，在业务操作请求包括写操作请求和读操作请求。且读操作请求的第一存储器标记和写操作请求的第一存储器标记相同,基于写操作请求的索引地址，在冗余存储器执行写操作请求；在标记信息不满足预设条件的情况下，对标记位信息进行修改，修改后的标记信息满足预设条件；基于标记信息和索引地址，在冗余存储器或在第一单端口存储器中执行读操作请求。In this embodiment of the present application, the service operation request includes a write operation request and a read operation request. And the first memory mark of the read operation request is the same as the first memory mark of the write operation request. Based on the index address of the write operation request, the write operation request is executed in the redundant memory; when the mark information does not meet the preset conditions, the write operation request is executed. The tag bit information is modified, and the modified tag information meets the preset conditions; based on the tag information and the index address, a read operation request is performed in the redundant memory or the first single-port memory.

另外，在业务操作请求包括写操作请求和读操作请求。且读操作请求的第一存储器标记和写操作请求的第一存储器标记相同的情况下，在冗余存储器执行写操作之前，还包括：在标记信息的缓存值指示冗余存储器在写操作请求的索引地址缓存有最新数据的情况下，读取缓存的最新数据，并在标记信息的第二存储器标记所对应的单端口存储器空闲时，将读取的最新数据写入第二存储器标记所对应的单端口存储器。In addition, business operation requests include write operation requests and read operation requests. And when the first memory mark requested by the read operation and the first memory mark requested by the write operation are the same, before the redundant memory performs the write operation, it also includes: the cache value of the mark information indicates that the redundant memory is in the write operation request. When the latest data is cached at the index address, the latest cached data is read, and when the single-port memory corresponding to the second memory tag of the tag information is idle, the latest read data is written into the second memory tag corresponding to the tag information. Single port memory.

在一个例子中，对上述规格为4k*21的两端口存储器同时发起写操作请求和读操作请求，其中，读操作请求的第一存储器标记为00，索引地址为1；写操作请求的第一存储器标记为00，索引地址为0，说明读操作要读的数据为Ram_0的1地址处所对应的数据，写操作要存储数据的地址为Ram_0的0地址处，由于读操作和写操作都是Ram_0上执行，因此，发生读写冲突，此时，读操作正常进行，写操作则需到冗余存储器Ram_n的对应地址进行写操作，具体操作如下：In one example, a write operation request and a read operation request are initiated simultaneously for the above-mentioned two-port memory with a specification of 4k*21. The first memory requested by the read operation is marked as 00 and the index address is 1; the first memory requested by the write operation is marked as 00 and the index address is 1; The memory mark is 00 and the index address is 0, which means that the data to be read by the read operation is the data corresponding to the 1 address of Ram_0, and the address of the data to be stored in the write operation is the 0 address of Ram_0. Since both the read operation and the write operation are Ram_0 Therefore, a read-write conflict occurs. At this time, the read operation proceeds normally, and the write operation needs to be performed at the corresponding address of the redundant memory Ram_n. The specific operations are as follows:

对于读操作，由于Ram_0的1地址处所对应的数据可能存放在Ram_n中，因此，首先需要判断要读的数据是否在Ram_n的1地址处，即查看R_x的1地址处的标记信息的内容，在R_x的1地址处的缓存值为1且第二存储器标记为00的情况下，则表明本次读操作要读的数据存放在Ram_n的1地址处，那么从Ram_n的1地址处读出对应的数据即可，若R_x的1地址处的标记信息不满足缓存值为1和第二存储器标记为00,则表明本次要读的数据不在Ram_n的1地址处，此时从Ram_0的1地址处读出对应的数据。For read operations, since the data corresponding to address 1 of Ram_0 may be stored in Ram_n, you first need to determine whether the data to be read is at address 1 of Ram_n, that is, check the content of the tag information at address 1 of R_x. If the cache value at address 1 of R_x is 1 and the second memory mark is 00, it means that the data to be read in this read operation is stored at address 1 of Ram_n, then the corresponding data is read from address 1 of Ram_n Data is enough. If the tag information at address 1 of R_x does not satisfy the cache value of 1 and the second memory tag is 00, it means that the data to be read this time is not at address 1 of Ram_n. At this time, the data to be read is from address 1 of Ram_0. Read the corresponding data.

对于写操作，需要将要写的数据写入Ram_n的0地址，在进行写操作之前，首先需要判断R_x的0地址处的标记信息。若标记信息的缓存值为1且第二存储器标记为00,则表明Ram_n中的0地址处缓存了Ram_0的0地址之前的最新数据，此时把数据写进Ram_n的0地址,R_x的0地址处的标记信息保持不变。若R_x的0地址处的标记信息，缓存值为1且第二存储器标记不为00,比如低第二存储器标记为10时，则说明R_x的0地址处缓存了Ram_2的0地址之前的最新数据。此时，若把当前写操作应写在Ram_0的0地址处的数据写进Ram_n的0地址,则会覆盖掉Ram_2的0地址处最新数据，为了避免Ram_2的0地址处最新数据被覆盖，从而丢失。因此，需要在进行写操作之前，将Ram_n的0地址处的数据读出，并将读出的数据暂存到寄存器中，然后在Ram_2空闲时，将数据写到Ram_2的0地址处。并将R_x的0地址处的标记信息的缓存值置为1,，第二存储器标记改为00，用来表示此时Ram_n的0地址处缓存的是Ram_0的0地址的最新冲突值。For a write operation, the data to be written needs to be written to the 0 address of Ram_n. Before performing the write operation, the mark information at the 0 address of R_x needs to be determined first. If the cache value of the tag information is 1 and the second memory tag is 00, it means that the latest data before the 0 address of Ram_0 is cached at the 0 address in Ram_n. At this time, the data is written into the 0 address of Ram_n and the 0 address of R_x. The tag information remains unchanged. If the cache value of the tag information at the 0 address of R_x is 1 and the second memory tag is not 00, for example, when the lower second memory tag is 10, it means that the latest data before the 0 address of Ram_2 is cached at the 0 address of R_x. . At this time, if the data that should be written at address 0 of Ram_0 in the current write operation is written into address 0 of Ram_n, the latest data at address 0 of Ram_2 will be overwritten. In order to prevent the latest data at address 0 of Ram_2 from being overwritten, lost. Therefore, it is necessary to read the data at address 0 of Ram_n before performing the write operation, temporarily store the read data into the register, and then write the data to address 0 of Ram_2 when Ram_2 is idle. And the cache value of the tag information at address 0 of R_x is set to 1, and the second memory tag is changed to 00, which is used to indicate that the latest conflict value of address 0 of Ram_n is cached at address 0 of Ram_0 at this time.

在一个例子中，对上述规格为4k*21的两端口存储器同时发起读写操作请求，且读写操作不同的单端口存储器，读操作请求的第一存储器标记为00，索引地址为1；写地址的第一存储器标记为01，索引地址为0时，说明读操作要读的数据为Ram_0的1地址处所对应的数据，写操作要存储数据的地址为Ram_1的0地址处，读写不冲突，两者同时进行，具体操作如下：In one example, read and write operation requests are initiated simultaneously for the above-mentioned two-port memory with the specification of 4k*21, and the read and write operations are different for the single-port memory. The first memory mark of the read operation request is 00, and the index address is 1; write When the first memory mark of the address is 01 and the index address is 0, it means that the data to be read by the read operation is the data corresponding to the 1 address of Ram_0, and the address of the data to be stored in the write operation is the 0 address of Ram_1. There is no conflict between reading and writing. , both are performed at the same time. The specific operations are as follows:

由于Ram_0的1地址处所对应的数据可能存放在Ram_n中，因此，首先需要判断要读的数据是否在Ram_n的1地址处，即查看R_x的1地址处的标记信息的内容，在R_x的1地址处的缓存值为1且第二存储器标记为00的情况下，则表明本次读操作要读的数据存放在Ram_n的1地址处，那么从Ram_n的1地址处读出对应的数据即可，若R_x的1地址处的标记信息不满足缓存值为1和第二存储器标记为00,则表明本次要读的数据不在Ram_n的1地址处，此时从Ram_0的1地址处读出对应的数据。Since the data corresponding to address 1 of Ram_0 may be stored in Ram_n, you first need to determine whether the data to be read is at address 1 of Ram_n, that is, check the content of the tag information at address 1 of R_x. At address 1 of R_x If the cache value at is 1 and the second memory mark is 00, it means that the data to be read in this read operation is stored at the 1 address of Ram_n, then the corresponding data can be read from the 1 address of Ram_n, If the tag information at address 1 of R_x does not satisfy that the cache value is 1 and the second memory tag is 00, it means that the data to be read this time is not at address 1 of Ram_n. At this time, the corresponding data is read from address 1 of Ram_0. data.

由于此时没有发生读写冲突，因此可以直接对Ram_1的0地址执行写操作。与此同时，还需要获取R_x的0地址处的标记信息的内容，来判断Ram_n的0地址处的数据是否为Ram_1的0地址之前的最新数据，在R_x的0地址处的缓存值为1且第二存储器标记为01的情况下，说明Ram_n中的0地址出缓存了Ram_1的0地址之前的最新数据，由于在Ram_1的0地址执行本次写操作后，此次写操作存放在Ram_1的0地址处的数据成为了最新数据，因此，此时就需要将R_x的0地址处的标记信息的缓存值置为0,用来表示Ram_1的0地址处的最新数据已经不在Ram_n中了。反之，如果从R_x的0地址处读出的标记信息，不满足最高缓存值为1和第二存储器标记为01的条件,则不改动R_x的0地址处标记信息。Since there is no read-write conflict at this time, the write operation can be directly performed on the 0 address of Ram_1. At the same time, it is also necessary to obtain the content of the tag information at address 0 of R_x to determine whether the data at address 0 of Ram_n is the latest data before address 0 of Ram_1. The cache value at address 0 of R_x is 1 and When the second memory mark is 01, it means that the 0 address in Ram_n caches the latest data before the 0 address of Ram_1. Since this write operation is performed at the 0 address of Ram_1, the write operation is stored in the 0 address of Ram_1. The data at the address becomes the latest data. Therefore, at this time, it is necessary to set the cache value of the tag information at address 0 of R_x to 0, which is used to indicate that the latest data at address 0 of Ram_1 is no longer in Ram_n. On the contrary, if the tag information read from the 0 address of R_x does not meet the conditions of the highest cache value being 1 and the second memory tag being 01, then the tag information at the 0 address of R_x will not be changed.

在本申请实施例中，通过业务操作请求中携带的索引地址，可以在标记位存储器的索引地址处，获得冗余存储器在索引地址处是否有缓存与业务操作请求的第一存储器标记所对应的单端口存储器的最新数据，从而在业务操作为读操作请求的时候，根据获取的标记信息和索引地址，可以知道是从冗余存储器的索引地址处读数据，还是从第一存储器标记所对应的单端口存储器的索引地址处读数据，使得在执行读操作之前，不需要先通过其他存储器的访问来获得端口存储器的片选地址，降低了进行读操作时的访问时延，并且由于加入了一个用于缓存发生读写冲突时的写数据的冗余缓存器，和一个用来指示冗余存储器的索引地址是否缓存了最新数据的标记位存储器，避免了数据的丢失，另外，本申请实施例使用由一组数量可扩展的单端口存储器拼接成两端口存储器，与相关技术中使用同等容量的两端口存储器相比，可以节省一半左右的芯片面积。In this embodiment of the present application, through the index address carried in the business operation request, it is possible to obtain at the index address of the mark bit memory whether the redundant memory has a cache corresponding to the first memory mark of the business operation request at the index address. The latest data of the single-port memory, so when the business operation is a read operation request, based on the obtained tag information and index address, it can be known whether to read the data from the index address of the redundant memory or from the first memory tag corresponding to Reading data at the index address of the single-port memory eliminates the need to obtain the chip select address of the port memory through access to other memories before performing the read operation, which reduces the access delay during the read operation, and due to the addition of a A redundant buffer used to cache write data when a read-write conflict occurs, and a mark bit memory used to indicate whether the index address of the redundant memory caches the latest data, to avoid data loss. In addition, the embodiment of the present application Using a set of scalable single-port memories spliced into a two-port memory can save about half of the chip area compared to using two-port memories of the same capacity in related technologies.

上面各种方法的步骤划分，只是为了描述清楚，实现时可以合并为一个步骤或者对某些步骤进行拆分，分解为多个步骤，只要包括相同的逻辑关系，都在本专利的保护范围内；对算法中或者流程中添加无关紧要的修改或者引入无关紧要的设计，但不改变其算法和流程的核心设计都在该专利的保护范围内。The steps of the various methods above are divided just for the purpose of clear description. During implementation, they can be combined into one step or some steps can be split into multiple steps. As long as they include the same logical relationship, they are all within the scope of protection of this patent. ; Adding insignificant modifications or introducing insignificant designs to the algorithm or process without changing the core design of the algorithm and process are within the scope of protection of this patent.

本申请实施例还涉及一种两端口存储器，如图3所示，包括：接收模块301、获取模块302以及执行模块303。The embodiment of the present application also relates to a two-port memory, as shown in Figure 3, including: a receiving module 301, an acquisition module 302 and an execution module 303.

具体地说，接收模块301，用于接收业务操作请求，业务操作请求包括第一存储器标记和索引地址；其中，第一存储器标记用于唯一指示单端口存储器；获取模块302，用于基于索引地址，从标记位存储器获取标记信息；其中，标记信息用于指示冗余存储器是否在索引地址存储有第一存储器标记对应的单端口存储器的最新数据；执行模块303，用于在业务操作请求包括读操作请求的情况下，基于标记信息和索引地址，在冗余存储器或在第一单端口存储器中执行读操作请求；其中，所述第一单端口存储器为第一存储器标记所对应的单端口存储器。Specifically, the receiving module 301 is used to receive a service operation request. The service operation request includes a first memory tag and an index address; where the first memory tag is used to uniquely indicate a single-port memory; and the acquisition module 302 is used to obtain data based on the index address. , obtain the tag information from the tag bit memory; where the tag information is used to indicate whether the redundant memory stores the latest data of the single-port memory corresponding to the first memory tag at the index address; the execution module 303 is used to read when the business operation request includes In the case of an operation request, based on the tag information and the index address, the read operation request is executed in the redundant memory or in the first single-port memory; wherein the first single-port memory is the single-port memory corresponding to the first memory tag. .

在一个例子中，接收业务操作请求的两端口存储器的规格为4K*21，说明上述两端口存储器中有4个1K的单端口存储器，那么第一存储器标记的数据位宽为2bit，第一存储器标记为00、01、10和11时分别表示四个单端口存储器，索引地址的数据位宽为10bit，分别用来作为各单端口存储器、冗余存储器和标记位存储器的索引地址。因此，业务操作请求的数据位宽为10bit。In one example, the specification of the two-port memory that receives the service operation request is 4K*21, which means that there are four 1K single-port memories in the above two-port memory. Then the data bit width of the first memory mark is 2 bits. When marked as 00, 01, 10 and 11, they respectively represent four single-port memories. The data bit width of the index address is 10 bits, which are used as the index addresses of each single-port memory, redundant memory and mark bit memory respectively. Therefore, the data bit width requested by the business operation is 10 bits.

在一个例子中，两端口存储器的规格为4K*21，四块单端口存储器分别为Ram_0、Ram_1、Ram_2和Ram_3，其对应的第一存储器标记分别为00、01、10、11。当两端口存储器接收到读操作请求，读操作请求中携带的第一存储器标记为01，索引地址为1，那么表明请求发起方请求在Ram_1的1地址处执行读操作。In one example, the specification of the two-port memory is 4K*21, and the four single-port memories are Ram_0, Ram_1, Ram_2, and Ram_3, and their corresponding first memory labels are 00, 01, 10, and 11 respectively. When the two-port memory receives a read operation request, the first memory tag carried in the read operation request is 01, and the index address is 1, which indicates that the request initiator requests to perform a read operation at address 1 of Ram_1.

在一个例子中，两端口存储器的规格为4K*21，四块单端口存储器分别为Ram_0、Ram_1、Ram_2和Ram_3，其对应的第一存储器标记分别为00、01、10、11。当接收模块301接收到读操作请求，读操作请求中携带的第一存储器标记为01，索引地址为1，那么基于索引地址，获取模块302从标记位存储器的1地址处获取缓存值和第二存储器标记，即标记信息，标记信息指示冗余存储器在1地址处是否存储有Ram_1的最新数据。In one example, the specification of the two-port memory is 4K*21, and the four single-port memories are Ram_0, Ram_1, Ram_2, and Ram_3, and their corresponding first memory labels are 00, 01, 10, and 11 respectively. When the receiving module 301 receives the read operation request, the first memory mark carried in the read operation request is 01 and the index address is 1. Then based on the index address, the obtaining module 302 obtains the cache value and the second memory from the 1 address of the mark bit memory. The memory tag is tag information. The tag information indicates whether the redundant memory stores the latest data of Ram_1 at address 1.

在一个例子中，基于获取模块302获取到的标记信息，以及当前业务操作请求的具体类型，执行不同的步骤。例如：两端口存储器的规格为4K*21，四块单端口存储器分别为Ram_0、Ram_1、Ram_2和Ram_3，其对应的存储器标记分别为00、01、10、11，冗余存储器为Ram_n，标记位存储器为R_x。In one example, different steps are performed based on the tag information obtained by the acquisition module 302 and the specific type of the current business operation request. For example: the specification of the two-port memory is 4K*21, the four single-port memories are Ram_0, Ram_1, Ram_2, and Ram_3, and their corresponding memory marks are 00, 01, 10, and 11 respectively. The redundant memory is Ram_n, and the mark bit The memory is R_x.

在业务操作请求为读操作请求，读操作请求的第一存储器标记为00，索引地址为1的情况下，说明读操作要读的数据为Ram_0的1地址处所对应的数据，由于Ram_0的1地址处所对应的数据可能存放在Ram_n中，因此，首先需要判断要读的数据是否在Ram_n的1地址处，即查看R_x的1地址处的标记信息的内容，在R_x的1地址处的缓存值为1且第二存储器标记为00的情况下，则表明本次读操作要读的数据存放在Ram_n的1地址处，那么从Ram_n的1地址处读出对应的数据即可，若R_x的1地址处的标记信息不满足缓存值为1和第二存储器标记为00,则表明本次要读的数据不在Ram_n的1地址处，此时从Ram_0的1地址处读出对应的数据。When the business operation request is a read operation request, the first memory mark of the read operation request is 00, and the index address is 1, it means that the data to be read by the read operation is the data corresponding to the 1 address of Ram_0. Since the 1 address of Ram_0 The data corresponding to the location may be stored in Ram_n. Therefore, you first need to determine whether the data to be read is at the 1 address of Ram_n, that is, check the content of the tag information at the 1 address of R_x. The cache value at the 1 address of R_x is 1 and the second memory mark is 00, it means that the data to be read in this read operation is stored at the 1 address of Ram_n, then the corresponding data can be read from the 1 address of Ram_n. If the 1 address of R_x The tag information at does not satisfy that the cache value is 1 and the second memory tag is 00, which means that the data to be read this time is not at the 1 address of Ram_n. At this time, the corresponding data is read from the 1 address of Ram_0.

本申请实施例提供的两端口存储器，通过业务操作请求中携带的索引地址，可以在标记位存储器的索引地址处，获得冗余存储器在索引地址处是否有缓存与业务操作请求的第一存储器标记所对应的单端口存储器的最新数据，从而在业务操作为读操作请求的时候，根据获取的标记信息和索引地址，可以知道是从冗余存储器的索引地址处读数据，还是从第一存储器标记所对应的单端口存储器的索引地址处读数据，使得在执行读操作之前，不需要先通过其他存储器的访问来获得端口存储器的片选地址，降低了进行读操作时的访问时延，并且由于加入了一个用于缓存发生读写冲突时的写数据的冗余缓存器，和一个用来指示冗余存储器的索引地址是否缓存了最新数据的标记位存储器，避免了数据的丢失，另外，本申请实施例使用由一组数量可扩展的单端口存储器拼接成两端口存储器，与相关技术中使用同等容量的两端口存储器相比，可以节省一半左右的芯片面积。In the two-port memory provided by the embodiment of the present application, through the index address carried in the business operation request, it is possible to obtain at the index address of the mark bit memory whether the redundant memory has a cache at the index address and the first memory mark of the business operation request. The latest data of the corresponding single-port memory, so when the business operation is a read operation request, based on the acquired tag information and index address, it can be known whether to read data from the index address of the redundant memory or from the first memory tag The data is read at the index address of the corresponding single-port memory, so that before performing the read operation, there is no need to obtain the chip select address of the port memory through access to other memories, which reduces the access delay during the read operation, and because A redundant buffer is added to cache write data when a read-write conflict occurs, and a mark bit memory is used to indicate whether the index address of the redundant memory caches the latest data, avoiding data loss. In addition, this The application embodiment uses a set of scalable single-port memories to be spliced into a two-port memory. Compared with the use of two-port memories of the same capacity in related technologies, about half of the chip area can be saved.

不难发现，本实施方式为上述应用于两端口存储器的两端口存储器的运行方法实施例相对应的装置实施例，本实施方式可与上述应用于两端口存储器的两端口存储器的运行方法实施例互相配合实施。上述应用于两端口存储器的两端口存储器的运行方法实施例提到的相关技术细节在本实施方式中依然有效，为了减少重复，这里不再赘述。相应地，本实施方式中提到的相关技术细节也可应用在上述应用两端口存储器的两端口存储器的运行方法实施例中。It is not difficult to find that this embodiment is a device embodiment corresponding to the above-mentioned embodiment of the operation method of a two-port memory applied to a two-port memory. This embodiment can be compared with the above embodiment of the operation method of a two-port memory applied to a two-port memory. Cooperate with each other to implement. The relevant technical details mentioned in the above embodiment of the two-port memory operating method applied to the two-port memory are still valid in this implementation mode, and will not be described again here in order to reduce duplication. Correspondingly, the relevant technical details mentioned in this embodiment can also be applied to the above embodiment of the operating method of a two-port memory using a two-port memory.

值得一提的是，本申请上述实施方式中所涉及到的各模块均为逻辑模块，在实际应用中，一个逻辑单元可以是一个物理单元，也可以是一个物理单元的一部分，还可以以多个物理单元的组合实现。此外，为了突出本申请的创新部分，本实施方式中并没有将与解决本申请所提出的技术问题关系不太密切的单元引入，但这并不表明本实施方式中不存在其它的单元。It is worth mentioning that each module involved in the above-mentioned embodiments of the present application is a logical module. In practical applications, a logical unit can be a physical unit, or a part of a physical unit, or it can be in the form of multiple The combination of physical units is realized. In addition, in order to highlight the innovative part of this application, units that are not closely related to solving the technical problems raised in this application are not introduced in this embodiment, but this does not mean that other units do not exist in this embodiment.

本申请的实施例还提供一种电子设备，如图4所示，包括至少一个处理器401；以及，与所述至少一个处理器401通信连接的存储器402；其中，所述存储器402存储有可被所述至少一个处理器401执行的指令，所述指令被所述至少一个处理器401执行，以使所述至少一个处理器能够执行上述两端口存储器的运行方法。An embodiment of the present application also provides an electronic device, as shown in Figure 4, including at least one processor 401; and a memory 402 communicatively connected to the at least one processor 401; wherein the memory 402 stores information that can Instructions executed by the at least one processor 401, the instructions are executed by the at least one processor 401, so that the at least one processor can execute the above two-port memory operating method.

其中，存储器和处理器采用总线方式连接，总线可以包括任意数量的互联的总线和桥，总线将一个或多个处理器和存储器的各种电路连接在一起。总线还可以将诸如外围设备、稳压器和功率管理电路等之类的各种其他电路连接在一起，这些都是本领域所公知的，因此，本文不再对其进行进一步描述。总线接口在总线和收发机之间提供接口。收发机可以是一个元件，也可以是多个元件，比如多个接收器和发送器，提供用于在传输介质上与各种其他装置通信的单元。经处理器处理的数据通过天线在无线介质上进行传输，进一步，天线还接收数据并将数据传送给处理器。Among them, the memory and the processor are connected using a bus. The bus can include any number of interconnected buses and bridges. The bus connects one or more processors and various circuits of the memory together. The bus may also connect various other circuits together such as peripherals, voltage regulators, and power management circuits, which are all well known in the art and therefore will not be described further herein. The bus interface provides the interface between the bus and the transceiver. A transceiver may be one element or may be multiple elements, such as multiple receivers and transmitters, providing a unit for communicating with various other devices over a transmission medium. The data processed by the processor is transmitted over the wireless medium through the antenna. Further, the antenna also receives the data and transmits the data to the processor.

处理器负责管理总线和通常的处理，还可以提供各种功能，包括定时，外围接口，电压调节、电源管理以及其他控制功能。而存储器可以被用于存储处理器在执行操作时所使用的数据。The processor is responsible for managing the bus and general processing, and can also provide a variety of functions, including timing, peripheral interfaces, voltage regulation, power management, and other control functions. Memory can be used to store data used by the processor when performing operations.

上述产品可执行本申请实施例所提供的方法，具备执行方法相应的功能模块和有益效果，未在本实施例中详尽描述的技术细节，可参见本申请实施例所提供的方法。The above-mentioned products can execute the methods provided by the embodiments of this application and have corresponding functional modules and beneficial effects for executing the methods. For technical details not described in detail in this embodiment, please refer to the methods provided by the embodiments of this application.

本申请的实施例还提供一种计算机可读存储介质，存储有计算机程序。计算机程序被处理器执行时实现上述方法实施例。Embodiments of the present application also provide a computer-readable storage medium storing a computer program. The above method embodiments are implemented when the computer program is executed by the processor.

本领域技术人员可以理解，实现上述实施例方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成，该程序存储在一个存储介质中，包括若干指令用以使得一个设备(可以是单片机，芯片等)或处理器(processor)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(ROM，Read-OnlyMemory)、随机存取存储器(RAM，Random Access Memory)、磁碟或者光盘等各种可以存储程序代码的介质。Those skilled in the art can understand that all or part of the steps in the methods of the above embodiments can be completed by instructing relevant hardware through a program. The program is stored in a storage medium and includes several instructions to make a device (which may be A microcontroller, a chip, etc.) or a processor (processor) executes all or part of the steps of the methods described in various embodiments of this application. The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program code.

上述实施例是提供给本领域普通技术人员来实现和使用本申请的，本领域普通技术人员可以在脱离本申请的发明思想的情况下，对上述实施例做出种种修改或变化，因而本申请的保护范围并不被上述实施例所限，而应该符合权利要求书所提到的创新性特征的最大范围。The above embodiments are provided for those of ordinary skill in the art to implement and use the present application. Those of ordinary skill in the art can make various modifications or changes to the above embodiments without departing from the inventive concept of the present application. Therefore, the present application The scope of protection is not limited by the above embodiments, but should comply with the maximum scope of the innovative features mentioned in the claims.