CN1450622A - Method of forming shallow trench isolation sidewall oxide with low stress no-erosion region - Google Patents
- ️Wed Oct 22 2003
Info
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Publication number
- CN1450622A CN1450622A CN 02106095 CN02106095A CN1450622A CN 1450622 A CN1450622 A CN 1450622A CN 02106095 CN02106095 CN 02106095 CN 02106095 A CN02106095 A CN 02106095A CN 1450622 A CN1450622 A CN 1450622A Authority
- CN
- China Prior art keywords
- dielectric layer
- trench isolation
- steam generation
- shallow trench
- sidewall oxide Prior art date
- 2002-04-10 Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 88
- 238000002955 isolation Methods 0.000 title claims abstract description 23
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000001301 oxygen Substances 0.000 claims abstract description 10
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 10
- 238000011065 in-situ storage Methods 0.000 claims abstract description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims 6
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 claims 3
- 230000003647 oxidation Effects 0.000 abstract description 19
- 238000007254 oxidation reaction Methods 0.000 abstract description 19
- 125000002887 hydroxy group Chemical group [H]O* 0.000 abstract description 5
- 230000035484 reaction time Effects 0.000 abstract description 4
- 230000003628 erosive effect Effects 0.000 abstract 2
- 238000012545 processing Methods 0.000 description 26
- 230000002262 irrigation Effects 0.000 description 17
- 238000003973 irrigation Methods 0.000 description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- 239000000463 material Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000007797 corrosion Effects 0.000 description 3
- 238000005260 corrosion Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 238000002207 thermal evaporation Methods 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 230000002950 deficient Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000009279 wet oxidation reaction Methods 0.000 description 2
- 241000293849 Cordylanthus Species 0.000 description 1
- QRSFFHRCBYCWBS-UHFFFAOYSA-N [O].[O] Chemical compound [O].[O] QRSFFHRCBYCWBS-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 210000003323 beak Anatomy 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- -1 hydroxyl (Hydroxyl) Chemical group 0.000 description 1
- 238000003701 mechanical milling Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
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Abstract
The present invention discloses a method for forming a shallow trench isolation sidewall oxide layer with a low stress and no erosion region. The present invention utilizes oxygen and hydroxyl to perform an in-situ steam generation process to form a sidewall oxide layer in the shallow trench isolation. The sidewall oxide layer formed by the method of the present invention has low stress, no erosion zone phenomenon and much shorter reaction time than the conventional thermal oxidation process.
Description
(1) technical field
The relevant a kind of method that forms shallow-channel isolating side wall oxide layer of the present invention, particularly a kind of relevant for forming the method that the low stress shallow-channel isolating side wall oxide layer can not cause corrosion area (Encroachment) simultaneously.
(2) background technology
When the integrated level of integrated circuit constantly increases, the size of the isolated area in the semiconductor element between the active region must constantly be dwindled.Traditional regional oxidizing process (LOCOS) that is used to isolate active region is to form field oxide with thermal oxidation method, in the semiconductor element between the active region effective isolation length then be subject to the field oxide that forms with thermal oxidation method, therefore the isolation effect of the field oxide isolated area that forms with thermal oxidation method does not apply required gradually.In addition, traditional regional oxidizing process still has the shortcoming that stems from its processing procedure itself, for instance, the oxidation at the following active region edge of diffusion layer cover curtain (Diffusion layer mask) causes the field oxide edge to have the shape of a beak (Bird ' s beak) on the silicon base material.
For fear of the shortcoming of above-mentioned zone oxidizing process, a kind of isolation technology of irrigation canals and ditches that utilizes is developed.The fabrication steps of trench isolation comprises the etching silicon ground to form irrigation canals and ditches haply, deposit an oxide layer to fill up this irrigation canals and ditches with chemical vapour deposition technique (CVD), and, again the oxide layer of active region top is removed with this oxide layer surface of chemical mechanical milling method (CMP) planarization.
According to above-mentioned technology, silicon base material is etched to a predetermined degree of depth, and good isolation effect is provided.In addition, field oxide is with the long-pending method deposition in chemical gaseous phase Shen, means that the isolation region structure that forms in follow-up micro-photographing process with respect to the field oxide that forms with thermal oxidation method can keep consistency.Above-mentioned just famous shallow trench isolation (the Shallow Trench Isolation) processing procedure of technology that is used for isolated component.
However, traditional shallow trench isolation processing procedure still has several shortcomings.Fig. 1 shows the profile of a traditional shallow trench isolation.Show a
silicon base material100, a
silicon dioxide layer102 and a
silicon nitride layer104 among Fig. 1.One
sidewall oxide106 is formed in the irrigation canals and ditches with traditional oxidation process, and this oxidation process is generally boiler tube dry-type or wet oxidation process.This
sidewall oxide106 is to be used to eliminate the damage that etching causes and to reduce follow-up silicon dioxide the stress that produces when inserting.But 106 of this sidewall oxides have big stress when forming.This is because be used for forming the conventional oxidation processing procedure, particularly wet oxidation process of
sidewall oxide106, always forms the oxide layer of big stress.The stress of
sidewall oxide106 will make contiguous active area (Active Region) produce defective (Defect).And these defectives can cause leakage current and reduce the reliability of neighbouring element.In addition, in order to form
sidewall oxide106, traditional oxidation process always need expend a few hours.Therefore traditional oxidation process will can't satisfy the requirement of modern semiconductors processing procedure gradually.
Because the shortcoming of above-mentioned conventional process, therefore be necessary to develop and a kind of novel progressive processing procedure overcoming the shortcoming of conventional process, and the present invention just can meet such demand.
(3) summary of the invention
A purpose of the present invention is for providing a kind of method that forms the low stress shallow-channel isolating side wall oxide layer.
Another object of the present invention is for providing the shallow trench isolation processing procedure that a kind of cost is lower and the processing procedure time is short.
Another purpose of the present invention is for providing a kind of reliable shallow trench isolation processing procedure, and this processing procedure can be guaranteed the isolation quality between the element active area.
In order to realize above-mentioned purpose, a kind of method that forms shallow-channel isolating side wall oxide layer is provided according to an aspect of the present invention, be characterized in, comprise the following step at least: a ground is provided, and this ground has second dielectric layer that thereon first dielectric layer and covers this first dielectric layer; Form irrigation canals and ditches and enter this ground; And carry out the exposed surface of a situ steam generation processing procedure with these irrigation canals and ditches of oxidation, this situ steam generation processing procedure comprises at least introduces oxygen and hydroxyl.
A kind of method that forms shallow-channel isolating side wall oxide layer is provided according to a further aspect of the invention, is characterized in, comprise the following steps: to provide a ground at least, this ground has second dielectric layer that thereon one first dielectric layer and covers this first dielectric layer; Form irrigation canals and ditches and enter this ground; And carry out situ steam generation processing procedure exposed surface with these irrigation canals and ditches of oxidation between about 700 ℃ to about 1200 ℃, this situ steam generation processing procedure comprises at least introduces oxygen and hydroxyl.
Provide a kind of method that forms shallow-channel isolating side wall oxide layer according to another aspect of the invention, be characterized in, comprise the following steps: to provide a ground at least, this ground has second dielectric layer that thereon first dielectric layer and covers this first dielectric layer; Form irrigation canals and ditches with a dry-etching method and enter this ground; And carry out situ steam generation processing procedure exposed surface with these irrigation canals and ditches of oxidation between about 700 ℃ to about 1200 ℃ and in a Rapid Thermal deposition chamber, this situ steam generation processing procedure comprises at least introduces oxygen and hydroxyl.
For further specifying purpose of the present invention, design feature and effect, the present invention is described in detail below with reference to accompanying drawing.
(4) description of drawings
Fig. 1 is the profile that shows a traditional shallow trench isolation; Fig. 2 A shows that two dielectric layers are formed at the schematic diagram on the ground in regular turn;
Fig. 2 shows that forming irrigation canals and ditches enters structure shown in Fig. 2 A and conformal generation one dielectric layer result schematic diagram thereon; And
Fig. 3 is the schematic diagram that shows a process system.
(5) embodiment
In this mandatory declaration is that fabrication steps described below and structure do not comprise complete processing procedure.The present invention can implement by various integrated circuit manufacture process technology, only mentions at this and understands process technique required for the present invention.Below will appended diagram be described in detail, and please note that diagram will be simple form and not according to scaling, and size all is beneficial to understand the present invention by exaggerative according to the present invention.
Shown in figure 2A, show among the figure that dielectric layer 202 and 204 is formed on the ground 200 in regular turn.This ground 200 comprises at least and one has＜100〉lattice direction silicon base material, but is not limited to have＜100〉lattice direction silicon base material.Ground 200 also can comprise silicon (Silicon OnInsulator) ground on the insulating barrier.Dielectric layer 202 comprises a silicon dioxide layer or a silicon oxidation nitrogen layer with thermal oxidation method formation at least, but is not limited to silicon dioxide layer or silicon oxidation nitrogen layer with thermal oxidation method formation.The thickness of dielectric layer 202 is that about 20 dusts are between about 300 dusts.Dielectric layer 204 comprises a silicon nitride layer at least, and method that this silicon nitride layer can be traditional forms, chemical vapour deposition technique for example, other meet spirit of the present invention material also should not be excluded.The thickness of dielectric layer 204 is that about 100 dusts are between about 2000 dusts.
Shown in figure 2B, irrigation canals and ditches (Trench) form with ground 200 through etching dielectric layer 204, dielectric layer 202, and a dielectric layer 206 conformal being created on these irrigation canals and ditches.The degree of depth of these irrigation canals and ditches depends on which kind of element the element that this shallow trench isolation is isolated is, for instance, for flash memory (FlashMemory), the degree of depth of these irrigation canals and ditches is that about 2500 dusts are to about 4500 dusts, and for logic element such as metal-oxide semiconductor (MOS) (MOS) transistor, the degree of depth of these irrigation canals and ditches is that about 2000 dusts are to about 4000 dusts.These irrigation canals and ditches be with anisotropic etching for example reactive ion etching form preferablely, but other traditional etching methods also can use.Dielectric layer 206 comprises a silicon dioxide layer with the formation of situ steam generation (ISSG) (In Situ SteamGenerated) processing procedure at least.The thickness of dielectric layer 206 is that about 50 dusts are between about 500 dusts.Though this ISSG processing procedure can carry out in a traditional equipment, but still preferable to carry out in a Rapid Thermal deposition chamber (Rapid Thermal Processing Chamber), especially a single-chip deposition chamber (Single Wafer Chamber).The semiconductor industry has many kinds of equipment to can be used to carry out the ISSG processing procedure.Fig. 3 shows a Centura 5000 type processing
procedure plateform systems300, and this processing procedure plateform system is by US business Applied Materials (Applied Materials Corporation) production and sales.One Rapid
Thermal deposition chamber320 fasten extension (Bolted) to a vacuum transfer chamber (Vacuum Transfer Chamber) 310.Still having a deposition chamber (Process Chamber) 322, one cooling chamber (Cool Down Chamber) 330 to fasten with the brilliant boat isolation ward of vacuum (Vacuum Cassette Loadlock) 340 and 342 in addition hangs to vacuum transfer chamber 310.Dielectric layer 206 is to comprise at least in the atmosphere (Atmosphere) of oxygen (Oxygen) and hydroxyl (Hydroxyl) in one to generate between about 700 ℃ to about 1200 ℃.The flow of oxygen is about 1 centimetre 3/ second (sccm) (Standard Cubic Centimeter per Minute) is to about 30 centimetres 3/ second, the flow of hydrogen is about 0.1 centimetre 3/ second is to about 15 centimetres 3/ second.The reaction time of this ISSG processing procedure is about 1 minute to about 5 minutes.The reaction time of ISSG processing procedure is depended on the thickness of required dielectric layer 206.The present invention utilizes oxygen and hydroxyl to carry out an ISSG processing procedure to form a sidewall oxide in shallow trench isolation.The sidewall oxide that forms with method of the present invention has low stress and can not cause corrosion area (Encroachment) and reaction time also short more than the traditional hot oxidation process that often must exhaust three to five hours simultaneously.
Certainly, those of ordinary skill in the art will be appreciated that, above embodiment is used for illustrating the present invention, and be not to be used as limitation of the invention, as long as in connotation scope of the present invention, all will drop in the scope of claims of the present invention variation, the modification of the above embodiment.
Claims (10)
1.一种形成浅沟渠隔离侧壁氧化层的方法，其特征在于，至少包含下列步骤：1. A method for forming a shallow trench isolation sidewall oxide layer, characterized in that it at least comprises the following steps: 提供一底材，该底材具有一于其上的第一介电层及一覆盖该第一介电层的第二介电层；providing a substrate having a first dielectric layer thereon and a second dielectric layer overlying the first dielectric layer; 形成一沟渠进入该底材；及forming a ditch into the substrate; and 执行一原位蒸汽发生制程以氧化该沟渠的曝露表面，该原位蒸汽发生制程至少包含引入氧与氢氧根。An in-situ steam generation process is performed to oxidize the exposed surface of the trench. The in-situ steam generation process includes at least introducing oxygen and hydroxide. 2.如权利要求1所述的方法，其特征在于，该第一介电层至少包含一二氧化硅层。2. The method of claim 1, wherein the first dielectric layer comprises at least a silicon dioxide layer. 3.如权利要求1所述的方法，其特征在于，该第一介电层至少包含一硅氧化氮层。3. The method of claim 1, wherein the first dielectric layer comprises at least a silicon nitride oxide layer. 4.如权利要求1所述的方法，其特征在于，该第二介电层至少包含一氮化硅层。4. The method of claim 1, wherein the second dielectric layer comprises at least a silicon nitride layer. 5.如权利要求1所述的方法，其特征在于，该第二介电层至少包含一硅氧化氮层。5. The method of claim 1, wherein the second dielectric layer comprises at least a silicon nitride oxide layer. 6.如权利要求1所述的方法，其特征在于，该原位蒸汽发生制程是于一快速热制程室中进行。6. The method of claim 1, wherein the in-situ steam generation process is performed in a rapid thermal process chamber. 7.如权利要求1所述的方法，其特征在于，该氧的流量为约1厘米3/秒至约30厘米3/秒。7. The method of claim 1, wherein the flow rate of the oxygen is about 1 cm3 /sec to about 30 cm3 /sec. 8.如权利要求1所述的方法，其特征在于，所述的该氢气的流量为约0.1厘米3/秒至约15厘米3/秒。8. The method of claim 1, wherein the flow rate of the hydrogen gas is about 0.1 cm 3 /sec to about 15 cm 3 /sec. 9.一种形成浅沟渠隔离侧壁氧化层的方法，其特征在于，至少包括下列步骤：9. A method for forming a shallow trench isolation sidewall oxide layer, characterized in that at least comprising the following steps: 提供一底材，该底材具有于其上的一第一介电层及一覆盖该第一介电层的第二介电层；providing a substrate having a first dielectric layer thereon and a second dielectric layer overlying the first dielectric layer; 形成一沟渠进入该底材；及forming a ditch into the substrate; and 执行一原位蒸汽发生制程于约700℃至约1200℃之间以氧化该沟渠的曝露表面，该原位蒸汽发生制程至少包含引入氧与氢氧根。An in-situ steam generation process is performed at a temperature between about 700° C. and about 1200° C. to oxidize the exposed surface of the trench. The in-situ steam generation process includes at least introducing oxygen and hydroxide. 10.一种形成浅沟渠隔离侧壁氧化层的方法，其特征在于，至少包括下列步骤：10. A method for forming a shallow trench isolation sidewall oxide layer, characterized in that at least comprising the following steps: 提供一底材，该底材具有一于其上的第一介电层及一覆盖该第一介电层的第二介电层；providing a substrate having a first dielectric layer thereon and a second dielectric layer overlying the first dielectric layer; 以一干式蚀刻法形成一沟渠进入该底材；及forming a trench into the substrate by a dry etching method; and 执行一原位蒸汽发生制程于约700℃至约1200℃之间且于一快速热制程室中以氧化该沟渠的曝露表面，该原位蒸汽发生制程至少包含引入氧与氢氧根。An in-situ steam generation process is performed at between about 700° C. and about 1200° C. in a rapid thermal process chamber to oxidize the exposed surface of the trench, the in-situ steam generation process including introducing at least oxygen and hydroxide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02106095 CN1450622A (en) | 2002-04-10 | 2002-04-10 | Method of forming shallow trench isolation sidewall oxide with low stress no-erosion region |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 02106095 CN1450622A (en) | 2002-04-10 | 2002-04-10 | Method of forming shallow trench isolation sidewall oxide with low stress no-erosion region |
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| CN1450622A true CN1450622A (en) | 2003-10-22 |
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Cited By (2)
* Cited by examiner, † Cited by third party| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1324694C (en) * | 2004-08-17 | 2007-07-04 | 旺宏电子股份有限公司 | Method of making inner polysilicon dielectric layer |
| CN100461342C (en) * | 2005-04-18 | 2009-02-11 | 力晶半导体股份有限公司 | Method for forming groove type gate dielectric layer |
-
2002
- 2002-04-10 CN CN 02106095 patent/CN1450622A/en active Pending
Cited By (2)
* Cited by examiner, † Cited by third party| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1324694C (en) * | 2004-08-17 | 2007-07-04 | 旺宏电子股份有限公司 | Method of making inner polysilicon dielectric layer |
| CN100461342C (en) * | 2005-04-18 | 2009-02-11 | 力晶半导体股份有限公司 | Method for forming groove type gate dielectric layer |
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