CN1567582A - Flip chip packaging joint structure and method for manufacturing same - Google Patents

本发明涉及一种覆晶封装接合结构及其制造方法，包括有：一基板，其表面形成数个接合垫以作为该基板的导电线路；一组件，其表面形成数个导电凸块，该导电凸块侧面是具有一绝缘膜以隔绝其侧向的电性导通，该数个导电凸块压合于该数个接合垫，以电性连接该基板与该组件；及一各向异性导电接着剂，包括有数个导电粒子，该各向异性导电接着剂是涂布于该基板与该组件的接合区域以接着该基板与该组件。本发明可以防止接点之间因导电接着剂的导电粒子聚集而产生的短路现象，是应用于使用导电性接着剂的细线宽与细间距组件覆晶封装。

The invention relates to a flip-chip package bonding structure and a manufacturing method thereof, comprising: a substrate with several bonding pads formed on its surface as conductive lines of the substrate; a component with several conductive bumps formed on its surface, the conductive There is an insulating film on the side of the bump to isolate its lateral electrical conduction, and the plurality of conductive bumps are pressed on the plurality of bonding pads to electrically connect the substrate and the component; and an anisotropic conductive The adhesive includes several conductive particles, and the anisotropic conductive adhesive is coated on the bonding area of the substrate and the component to bond the substrate and the component. The invention can prevent the short-circuit phenomenon between the contacts due to the aggregation of conductive particles of the conductive adhesive, and is applied to flip-chip packaging of thin-line width and fine-pitch components using the conductive adhesive.

覆晶封装接合结构及其制造方法Flip chip package bonding structure and manufacturing method thereof

技术领域technical field

本发明涉及一种覆晶封装接合结构及其制造方法，特别涉及一种使用异方性导电接着剂的覆晶封装接合结构及其制造方法。The present invention relates to a flip-chip packaging bonding structure and a manufacturing method thereof, in particular to a flip-chip packaging bonding structure using an anisotropic conductive adhesive and a manufacturing method thereof.

背景技术Background technique

伴随着电子产品朝向轻、薄、短、小、高速化与高机能化的发展趋势，而使得半导体组件封装技术对于增加组件可靠度、接合密度以及减少组件尺寸方面的要求不断提高，因此传统打线接合(wire bonding)逐渐被覆晶封装(flip-chip倒装)技术所取代。With the development trend of electronic products towards lightness, thinness, shortness, smallness, high speed and high function, the requirements of semiconductor component packaging technology for increasing component reliability, joint density and reducing component size are constantly increasing. Therefore, traditional printing Wire bonding is gradually being replaced by flip-chip packaging technology.

覆晶封装技术是以芯片与基板的接合面形成焊球数组(array of solderball)或是导电凸块(bump)以取代公知封装技术所使用的导线架(leadframe)。通过直接压合芯片与基板的接合面之间的焊球数组(array of solderball)或导电凸块来达成电路导通，可降低芯片与基板间的电子讯号传输距离，适用于高速组件的封装。公知的覆晶封装方法，系于芯片及基板的表面形成导电凸块(bump)等接合结构，然后在基板表面涂布接着剂；再将芯片及基板表面的导电凸块经过对位压合以完成覆晶封装结构。在芯片与基板间使用接着剂加以接合时，由于两者具有严重的热膨胀系数差异，当温度产生变化时，热应力的影响容易使芯片及基板的导电凸块接点产生变形。The flip-chip packaging technology is to form an array of solderballs or conductive bumps on the joint surface of the chip and the substrate to replace the leadframe used in the known packaging technology. Circuit conduction is achieved by directly pressing the array of solderballs or conductive bumps between the bonding surface of the chip and the substrate, which can reduce the electronic signal transmission distance between the chip and the substrate, and is suitable for packaging of high-speed components. The known flip-chip packaging method is to form a bonding structure such as a conductive bump (bump) on the surface of the chip and the substrate, and then apply an adhesive on the surface of the substrate; Complete the flip-chip package structure. When using an adhesive to bond the chip and the substrate, due to the serious difference in thermal expansion coefficient between the two, when the temperature changes, the influence of thermal stress will easily deform the conductive bump contacts of the chip and the substrate.

为了减少接着剂、基板和芯片间的热膨胀系数差异以及增加接点的强度，可在胶材中混入适当的粒子以调整接着剂的热膨胀系数差异，并可在接着剂中添加适当浓度的导电粒子，以形成各向异性导电接着剂(AnisotropicConductive Film，ACF)。但是在极细间距的情况下，各向异性导电接着剂的导电粒子容易聚集于接点的侧面而产生相邻接点短路的情形，因此其所能应用的线宽和间距受限。In order to reduce the difference in thermal expansion coefficient between the adhesive, the substrate and the chip and increase the strength of the joint, appropriate particles can be mixed into the adhesive to adjust the difference in thermal expansion coefficient of the adhesive, and conductive particles of appropriate concentration can be added to the adhesive. To form anisotropic conductive adhesive (Anisotropic Conductive Film, ACF). However, in the case of very fine pitch, the conductive particles of the anisotropic conductive adhesive are likely to gather on the side of the contact and cause a short circuit between adjacent contacts, so the applicable line width and spacing are limited.

发明内容Contents of the invention

法，在芯片与基板的接点侧面形成绝缘膜，以阻绝接点之间因导电接着剂的导电粒子聚集而产生的短路现象，此覆晶封装接合结构能应用于细线宽与细间距的组件覆晶封装。In this method, an insulating film is formed on the side of the contact between the chip and the substrate to prevent the short circuit between the contacts due to the accumulation of conductive particles of the conductive adhesive. crystal package.

本发明公开一种使用各向异性导电接着剂的覆晶封装接合结构及其制造方法，是利用组件与基板的接点侧面的绝缘膜以隔绝其侧向的电性导通，其组件结构是以绝缘膜包覆于接点侧面直接阻隔导电性接着剂的导电粒子，防止接点间因导电粒子聚集而产生的短路现象。其覆晶封装接合结构是由基板、组件及各向异性导电接着剂所形成，其中基板表面形成数个接合垫以作为基板的导电线路；组件表面形成数个导电凸块，导电凸块侧面是形成一绝缘膜，其导电凸块压合于基板的接合垫，以形成基板与组件的电性导通；及包括有数个导电粒子的导电性接着剂，是填充于基板和组件的接合区域以电性连接基板与组件。The invention discloses a flip-chip package bonding structure using an anisotropic conductive adhesive and a manufacturing method thereof. The insulating film on the contact side of the component and the substrate is used to isolate the lateral electrical conduction. The component structure is based on The insulating film is coated on the side of the contacts to directly block the conductive particles of the conductive adhesive, preventing the short circuit between the contacts due to the aggregation of conductive particles. The bonding structure of the flip-chip package is formed by the substrate, components and anisotropic conductive adhesive, in which several bonding pads are formed on the surface of the substrate as the conductive lines of the substrate; several conductive bumps are formed on the surface of the component, and the sides of the conductive bumps are Forming an insulating film, the conductive bumps of which are pressed against the bonding pads of the substrate to form electrical conduction between the substrate and the components; and a conductive adhesive including several conductive particles, which is filled in the bonding area between the substrate and the components to Electrically connect the substrate and components.

此外，本发明还包括覆晶封装接合结构的制造方法，是在上述的组件和基板的表面分别形成数个导电凸块与接合垫；于每一导电凸块侧面形成绝缘膜；同时于基板表面涂布各向异性导电接着剂；再将组件表面的数个导电导电凸块对准基板表面的数个接合垫后压合，并且固化各向异性导电接着剂。由于导电粒子也可能堆积于基板的接合垫之间而导致短路，故于基板的接合垫侧面形成一绝缘膜。In addition, the present invention also includes a manufacturing method of the flip-chip package bonding structure, which is to form several conductive bumps and bonding pads on the surface of the above-mentioned components and the substrate; form an insulating film on the side of each conductive bump; Coating the anisotropic conductive adhesive; then aligning several conductive bumps on the surface of the component with several bonding pads on the surface of the substrate and pressing them together, and curing the anisotropic conductive adhesive. Since the conductive particles may accumulate between the bonding pads of the substrate and cause a short circuit, an insulating film is formed on the side of the bonding pads of the substrate.

附图说明Description of drawings

图1为本发明第一实施例的结构示意图；Fig. 1 is the structural representation of the first embodiment of the present invention;

图2和图3为本发明的绝缘膜分布示意图；Fig. 2 and Fig. 3 are the distribution schematic diagrams of insulating film of the present invention;

图4至图6为绝缘膜的制作流程示意图；4 to 6 are schematic diagrams of the manufacturing process of the insulating film;

图7至图9为绝缘膜的制作流程示意图；7 to 9 are schematic diagrams of the manufacturing process of the insulating film;

图10为本发明第一实施例的制作流程图；及Fig. 10 is a production flowchart of the first embodiment of the present invention; and

图11为本发明第二实施例的结构示意图。Fig. 11 is a schematic structural diagram of the second embodiment of the present invention.

其中附图标记where reference signs

100    芯片100 chips

110    导电凸块110 conductive bumps

111    绝缘膜111 insulating film

111        绝缘膜111 insulating film

120        导电性接着剂120 Conductive adhesive

130        光罩130 mask

140        研磨轮140 grinding wheel

121        导电粒子121 Conductive particles

200        基板200 substrate

210        接合垫210 Bonding pad

211        绝缘膜211 insulating film

步骤310    提供一芯片，在其表面形成数个导电凸块Step 310 provides a chip and forms several conductive bumps on its surface

步骤320    提供一基板，于其表面形成数个接合垫Step 320 Provide a substrate and form several bonding pads on its surface

步骤330    于芯片表面形成绝缘膜Step 330 Form an insulating film on the surface of the chip

步骤340    将含有导电粒子的各向异性导电接着剂覆盖于基板上Step 340 Cover the substrate with the anisotropic conductive adhesive containing conductive particles

步骤350    对位压合芯片与基板以并固化各向异性导电接着剂以形成覆晶封装接合结构Step 350 Align and press the chip and the substrate to cure the anisotropic conductive adhesive to form a flip-chip package bonding structure

具体实施方式Detailed ways

为使对本发明的目的、构造特征及其功能有进一步的了解，配合附图详细说明如下：In order to have a further understanding of the purpose of the present invention, structural features and functions thereof, the accompanying drawings are described in detail as follows:

根据本发明所公开的覆晶(flip chip，倒装片)封装接合结构及其制造方法，是为解决使用各向异性导电接着剂以接合组件与基板，其间距缩小时所容易产生的短路问题。各向异性导电接着剂中含有相当浓度的导电粒子，浓度越高其导电性质越好，相对也容易因导电粒子聚集在接点之间而产生短路，其可应用于各种半导体封装及组装结构，特别是芯片与基板的接合。According to the disclosed flip chip (flip chip, flip-chip) packaging bonding structure and manufacturing method thereof, it is to solve the short circuit problem that is likely to occur when the spacing between components and substrates is reduced by using an anisotropic conductive adhesive. . The anisotropic conductive adhesive contains a considerable concentration of conductive particles. The higher the concentration, the better the conductivity, and it is relatively easy to cause a short circuit due to the accumulation of conductive particles between the contacts. It can be applied to various semiconductor packaging and assembly structures. Especially chip-to-substrate bonding.

本发明的较佳实施例，是由基板、芯片及各向异性导电接着剂所形成，请参考图1，其为本发明第一实施例的结构示意图，其包括：一芯片100，其表面具有数个导电凸块110，其导电凸块110的侧面是具有绝缘膜111；一基板200，其表面具有数个接合垫210；以及一各向异性导电接着剂120，是为含有导电粒子121的高分子材料。芯片100与基板200是以面对面的方式接合使数个导电凸块110个别地压合于数个接合垫210之上而形成电性导通。其中，本发明的特征点是在于芯片与基板的接点的侧面，如导电凸块或接合垫，形成绝缘膜。依制造过程或应用的差异，其绝缘膜的分布形式可配合调整，如仅涂布于接点周围或是涂布于整个芯片表面仅露出接合处，即填充于各个导电凸块之间或接合垫之间的间隙。请参考图2和图3，其为本发明的绝缘膜分布示意图。A preferred embodiment of the present invention is formed by a substrate, a chip and an anisotropic conductive adhesive. Please refer to FIG. A plurality of conductive bumps 110, the side of the conductive bump 110 has an insulating film 111; a substrate 200, its surface has a plurality of bonding pads 210; and an anisotropic conductive adhesive 120 is for containing conductive particles 121 Polymer Materials. The chip 100 and the substrate 200 are bonded in a face-to-face manner so that several conductive bumps 110 are individually pressed on several bonding pads 210 to form electrical conduction. Among them, the characteristic point of the present invention is that an insulating film is formed on the side of the contact between the chip and the substrate, such as a conductive bump or a bonding pad. Depending on the manufacturing process or application, the distribution of the insulating film can be adjusted, such as coating only around the contacts or coating the entire chip surface and only exposing the joints, that is, filling between conductive bumps or bonding pads the gap between. Please refer to FIG. 2 and FIG. 3 , which are schematic diagrams of the distribution of the insulating film of the present invention.

如图2所示，绝缘膜111是仅形成于芯片100表面的导电凸块110周围。As shown in FIG. 2 , the insulating film 111 is only formed around the conductive bump 110 on the surface of the chip 100 .

如图3所示，绝缘膜111是形成于芯片100的整个接合表面，即填充于各个导电凸块110之间的间隙，仅露出导电凸块110导电接合面。As shown in FIG. 3 , the insulating film 111 is formed on the entire bonding surface of the chip 100 , that is, it fills the gap between each conductive bump 110 , and only the conductive bonding surface of the conductive bump 110 is exposed.

覆晶封装接合结构的绝缘膜可由多种方法加以制作，请参考图4至图6，其为绝缘膜的制作流程示意图，是配合光微影技术以制作绝缘膜。The insulating film of the flip-chip package bonding structure can be manufactured by various methods. Please refer to FIG. 4 to FIG. 6 , which are schematic diagrams of the manufacturing process of the insulating film, which are produced by cooperating with photolithography technology.

如图4所示，提供一芯片100，在其表面形成数个导电凸块110，并于芯片100表面涂布光阻材料作为绝缘膜111，并且完全覆盖导电凸块110。As shown in FIG. 4 , a chip 100 is provided, and several conductive bumps 110 are formed on the surface thereof, and a photoresist material is coated on the surface of the chip 100 as an insulating film 111 to completely cover the conductive bumps 110 .

如图5所示，使用光罩130曝光芯片100表面的导电凸块110导电接合面的区域。As shown in FIG. 5 , a photomask 130 is used to expose the region of the conductive bonding surface of the conductive bump 110 on the surface of the chip 100 .

如图6所示，显影光阻材料的图案使其于导电凸块110侧面形成绝缘膜111，并露出导电凸块110的导电接合面。As shown in FIG. 6 , the pattern of the photoresist material is developed to form an insulating film 111 on the side of the conductive bump 110 and expose the conductive bonding surface of the conductive bump 110 .

此外，亦可使用镀膜后机械研磨方式形成绝缘膜，请参考图7至图9，其为绝缘膜的制作流程示意图。In addition, the insulating film can also be formed by mechanical grinding after coating. Please refer to FIG. 7 to FIG. 9 , which are schematic diagrams of the manufacturing process of the insulating film.

如图7所示，提供一芯片100，在其表面形成数个导电凸块110，并于芯片表面溅镀半导体绝缘材料以作为绝缘膜112，并且完全覆盖导电凸块110。As shown in FIG. 7 , a chip 100 is provided, and a plurality of conductive bumps 110 are formed on the surface thereof, and a semiconductor insulating material is sputtered on the surface of the chip as an insulating film 112 to completely cover the conductive bumps 110 .

如图8所示，以研磨轮140对导电凸块110表面施以化学机械研磨，直至露出导电凸块110的导电接合面。As shown in FIG. 8 , the surface of the conductive bump 110 is subjected to chemical mechanical grinding with a grinding wheel 140 until the conductive bonding surface of the conductive bump 110 is exposed.

如图9所示，去除导电凸块110的导电接合面的半导体绝缘层后，芯片100表面即形成覆盖于导电凸块110侧面的绝缘膜111并露出导电凸块110的导电接合面。As shown in FIG. 9 , after removing the semiconductor insulating layer on the conductive bonding surface of the conductive bump 110 , an insulating film 111 covering the side of the conductive bump 110 is formed on the surface of the chip 100 and exposing the conductive bonding surface of the conductive bump 110 .

配合绝缘膜制造工艺的差异，其用以覆盖导电凸块侧面的绝缘膜的材质与其涂布区域可做各种调整，配合不同制造工艺，绝缘膜可选择光阻材料或绝缘材料。本发明所公开的覆晶封装接合结构及其制造方法，可用于任何半导体组装应用上，且特别适合用于液晶显示器(LCD)的驱动芯片与玻璃基板或软质基板的接合。In accordance with the difference in the manufacturing process of the insulating film, the material of the insulating film covering the side of the conductive bump and its coating area can be adjusted in various ways. In accordance with different manufacturing processes, the insulating film can be made of photoresist material or insulating material. The flip-chip packaging bonding structure and its manufacturing method disclosed in the present invention can be used in any semiconductor assembly application, and is especially suitable for bonding a driving chip of a liquid crystal display (LCD) to a glass substrate or a flexible substrate.

请参考图10，其为本发明第一实施例的制作流程图，首先，提供一芯片，在其表面形成数个导电凸块(步骤310)；其次，提供一基板，于其表面形成数个接合垫(步骤320)；于芯片表面形成绝缘膜(步骤330)，绝缘膜是包覆导电凸块侧面并且露出导电凸块的导电接合面；再将含有导电粒子的各向异性导电接着剂覆盖于基板上(步骤340)；经由芯片与基板的对准定位使导电凸块对准接合垫，然后对位压合芯片与基板并固化导电性接着剂，以形成覆晶封装接合结构(步骤350)。上述的基板可选择有机基板、陶瓷基板、玻璃基板、硅基板或砷化镓基板等等。其各向异性导电接着剂亦可选择热固化的高分子基接着剂、光固化高分子基接着剂或其它接着材料，并配合材料以加热、曝光或微波等方式固化。Please refer to FIG. 10 , which is a production flowchart of the first embodiment of the present invention. First, a chip is provided, and several conductive bumps are formed on its surface (step 310); secondly, a substrate is provided, and several conductive bumps are formed on its surface. Bonding pads (step 320); forming an insulating film on the surface of the chip (step 330), the insulating film is to cover the side of the conductive bump and expose the conductive bonding surface of the conductive bump; then cover the anisotropic conductive adhesive containing conductive particles on the substrate (step 340); through the alignment and positioning of the chip and the substrate, the conductive bumps are aligned with the bonding pads, and then the chip and the substrate are aligned and pressed and the conductive adhesive is cured to form a flip-chip package bonding structure (step 350 ). The above-mentioned substrates can be selected from organic substrates, ceramic substrates, glass substrates, silicon substrates or gallium arsenide substrates and the like. The anisotropic conductive adhesive can also choose heat-curable polymer-based adhesives, photo-curable polymer-based adhesives or other adhesive materials, and the materials can be cured by heating, exposure or microwaves.

由于导电粒子也可能堆积于基板的接合垫之间而导致短路，基板的接合垫侧面亦可形成一绝缘膜，于本发明的制作流程步骤中还包括于基板形成绝缘膜的步骤，绝缘膜是包覆接合垫侧面并且露出接合垫的导电接合面。请参考图11，其为本发明第二实施例的结构示意图。芯片100与基板200是以面对面的方式接合使数个导电凸块110个别地压合于数个接合垫210而形成电性导通。于芯片与基板的接点侧面，包括导电凸块110和接合垫210，皆形成绝缘膜111、211来防止因各向异性导电接着剂120的导电粒子121产生聚集而产生的短路现象。Since conductive particles may also accumulate between the bonding pads of the substrate and cause a short circuit, an insulating film may also be formed on the side of the bonding pads of the substrate. The manufacturing process steps of the present invention also include the step of forming an insulating film on the substrate. The insulating film is The sides of the bonding pads are covered and the conductive bonding surfaces of the bonding pads are exposed. Please refer to FIG. 11 , which is a schematic structural diagram of the second embodiment of the present invention. The chip 100 and the substrate 200 are bonded in a face-to-face manner so that several conductive bumps 110 are individually pressed to several bonding pads 210 to form electrical conduction. Insulating films 111 and 211 are formed on the contact side of the chip and the substrate, including the conductive bumps 110 and the bonding pads 210 , to prevent short circuits caused by the aggregation of the conductive particles 121 of the anisotropic conductive adhesive 120 .

虽然本发明的较佳实施例公开如上所述，然其并非用以限定本发明，任何本领域普通技术人员，在不脱离本发明的精神和范围内，当可作一些变动与修改，因此本发明的专利保护范围以权利要求为准。Although the preferred embodiments of the present invention are disclosed as above, they are not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The patent protection scope of the invention shall be determined by the claims.