CN1922496A - Current detecting circuit, load drive, and storage - Google Patents

As the current detection circuit that is used for detecting the electric current that flows by the load of drivings such as transistor, current sense resistor is connected in series in this transistor or load, directly detect electric current by the voltage drop that causes by this current sense resistor, generally, this current detection circuit as the spy open flat 11-299292 communique (to call

1 in the following text) or spy open in the 2003-174766 communique (to call

2 in the following text) disclosed and use.

In the current detection circuit of in the

1,2,, therefore cause power efficiency to reduce because the loss that caused by current sense resistor always takes place.And, when in the load driving circuits that bridgt circuit constitutes, when PWM drives load, PWM end during can not carry out current detecting itself.

Among Fig. 1, be connected in series with

50, be connected in the 1st supply voltage V as the 1st transistorized P

11 _CCAnd between the ground.The

11 flows through load current (output current) I1 in switching signal S1 (L level) conducting when putting on grid as control signal.In addition, under the situation of not specially provided in this manual, voltage is represented the current potential with respect to ground voltage.

Since establish current detecting with

12 by definite N/one who is of a size of the size of the

11 of channel width W and channel length L, so, by to its source electrode and the 1st identical supply voltage V of grid supply _CCWith switching signal S1, can flow through the

1/N of N/ratio of load current I1.But situation is unequal mostly because this current detecting is used the drain voltage of

12 and the drain voltage (output voltage) of the

11, so, can not obtain correct proportional current I1/N under this situation.

Among the present invention, establish current detecting and use the drain voltage of

12 to equate, and be provided with

100, so that stablize and carry out accurately current detecting with the drain voltage of the

11.

This

100, have the voltage (drain voltage) of output node A1 of input the

11 and current detecting

12 output node B1 voltage (drain voltage) amplifier 13 (for example, can be operational amplifier), the output of establishing this

13 is the control signals as the 3rd transistorized N type MOS transistor 14.This

14 is connected between the output node B1 and

19 of current detecting with transistor 12.In addition,

16 is used to prevent vibration and is provided with.

And

100 is connected with

15 between zero load is with supply voltage Vid and output node B1, this output node B1 is supplied with the no-load current Iid1 of regulation.

15 is that steady current is good for constant current source, no-load current Iid1.In order to make the reliable in action of constant

15, wish that unloaded is than the 1st supply voltage V with supply voltage Vid _CCHigh voltage.That is Vid1＞V, _CCIn addition, as zero load supply voltage Vid, also can use the 1st supply voltage V _CC

Detect electric current I 12 from the output of

100, this detections electric current I 12 is with the proportional current I1/N of

12 and the electric current that combines from the no-load current Iid1 of

15 from current detecting.

This detection electric current I 12 is flowed through and is detected

19, and output is corresponding to this resistance value Rs and long-pending detection voltage (output signal) Vdet that detects electric current I 12.Detect the effect that

19 plays translation circuit, detect voltage Vdet and supply to not shown control circuit.

In the current detection circuit of this Fig. 1, its action is described with reference to the equivalent circuit diagram of Fig. 2.Before supplying with switching signal S1 from control circuit (omitted diagram, below identical), the

11, current detecting are ended with transistor 12.Output node A1 becomes high impedance (Hi-Z) or low-voltage (Low; No-voltage for example).Therefore, voltage ratio the 1st supply voltage V of output node A1 _CCOr it is unloaded low with supply voltage Vid.On the other hand, the voltage of output node B1 is determined with supply voltage Vid by zero load.

Because

100 is so that move with the mode that the voltage of output node B1 equates as the voltage of output node A1 of its two inputs, therefore,

14 conductings are so that make the voltage decline of output node B1.By the conducting of

14, no-load current Iid1 flows through as detection electric current I 12 and detects resistance 19.Owing to flow through no-load current Iid1 before supplying with switching signal S1, therefore,

100 begins to move as A level amplifying circuit from the time point of supplying with switching signal S1.This no-load current Iid1 produces the bias voltage Rs * Iid1 that detects voltage Vdet.

If be supplied to switching signal S1, then the

11 and current detecting

12 conductings, load current I1 flows to load 50 from the

11, corresponding to the conducting resistance r11 of the

11 and amassing of load current I1, produces voltage drop in the 1st transistor 11.The voltage of output node A1 becomes the voltage that only hangs down this voltage drop I1 * r11 than the 1st power source voltage Vcc.At this moment, the voltage of output node B1 is controlled as with the voltage of output node A1 by

100 and equates.Current detecting becomes proportional current I1/N and current detecting with the voltage drop of

12, and (=N's * r11) is long-pending with the conducting resistance r12 of transistor 12.Therefore, the

11 and current detecting

12, because source voltage, grid voltage and drain voltage are all equal, so, flow through current detecting becomes expection with the proportional current I1/N of

12 value.

In the

11 and the initial stage of current detecting with

12 conductings, with this load current I1, proportional current I1/N hour, when supposing not have no-load current Iid1, will take place can not operating stably or proportional current I1/N do not become problems such as correct proportions with load current I1.

But, in the present invention, owing to before the

11 and current detecting are with

12 conductings, flow through no-load current Iid1, so

100 is understood and be moved as A level amplifying circuit.Therefore, the

11 and current detecting with the initial stage of

12 conductings, with this load current I1, proportional current I1/N hour, but the rectilinearity (linearity) of also operating stably, and load current and detection electric current improves, thereby can detect electric current accurately.

In addition, the

11, current detecting also can replace P type MOS transistor with

12, and use N type MOS transistor.And N

14 also can be used bipolar transistor except that P type MOS transistor.

Fig. 3 represents the current detection circuit of the 2nd embodiment.In Fig. 3, be with the 1st embodiment difference of Fig. 1, as the 1st transistorized P

11 and as current detecting with transistorized P

12, can be by the control voltage Vsig control of any intensity.The others of Fig. 3 are identical with Fig. 1.Therefore, be that the center describes with this difference.

In Fig. 3, be connected in series with

50 as the 1st transistorized P

11, to flow through the mode of load current I1 in the

50, be connected in the 1st supply voltage V _CCAnd between the ground.Be provided with as current detecting with transistorized P

12, it is used for supplying with and the proportional proportional current I1/N of this load current I1.

Current Control is connected with the grid of current detecting with

12 with the

11 with the grid of transistor 10, becomes current-mirror structure.Current Control becomes control voltage Vsig with the grid voltage of transistor 10.Promptly, because Current Control constitutes current mirroring circuit with transistor the 10, the

11 and current detecting with

12, therefore, with Current Control with proportional load current I1 of the Control current I0 that flows through in the transistor 10 and proportional current I1/N, in the

11 and current detecting with flowing in the transistor 12.Here, Current Control is the remarkable little values of size N with respect to the

11 with the size α by channel width W and channel length L decision of transistor 10, for example is set at 1/1000th.

The action of the current detection circuit of this Fig. 3 is described.Before supplying with switching signal S1 from control circuit (omit diagram, below identical), error amplifier 8 does not produce error output, and current source 7 ends, and Control current I0 is zero.Therefore, Current Control is ended with

12 with transistor the 10, the

11, current detecting, and load current I1 and proportional current I1/N also are zero.

If switching signal S1 is fed into error amplifier 8, then error amplifier 8 produces corresponding to reference voltage V ref1 and the error output that detects voltage Vdet.Current source 7 makes corresponding to the Control current I0 of this error output and flows through in transistor 10 in Current Control.According to this Control current I0, at the grid generation control voltage Vsig of Current Control with transistor 10, this control voltage Vsig is applied to the grid of the

11 and current detecting

12, makes Current Control carry out the current mirror action with transistor the 10, the

11, current detecting with

12.

In the

11, flow to load 50 with the current mirror of transistor 10 than corresponding load current I1 with Current Control.Drain electrode at the

11 produces and its conducting degree and the corresponding voltage of load current I1, the i.e. voltage of output node A1.At this moment, current detecting is with the drain voltage of

12, i.e. the voltage of output node B1 is controlled as with the voltage of output node A1 by

100 and equates.Current detecting is used the conducting degree decision of

12 by proportional current I1/N and current detecting with the voltage drop of transistor 12.Therefore, the

11 and current detecting

12 are because source voltage, grid voltage and drain voltage are all equal, so current detecting becomes the value of expection with the proportional current I1/N that flows in the

12.

And feedback is based on the detection voltage Vdet that detects electric current I 12, and the mode that becomes setting (=reference voltage V ref1) with detection voltage Vdet is controlled.Therefore, if the

11 and current detecting remain specified accuracy with the ratio of the current mirror between the

12, even then Current Control can not impact circuit operation and current detecting with the precision of the current mirror ratio between transistor 10 and the 1st transistor 11 (and current detecting usefulness transistor 12) variation a little yet.Thus, can Current Control is minimum in the 1st transistor 11 (for example, about 1/1000th) with being sized for of transistor 10, same, also the current capacity of current source 7 can be made as minimum.

And, in Fig. 3, make its mode consistent carry out FEEDBACK CONTROL with detection feedback voltage Vdet, but be not to be defined in this with setting, also can constitute and will control the feedforward control that voltage Vsig is set at setting.When being made as feedforward control, for example can in Fig. 3, remove error amplifier 8, and current source 7 is supplied with the command signal of stipulating, and, also can remove Current Control usefulness transistor 10, current source 7, error amplifier 8, the control voltage Vsig of regulation is applied to the grid of the

11, current detecting usefulness transistor 12.In addition, this point also is same in other embodiments.

In Fig. 4, and the difference of Fig. 1 is: be provided with

15 and on-

17 between zero load is with supply voltage Vid and output node B1; And being provided with comparer 18, this comparer 18 relatively detects voltage Vdet and reference voltage V ref, when detecting voltage Vdet greater than reference voltage V ref, produces the relatively output that on-

17 is disconnected.In addition, when

15 can connect by the relatively output of comparer 18, when disconnecting, for example when

15 is current-mirror structure, also can be by relatively output connection, the turn-off

15 of comparer 18.Under this situation, can remove on-

17.

The action of the 3rd embodiment is described with reference to Fig. 4～Fig. 6.Before being supplied to switching signal S1, on-

17 is connected.If be supplied to switching signal S1, then same with the situation of Fig. 1, the

11, current detecting be with

12 conductings, output from current detecting with the proportional current I1/N of

12, and the detection electric current I 12 that combines from the no-load current Iid1 of

15.

Even be cut off because the proportional current I1/N that on-

17 is disconnected the stage becomes no-load current Iid1, also can not amplify the size that action exerts an influence to the A level, so, obtain on the correct detection electric current no problem.And, by by this no-load current Iid1, can reduce the consumed power of degree of correspondence.

Fig. 7 represents the related current detection circuit of the present invention the 4th embodiment.In this Fig. 7, as the 1st transistorized P

11 and as current detecting with transistorized P

12, can be by the control voltage Vsig control of any intensity, this point is different with the 3rd embodiment of Fig. 4.The others of Fig. 7 are identical with Fig. 4.

In Fig. 8, and the difference of Fig. 1 is: be provided with

15 and on-

17 between zero load is with supply voltage Vid and output node B1; And being provided with sequential circuit 17A, it accepts action command signal S0, produces airborne signals Sid and switching signal S1.In addition, when

15 can connect by airborne signals Sid, when disconnecting, for example when

15 be current-mirror structure, also can be by airborne signals Sid connection, turn-off current source 15.Under this situation, can remove on-

17.

The action of the 5th embodiment is described with reference to Fig. 8, Fig. 9.Before action command signal S0 was fed into sequential circuit 17A, the

11, current detecting were all ended with

12, on-off circuit 17.If the action command signal is supplied to sequential circuit 17A by S0, then sequential circuit 17A produces airborne signals Sid immediately, connects on-

17, makes it flow through no-load current Iid1.Be supplied to before the switching signal S1 identical among this state and Fig. 1.

When sequential circuit 17A is supplied to action command signal S0, for example begin to measure the elapsed time that begins from this moment t1 by counter.Moment t2 during only having measured since moment t1 behind the T2 has produced switching signal S1 (L level), makes the

11, current detecting

12 conductings.By making the

11, current detecting

12 conductings, same with the situation of Fig. 1, can export the detection electric current I 12 of the electric current that combines with the proportional current I1/N of

12, with no-load current Iid1 from current detecting from

15.

Sequential circuit 17A continue to measure the elapsed time, since moment t1 through during T1 (moment t3 behind the T1＞T2) stops to supply with airborne signals Sid, cut-off switch circuit 17.In addition, if stop to supply with action command signal S0 at moment t4, then switching signal S1 also disappears (H level), makes the action of current detection circuit stop.Preferred T1 during this period is set at: even without no-load current Iid1, the size of proportional current I1/N also will become can make

100 carry out the time that the A level is amplified the current value of action.

Make no-load current Iid1 disappear owing to being disconnected by on-

17, therefore, the size that detects voltage Vdet only reduces the size corresponding with no-load current Iid1.But, even, also can not amplify the size that action impacts to the A level because the proportional current I1/N in the stage of T1 after the time of being disconnected of on-

17 becomes no-load current Iid1 is cut off, therefore obtain on the correct detection electric current no problem.And, same with Fig. 5, by by this no-load current Iid1, can reduce the consumed power of degree of correspondence.

Figure 10 represents the related current detection circuit of the present invention the 6th embodiment.In this Figure 10, as the 1st transistorized P

11 and as current detecting with transistorized P

12, can be by the control voltage Vsig control of any intensity, this point is different with the 5th embodiment of Fig. 8.The others of Figure 10 are identical with Fig. 8.

The load driving circuits of this Figure 11 has: the 1st series circuit of the

11 and the 2nd transistor 51, described the

11 is connected in the 1st power source voltage Vcc and between the output node A1 of

50 output, be switched on according to switching signal S1 and end, be used for to load 50 supplying electric currents, described the 2nd transistor 51 be connected in to the output node A1 of

50 output and the 2nd supply voltage point () between, be converted into conducting, end by pwm switching signal S3; The 2nd series circuit with the 1st transistor 21 and the 2nd transistor 61, described the 1st transistor 21 is connected in the 1st power source voltage Vcc and between the output node A2 of

50 output, be switched on according to switching signal S2 and end, be used for to load 50 supplying electric currents, described the 2nd transistor 61 be connected in to the output node A2 of

50 output and the 2nd supply voltage point () between, be converted into conducting, end by pwm switching signal S4.

Like this, described series circuit with two groups of above group numbers, form single-phase or heterogeneous bridgt circuit, to drive in the load driving circuits of single-phase or multiphase load at PWM, with respect to each the

11,21, the mode that comprises described circuit be provided with Fig. 1 in same current detection circuit, constitute the load driving circuits of Figure 11.

That is, current detecting

12 is set, it is applied in the switching signal S1 identical with the switching signal S1 that is applied to the 1st transistor 11.The current detecting proportional proportional current I1/N of load current I1 that flows in

12 supplies and the 1st transistor 11.

100 has

15, it supplies with the no-load current Iid1 of regulation with the output node B1 of

12 to this current detecting, so that the voltage of the output node A1 of the

11 and current detecting are moved with the mode that the voltage of the output node B1 of

12 equates, and, the detection electric current I 12 after export ratio electric current I 1/N and the no-load current Iid1 addition.Buffer circuit 200 also is the structure same with

100, an is-symbol difference (for example, relative 12 is 22).

From the load driving circuits of the single-phase bridge connection circuit of this Figure 11, it is same to detect situation illustrated among the action of load current I1, I2 of each the

11,21 and Fig. 1 etc.But, among the 7th embodiment of Figure 11,, therefore, the peculiar current detecting effect of following PWM control is described owing to be the load driving circuits that PWM drives.

If consider 11 conductings of the 1st transistor, the 2nd transistor 61 is switched to the situation of conduction and cut-off by pwm switching signal S4, and then when the 2nd transistor 61PWM conducting, load current I1 is shown in solid line among the figure, from the 1st supply voltage V _CCThe 1st transistor 11-load 50-the 2nd transistor 61-ground begins to flow through.On the other hand, the 2nd transistor 61PWM by the time, load current I1 as shown in phantom in FIG., the path of parasitic diode-

1

11 of the 1st transistor 11-load 50-the 1st transistor 21 of flowing through.

In the direct detection mode of in the past being undertaken by resistance, the load current I1 during the PWM conducting can't be detected.But, in the present invention, if load current I1 the

11 of flowing through, then certainly detect during the PWM conducting, though PWM by the time also can continuous coverage proportional current I1/N.On the contrary, 21 conductings of the 1st transistor, the situation that the 2nd transistor 51 is switched into conduction and cut-off by pwm switching signal S3 is too.

And in the 7th embodiment of Figure 11, no-load current Iid1, Iid2 are also controlled to be made: only flow through any one party that needs conducting in the

11 or 21.This control by be associated from the switching signal S1 of control circuit, the generation of S2, be used to control with output no-load current Iid1, Iid2 signal mode and realize.For example, be associated with switching signal S1, S2, it is good making

15,25 conductings or ending.

And, in the load driving circuits of Figure 11, also can add: as the cutoff control circuit the 3rd embodiment, that used the no-load current of on-

17 and comparer 18 of Fig. 4; Or as the 5th embodiment of Fig. 8, used the sequential control circuit of on-

17 with the no-load current of sequential circuit 17A.Under these situations, be preferably disposed on the on-off circuit of respectively using mutually in the driving

17, make its conducting simultaneously or end (as the situation of Fig. 4) by relatively output, or make its conducting simultaneously or end (as the situation of Fig. 8) by airborne signals Sid from sequential circuit 17A from comparer 18.

Like this, according to 1 conducting of the 1st, the

11,2 or by and conducting or by no-load current Iid1, Iid2, or as Fig. 4 and Fig. 8, end control according to detecting voltage Vdet and elapsed time, for example be applicable to high precision and carry out by the load current I1 of Current Control drive shaft motor etc., the detection of I2.In addition, during by this Current Control CD-ROM drive motor, indicated value Vtarget becomes current instruction value.

The load driving circuits of this Figure 12 is the example that drives the three-phase bridge circuit of three-

50, has U and uses driving circuit 1W mutually with driving circuit 1V and W mutually with driving circuit 1U, V mutually.

Observe U and use driving circuit 1U mutually, be with its difference of Fig. 3 comparison of the 2nd embodiment: U is fed into Control current with control signal S1u mutually and supplies with current source 7, corresponding with it, control voltage Vsigu is fed into the grid of the

11, current detecting

12; The 2nd transistor 9 is connected between output node A1 and the ground; U is fed into the grid of the 2nd transistor 9 mutually with switching signal S2u; Output node A1 is connected the U phase coil terminal U of three-

50 etc.The circuit of others and Fig. 3 is same.

Use driving circuit 1W with driving circuit 1V mutually with W mutually for V, only represent its part respectively in Figure 12, but only symbol is corresponding different, other uses driving circuit 1U identical with U mutually.Promptly be with its difference of Fig. 3 comparison of the 2nd embodiment: V is fed into Control current with control signal S1w mutually with control signal S1v, W mutually and supplies with current source 27,37, corresponding with it, control voltage Vsigv, Vsigw are fed into the grid of the 1st transistor 21,31; The 2nd transistor 29,39 is connected between output node A2, A3 and the ground; V is fed into the grid of the 2nd transistor 29,39 mutually mutually with switching signal S2w with switching signal S2v, W; Output node A2, A3 are connected V phase coil terminal V, the W phase coil terminal W etc. of three-

50.

And, gather from each mutually with driving circuit 1U, 1V, 1W obtain respectively detect electric current I 12 ..., supply to and detect

19.

If switching signal S1 supplies to error amplifier 71, the logic used according to three-phase drive of grid control logic circuit 72 then produces each control signal S1u, S1v, the S1w of usefulness and each switching signal S2u, S2v, S2w of usefulness mutually mutually.Should each control signal S1u, S1v, the S1w of usefulness and each switching signal S2u, S2v, S2w of usefulness mutually mutually, be fed into Control current and supply with grid with current source 7,27,37 and the 2nd transistor 9,29,39.The logic of three-phase control usefulness, for example with to the U phase terminal of three-

50, V phase terminal, W phase terminal according to U → V, U → W, V → W, V → U, W → U, W → V, U → V ... the mode of order power supply, control the conducting degree of the

11,21,31, and, open and close conversion the 2nd transistor 9,29,39.This grid control logic circuit 72 also can be contained in the not shown control circuit with other control part.

Like this, the load driving circuits of Figure 12 is: have a plurality of driving circuit, single-phase or heterogeneous bridgt circuits of formation respectively used mutually, in the load driving circuits of the single-phase or multiphase load of Linear Driving, with respect to each the

11,21,31 by control voltage Vsig Linear Control, with the mode that comprises described circuit be provided with Fig. 3 in same current detection circuit.

In the load driving circuits of this Figure 12, can also add: as the cutoff control circuit the 4th embodiment, that used the no-load current of on-

17 and comparer 18 of Fig. 7; Or as the 6th embodiment of Figure 10, used the sequential control circuit of on-

17 with the no-load current of sequential circuit 17A.Under these situations, be preferably disposed on the on-

17 that each uses driving circuit mutually, make its conducting simultaneously or end (as the situation of Fig. 7) by relatively output, or make its conducting simultaneously or end (as the situation of Figure 10) by airborne signals Sid from sequential circuit 17A from comparer 18.

1. current detection circuit comprises:

The 1st transistor, it is used for to load supply load electric current;

Current detecting transistor, its control electrode are applied in the control signal identical with the control signal that is applied to the 1st transistorized control electrode, are used for supplying with and the proportional proportional current of described load current;

Buffer circuit, its no-load current that has regulation supplies to the zero load current source of this current detecting with transistorized output node, so that the described the 1st transistorized output voltage and described current detecting move with the mode that the voltage of transistorized described output node equates, and output is with the detection electric current after described proportional current and the described no-load current addition; With

Translation circuit, its conversion is from the described detection electric current of this buffer circuit output, as output signal.

2. current detection circuit comprises:

The Current Control transistor, its control electrode is connected with output electrode;

The Control current of electric current changeable type is supplied with and is used current source, and it is used to make controlled electric current this Current Control transistor of flowing through;

The 1st transistor, it is connected with the transistor current mirror with described Current Control, is used for to load supply load electric current;

The current detecting transistor, it is connected with the transistor current mirror with described Current Control, is used for supplying with and the proportional proportional current of described load current;

Buffer circuit, its no-load current that has regulation supplies to the zero load current source of this current detecting with transistorized output node, so that the described the 1st transistorized output voltage and described current detecting move with the mode that the voltage of transistorized described output node equates, and output is with the detection electric current after described proportional current and the described no-load current addition; With

Translation circuit, its conversion is from the described detection electric current of this buffer circuit output, as output signal.

3. current detection circuit according to claim 1 and 2 is characterized in that,

Described buffer circuit has: amplifier, and it is transfused to the described the 1st transistorized output voltage and the described current detecting voltage with transistorized output node; With the 3rd transistor, it is arranged on described current detecting with between transistorized output node and the described translation circuit, by the output control of described amplifier.

4. current detection circuit according to claim 1 and 2 is characterized in that,

Supplying to described unloaded zero load supply voltage with current source, is than supplying to described the 1st transistor and described current detecting with high voltage of transistorized the 1st supply voltage or equal voltage.

5. current detection circuit according to claim 1 and 2 is characterized in that,

Have: on-off circuit, it is arranged on described zero load current source; And comparer, it with described output signal and reference value relatively produces relatively output during greater than described reference value in described output signal,

Disconnect described on-off circuit by described relatively output.

6. current detection circuit according to claim 5 is characterized in that,

Described comparer has the hysteresis characteristic of Rack.

7. current detection circuit according to claim 1 and 2 is characterized in that,

Have: on-off circuit, it is arranged on described zero load and uses current source, is switched on by airborne signals; And sequential circuit, it only exports described airborne signals in the 1st stipulated time according to the input of control command signal, and, begin through exporting described control signal after the 2nd stipulated time than described the 1st stipulated time weak point from described control command signal.

8. load driving circuits; It has the 1st transistor more than two groups of numbers part and the series circuit of the 2nd transistor; Described the 1st transistor is connected the 1st supply voltage and between the output point of load output; Be switched according to the switch signal; Be used for supplying with electric current to load; Described the 2nd transistor is connected between the output point and the 2nd supply voltage point of described load output; Be switched to the conducting cut-off by pwm switching signal; Described load driving circuits forms single-phase or heterogeneous bridge joint circuit; And PWM drives single-phase or multiphase load

Corresponding to described each the 1st transistor, have: the current detecting transistor of described group of number part, it is applied in and is applied to the identical switching signal of the described the 1st transistorized switching signal, is used for supplying with and the proportional proportional current of described load current; Buffer circuit with described group of number part, it has the zero load current source of supplying with the no-load current of regulation to this current detecting with transistorized output node, so that the described the 1st transistorized output voltage and described current detecting are moved with the mode that the voltage of transistorized described output node equates, and export detection electric current after described proportional current and the described no-load current addition

Comprise translation circuit, it will gather from the described detection electric current of each buffer circuit output of described group of number part, is transformed to output signal.

9. load driving circuits, it has the current output circuit more than two groups of numbers part, and this current output circuit comprises: the Current Control transistor, its control electrode is connected with output electrode; The Control current of electric current changeable type is supplied with and is used current source, and it is used to make controlled electric current this Current Control transistor of flowing through; The 1st transistor, it is connected with the transistor current mirror with described Current Control, is arranged on the 1st supply voltage and between the output point of load output, is used for to load supply load electric current; With the 2nd transistor, it is connected between the output point and the 2nd supply voltage point of described load output, is switched by switching signal, and described load driving circuits forms single-phase or heterogeneous bridgt circuit, and drives single-phase or multiphase load according to described Control current,

Corresponding to described each the 1st transistor, have:

The current detecting transistor of described group of number part, it is connected with the transistor current mirror with described Current Control, is used for supplying with and the proportional proportional current of described load current;

Buffer circuit with described group of number part, it has the zero load current source of supplying with the no-load current of regulation to this current detecting with transistorized output node, so that the described the 1st transistorized output voltage and described current detecting are moved with the mode that the voltage of transistorized described output node equates, and export detection electric current after described proportional current and the described no-load current addition

Comprise translation circuit, it will gather from the described detection electric current of each buffer circuit output of described group of number part, is transformed to output signal.

10. according to Claim 8 or 9 described load driving circuits, it is characterized in that,

Described buffer circuit has: amplifier, and it is transfused to the described the 1st transistorized output voltage and the described current detecting voltage with transistorized output node; With the 3rd transistor, it is arranged on described current detecting with between transistorized output node and the described translation circuit, by the output control of described amplifier.

11. according to Claim 8 or 9 described load driving circuits, it is characterized in that,

Have: on-off circuit, it is arranged on described zero load current source; And comparer, it with described output signal and reference value relatively produces relatively output during greater than described reference value in described output signal,

Disconnect described on-off circuit by described relatively output.

12. according to Claim 8 or 9 described load driving circuits, it is characterized in that,

Have: on-off circuit, it is arranged on described zero load and uses current source, is switched on by airborne signals; And sequential circuit, it only exports described airborne signals in the 1st stipulated time according to the input of control command signal, and, begin through exporting described switching signal after the 2nd stipulated time than described the 1st stipulated time weak point from described control command signal.

13. a memory storage has:

Each described load driving circuits in the claim 8～12; With

By the motor that this load driving circuits drove.