TW201103242A - Charge pump and charging/discharging method capable of reducing leakage current - Google Patents

A charge pump includes a first transistor, a second transistor, a first, a second and a third selectors. The first transistor includes a first gate electrode, a first electrode, and a second electrode. The second transistor includes a second gate electrode, a third electrode and a fourth electrode, where the first gate electrode of the first transistor is coupled to the second gate electrode of the second transistor, and the second gate electrode of the second transistor is coupled to the fourth electrode of the second transistor. The first selector is utilized for selectively connecting the first transistor to a first supply voltage. The second selector is utilized for selectively connecting the first transistor to a second supply voltage. The third selector is utilized for selectively connecting the second transistor to the second supply voltage.

201103242 六、發明說明： 【發明所屬之技術領域】 本發明係有關於電荷泵，尤指一種電荷泵及可降低漏電流的充 放電方法。 【先前技術】 鎖相迴路(phase-locked loop ’ PLL)通常作為時脈產生器(ci〇ck generator)或頻率同步器(frequency synchronizer)，並被廣泛地應用在 許多電子及通訊裝置中。傳統的鎖相迴路包含一相位偵測器、一電 荷果(charge pump)、一濾波器以及一壓控震盪器(v〇ltage⑺ntr()i oscillator ’ VC0)，其中該相位偵測器的一輸入端係連接於該壓控震 盪器的一輸出端，而該相位偵測器的另一輸入端係連接於一參考頻 率產生器(reference frequency generator)。該相位偵測器之輸出的功 能係為將兩個輸入訊號的相位差藉由該電荷泵輸入至該濾波器以產 生一控制電壓，並將該控制電壓供應至該壓控震盪器。 當該鎖相迴路需要鎖住該壓控震盪器的一輸出頻率時，該相位 憤測讀巾斷與該電荷泵的連接，以使從該電躲/驗器產生的控 制電壓能轉在-個定值。締，在該電縣麟她侧器連接 中斷的同時’該電縣巾的漏電流會進人域波器並改變該壓控震 盈器的控制電壓，因而造賴驗震盪㈣輸出頻率失準。特別是 當該相位偵測n中兩個輸人訊號之間的相位差非常微小時，則該壓 201103242 控震盪器的輸出頻率將會受到嚴重的影響。 【發明内容】 荷泵及能降低漏電流 因此，本發明的目的之一在於提供一種電 的充放電方法，以解決上述之問題。 位的電荷_::==:_==準 第一輸以及-第三選擇[該第-電晶體包含有一第一門電 極、-第-電極以及作為該術之一輸出連鱗的二第電 其中該第一電晶體之該第一閉電極偷接;:電極以及一第四電極， 閘電f 接於該第二電晶體之該第二 閘電極μ及该第二電晶體之該第二間電極 之該第四電極。該第一選擇器包含 丧、这弟一電日曰體 晶體之該第-電極以及一第一接於該第—電 日日體連接至該第-供應電壓。該第二選擇器包含有兩端點，^ 接於該第-電晶體之該第二電極 =耦 简-咖連接則二供軸 二:=r第二_之該第，二二電 第-選擇器選擇性地關閉，財斷該第^J電麼:該 的連接’進而使該第一電晶體,不存有任 出電遷準位不會受到漏電流的影響。電视使該電何果的輪 201103242 含有依發Γ"5—_ ’，降倾電__方法包 電晶體，其包含有-第-閉電極、-第-電極以 一第:閘電:連=的:第二電極;提供-第二電晶體，其包含有 哕第4二電触及—第四電極，射該第-電晶體之 =體於該第二電晶體之該第二_極，以及該第二 第一選間電極軸接於該第二電晶體之第四電極；提供一 極以及兩端點，分聰接於該第-電晶體之該第-電 供庫電>1 ·獅應電Μ，以選擇性地將該第—電晶體連接至該第一 ===第二郝11，包含有兩雜，分_接於該第一 晶雜連接至該第二供應電_供:：選擇：=該第-電 擇器選擇性地«明第3應電麼；以及控制該第一選 技 斷。/第電晶體與該第一供應電壓的連 ，進而使該第-電晶财不存有任 ， 壓準位不會受到漏電流的影響。 H了粟的輸出電 根據本發明之實施例所揭露的電荷系以及充放電方法 、輪出電壓準轉不較到漏電辆，因此 : 之輸出頻率的精準度。 仏徑震i益 【實施方式】 201103242 月 > 考第1圖’第1圖為本發明之一實施例中一鎖相迴路· -的示意圖。鎖相迴路100包含有-相位偵測器110、一電荷泵120、 -低通遽波器m以及-麵震蘯器14〇，其中相位偵測器11〇包 含有兩個及間U2、114以及-選擇訊號產生器116。 在鎖相迴路励的操作過程中，相位偵測器11〇接收一回授訊 號vbn及其反向訊號Vbp、一參考訊號、及其反向訊號、以及一 籲選擇《fl號VSEU ’並藉由該些訊號產生兩侧貞測訊號现、〇〇娜^， 其中選擇訊號V·係由選擇訊號產生器116產生，用以決定電荷 泵120是否要與相位偵測器11〇連接。接著，電荷泵12〇接收偵測 訊號11?、〇〇簡來產生一控制訊號^丨，且低通遽波113〇將控 制訊號Vctrl濾波後產生一已濾波控制訊號，。最後，壓控震盪器 140接收已濾波控制訊號vctrl，並產生回授訊號。 凊參考第2圖，第2圖為本發明之一實施例中包含相位偵測器 瞻110以及電荷泵120之電路2〇〇的示意圖。如第2圖中所示，電路201103242 VI. Description of the Invention: [Technical Field] The present invention relates to a charge pump, and more particularly to a charge pump and a charge and discharge method capable of reducing leakage current. [Prior Art] A phase-locked loop (PLL) is commonly used as a ci〇ck generator or a frequency synchronizer, and is widely used in many electronic and communication devices. A conventional phase-locked loop includes a phase detector, a charge pump, a filter, and a voltage controlled oscillator (v〇ltage(7)ntr()i oscillator 'VC0), wherein an input of the phase detector The end is connected to an output of the voltage controlled oscillator, and the other input of the phase detector is connected to a reference frequency generator. The output of the phase detector is configured to input a phase difference between the two input signals to the filter by the charge pump to generate a control voltage, and supply the control voltage to the voltage controlled oscillator. When the phase-locked loop needs to lock an output frequency of the voltage-controlled oscillator, the phase inversion reading wipes off the connection with the charge pump, so that the control voltage generated from the electric evaluator can be transferred to - A fixed value. When the power supply of the electric county is interrupted, the leakage current of the electric county towel will enter the domain wave device and change the control voltage of the voltage-controlled shock absorber, thus causing the shock (4) output frequency misalignment . In particular, when the phase difference between the two input signals in the phase detection n is very small, the output frequency of the voltage controlled by the 201103242 oscillator will be seriously affected. SUMMARY OF THE INVENTION Charge pump and leakage current reduction Therefore, it is an object of the present invention to provide an electrical charge and discharge method to solve the above problems. The charge of the bit _::==:_== quasi first output and - third choice [the first transistor includes a first gate electrode, a -th electrode, and a second dimension as one of the outputs of the scaly The first closed electrode of the first transistor is stolen; the electrode and a fourth electrode, and the gate electrode f is connected to the second gate electrode μ of the second transistor and the second transistor The fourth electrode of the two electrodes. The first selector includes the first electrode of the celestial body, and a first connection to the first supply voltage to the first supply voltage. The second selector comprises a point at both ends, the second electrode connected to the first transistor = a coupling-simple connection, and a second supply axis: =r second, the second, the second and second The selector is selectively turned off, and the second connection is made: the connection 'and thus the first transistor, without any leaving the electromigration level, is not affected by the leakage current. The television makes the electric wheel 201103242 contain the Γ Γ quot 5 5 5 , , , 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法 方法Connected to: a second electrode; a second transistor comprising: a fourth electrical contact and a fourth electrode, wherein the second transistor is exposed to the second electrode of the second transistor And the second first inter-selective electrode is connected to the fourth electrode of the second transistor; and the first-electrode and the two-end point are provided, and the first-electrode is connected to the first-electrode 1 • The lion should be electrically connected to selectively connect the first transistor to the first===second Hao11, including two impurities, and the first crystal is connected to the second supply Electricity_::Select:= The first-selector selectively selects the third power; and controls the first selection. / The connection of the first transistor to the first supply voltage, so that the first-electrode crystal does not exist, and the voltage level is not affected by the leakage current. H output power of millet According to the embodiment of the invention, the charge system and the charge and discharge method, the wheel voltage quasi-rotation is not compared to the leakage vehicle, and therefore: the accuracy of the output frequency.实施 震 i 实施 实施 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 2011 The phase-locked loop 100 includes a phase detector 110, a charge pump 120, a low-pass chopper, and a surface oscillator 14A, wherein the phase detector 11 includes two and two U2, 114 And - the selection signal generator 116. During the operation of the phase-locked loop excitation, the phase detector 11 receives a feedback signal vbn and its reverse signal Vbp, a reference signal, and its reverse signal, and a selection of "fl number VSEU" and borrows The two signals are generated by the signals, and the selection signal V is generated by the selection signal generator 116 to determine whether the charge pump 120 is to be connected to the phase detector 11A. Then, the charge pump 12 receives the detection signal 11 and generates a control signal, and the low-pass pulse 113 filters the control signal Vctrl to generate a filtered control signal. Finally, the voltage controlled oscillator 140 receives the filtered control signal vctrl and generates a feedback signal. Referring to Fig. 2, a second diagram of the circuit 2 includes a phase detector 110 and a circuit 2 of a charge pump 120 in accordance with one embodiment of the present invention. As shown in Figure 2, the circuit

200 包含金氧半導體(Metal Oxide Semiconductor，MOS)電晶體]VII 〜M4、一第一選擇器21〇(在此實施例中，以一傳輸閘作為第一選擇 器210)、一第二選擇器220、一第三選擇器230、一第四選擇器240(在 此實施例中’以一傳輸閘作為第四選擇器240)以及一選擇訊號產生 器116。選擇訊號產生器116包含一反向器202以及一延遲單元 204，用以根據參考選擇訊號VsEL來產生選擇訊號vSEL、vSEU以及 VSEL2。第一選擇器210以及第四選擇器240係分別耦接於電晶體 201103242200 includes a Metal Oxide Semiconductor (MOS) transistor] VII to M4, a first selector 21A (in this embodiment, a transmission gate is used as the first selector 210), and a second selector 220, a third selector 230, a fourth selector 240 (in this embodiment 'with a transmission gate as the fourth selector 240) and a selection signal generator 116. The selection signal generator 116 includes an inverter 202 and a delay unit 204 for generating the selection signals vSEL, vSEU and VSEL2 according to the reference selection signal VsEL. The first selector 210 and the fourth selector 240 are respectively coupled to the transistor 201103242

Ml、M2以及一第一供應電壓VDD之間，並皆由兩個選擇訊號VSEL、 Vseli所控制。第二選擇器220係耦接於電晶體M3以及一第二供應 電壓GND之間，用以作為及閘112，並包含三個電晶體M5〜M7， 分別由選擇訊號VSEL2、反向回授訊號Vbp以及參考訊號\^所控制。 第三選擇器230係耦接於電晶體M4以及第二供應電壓GND之間， 用以作為及閘114，並包含三個電晶體M8〜M10，分別由選擇訊號 VSEL2、反向參考訊號νφ以及回授訊號Vbn所控制。 選擇訊號產生器116利用選擇訊號VSEL2來控制第二選擇器220 以及第三選擇器230，當選擇訊號VSEL2的邏輯值為，T，時，電荷泵 120連接至相位侦測no，以及電容Ci係根據電流Ijjp/Iqo^^來充 放電；當選擇訊號VSEL2的邏輯值為，，0，，時，電荷泵120與相位偵測 器110中斷連接，在理想的情況下，控制訊號Vctrl將會維持在一個 定值。 請注意’當選擇訊號VSEL2的邏輯值從，T，切換至，，0，，時，由於在 節點Nm存有殘餘電壓，故電晶體Ml可能並不會完全地關閉，換 句話說’在此同時，假如電晶體Ml還存有一微小電流，控制訊號 Vctrl的電壓準位便可能受到影響。 考量到上述可能會導致電晶體Ml不能完全關閉的因素，在本 發明的電路2〇〇 _，利用延遲單元204來延遲參考選擇訊號vSEI>X 產生選擇訊號VSEL2，也就是說，選擇訊號VSEL2落後於選擇訊號 201103242 VSEL、VSEL1。因此，當選擇訊號VSEL2的邏輯值從”1”切換至，，〇，，時， 第一選擇器210以及第四選擇器240會在第二選擇器220以及第三 選擇器230關閉之如便已關閉(電晶體Ml與第一供應電壓Vdd之間 的連接中斷），所以不會有電流存於電晶體Ml中，這樣一來，即使 電晶體Ml尚未完全地關閉，控制訊號\^&1的電壓準位亦不會受到 影響。 睛注意’在電路200中，第一選擇器21〇以及第四選擇器240 皆為傳輸閘’並由選擇訊號VSEL、VSEU所控制。然而，在本發明的 其它實施例中，第一選擇器210以及第四選擇器240亦可以其它電 路設計來加以實施，例如單一 N型金氧半導體電晶體或P型金氧半 導體電晶體，如此僅需要選擇訊號VSEL、VSELI的其中之一便可控制 (假如只需要選擇訊號VSEL，反向器202可被移除）。這些設計變化 亦均屬本發明之範疇。 另外請注意，在電路200中，所有的電晶體Ml〜M10皆為金 氧半導體電晶體，然而，在本發明的另一實施例中，電路2〇〇亦可 以雙载子接面電晶體(Bipolar Junction Transistor，BJT)來實施(如金氧 半導體電晶體Ml〜M10以雙載子接面電晶體來代替）’而在閱讀完 上述說明後’所屬領域中具有通常知識者應可輕易地瞭解如何利用 雙載子接面電晶體來實施本發明所揭露的設計電路，因此為求說明 書内容簡潔起見，詳細說明便在此省略。 201103242 此外，在電路200中，電晶體M3、M4為選擇性(optionai)的裝 置，可以依不同設計需求而移除；也就是說，電晶體M1、M2可分 別直接耦接於第二選擇器220以及第三選擇器230;另外，第四選 擇器240亦為選擇性的裝置且可被移除。這些設計變化亦均屬本發 明之範疇。 第3圖為本發明之一實施例中一電荷泵3〇〇的概要架構圖。如 第3圖中所示’電荷泵300包含兩個電晶體M1、M2、一第一選擇 器310、一第二選擇器320、一第三選擇器330、一第四選擇器340 以及一選擇訊號產生器350。選擇訊號產生器350產生一第一選擇 afU虎VSEL1以及一第二選擇訊號VseL2，並利用第一選擇訊號 來選擇性地控制第一、第四選擇器分別將電晶體訄卜河2連接至一 第-供應電壓VDD;以及姻第二選擇訊號來選擇性地控制第 一、第二選擇器分別將電晶體M卜奶連接至一第二供應電壓 GND。電荷栗300的運作方式類似第2圖中的電路2〇〇，而在閱讀 完上述有.第2®巾電路2GG的運作方式的說明後，所屬領域中 具有通常知識者應可輕易地瞭解電棘的運作方式，因此詳細 說明便在此省略。 »月參考第4圖’第4圖為本發明之一實施例中能降低漏電流的 充放電方法的流程圖。請-併參考第3圖中的電路3〇〇以及第4圖 中的流程，本發職降域電流之纽電方法的步驟如下： 201103242 步驟400 :提供一第一雷a B0 _ ’ "、中該第—電晶體包含有-第-閘 電極、—第-電極以及作為—輸出 步驟4〇2 第二電晶體，其中該第二電晶體包含有第二開 2、-第三_以及—第四電極，該第—電晶體之該 :閑電極係贿於該第二電晶體之該第二閘電極以 〜第電as體之該第二閘電極係輕接於該第二電晶體 之該第四電極。 步驟404 .提供一第一 ·{登禮gg , 曰第、擇器，包含有兩端點，分別耦接於該第一 電曰曰體之該第-電極以及—第—供應電壓，用以選擇性 將該第|晶體連接至該第一供應電壓。 步驟406 .提供-第二選擇器，包含有兩端點分聰接於該第一 電B曰體之該第一電極以及一第二供應電壓，用以選擇性 地將該第-電晶體連接至該第二供應電壓。 步驟408 :提供一第二撰媒哭 ^ . 曰弟一選擇器，包含有兩端點，分別耦接於該第二 電晶體之第四電極以及該第二供應電壓，用以選擇性地 將該第二電晶體連接至該第三供應電壓。 步驟:控制該第一選擇器選擇性地關閉，以中斷該第一電晶體 與該第-供應電壓的連接，進而使該第一電晶體中不存 有任何電流’使該電荷朗輸㈣醉位*會受到漏電 流的影響。 綜上所述，根據本發明所提出之電荷泵以及充放電方法，電荷 果的輸出賴準位將騎受朗電流的影響，目此可提高壓控震盈 201103242 器之輪出頻率的精準度。 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍 所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖為本發明鎖相迴路之一實施例的示意圖。 第2圖為本發明包含第1圖中相位偵測器及電荷泵之電路之一實施 例的示意圖。 第3圖為本發明電荷泵之一實施例的概要架構圖。 第4圖為本發明能降低漏電流的充放電方法之一實施例的流程圖。 【主要元件符號說明】 100 鎖相迴路 110 相位偵測器 112 、 114 及閘 116 、 350 選擇訊號產生器 120 電荷泵 130 低通濾波器 140 壓控震盪器 202 反向器 204 延遲單元 210 > 310 第一選擇器 12 201103242 220、320 第二選擇器 230、330 第三選擇器 240、340 第四選擇器Ml, M2 and a first supply voltage VDD are controlled by two selection signals VSEL, Vseli. The second selector 220 is coupled between the transistor M3 and a second supply voltage GND for use as the AND gate 112, and includes three transistors M5 M M7, which are respectively selected by the signal VSEL2 and the reverse feedback signal. Vbp and reference signal \^ are controlled. The third selector 230 is coupled between the transistor M4 and the second supply voltage GND to serve as the AND gate 114, and includes three transistors M8 M1010, which are respectively selected by the signal VSEL2, the reverse reference signal νφ, and The feedback signal is controlled by Vbn. The selection signal generator 116 controls the second selector 220 and the third selector 230 by using the selection signal VSEL2. When the logic value of the selection signal VSEL2 is T, the charge pump 120 is connected to the phase detection no, and the capacitance Ci is According to the current Ijjp / Iqo ^ ^ charge and discharge; when the logic value of the selection signal VSEL2, 0,, the charge pump 120 and the phase detector 110 are disconnected, in an ideal case, the control signal Vctrl will be maintained At a fixed value. Please note that when the logic value of the selection signal VSEL2 is switched from T, T, to 0, the transistor M1 may not be completely turned off due to the residual voltage at the node Nm, in other words 'here At the same time, if the transistor M1 still has a small current, the voltage level of the control signal Vctrl may be affected. Considering the above factors which may cause the transistor M1 not to be completely turned off, in the circuit 2〇〇_ of the present invention, the delay selection unit 204 delays the reference selection signal vSEI>X to generate the selection signal VSEL2, that is, the selection signal VSEL2 falls behind. Select the signal 201103242 VSEL, VSEL1. Therefore, when the logic value of the selection signal VSEL2 is switched from "1" to ",", the first selector 210 and the fourth selector 240 are turned off at the second selector 220 and the third selector 230. It has been turned off (the connection between the transistor M1 and the first supply voltage Vdd is interrupted), so no current is stored in the transistor M1, so that even if the transistor M1 has not been completely turned off, the control signal \^& The voltage level of 1 will not be affected. Note that in the circuit 200, the first selector 21A and the fourth selector 240 are both transmission gates and are controlled by the selection signals VSEL, VSEU. However, in other embodiments of the present invention, the first selector 210 and the fourth selector 240 may also be implemented by other circuit designs, such as a single N-type MOS transistor or a P-type MOS transistor. It is only necessary to select one of the signals VSEL, VSELI to control (if only the signal VSEL needs to be selected, the inverter 202 can be removed). These design variations are also within the scope of the invention. In addition, please note that in the circuit 200, all of the transistors M1 M M10 are MOS transistors, however, in another embodiment of the invention, the circuit 2 〇〇 can also be a bi-carrier junction transistor ( Bipolar Junction Transistor (BJT) is implemented (such as MOS transistor Ml~M10 replaced by a double-carrier junction transistor)' and after reading the above description, the general knowledge in the field should be easily understood. How to implement the design circuit disclosed by the present invention by using a dual-carrier junction transistor, therefore, for the sake of brevity of the description, the detailed description is omitted here. In addition, in the circuit 200, the transistors M3 and M4 are optional devices, which can be removed according to different design requirements; that is, the transistors M1 and M2 can be directly coupled to the second selector respectively. 220 and a third selector 230; in addition, the fourth selector 240 is also an optional device and can be removed. These design changes are also within the scope of the present invention. Figure 3 is a schematic block diagram of a charge pump 3A in one embodiment of the present invention. As shown in FIG. 3, the charge pump 300 includes two transistors M1, M2, a first selector 310, a second selector 320, a third selector 330, a fourth selector 340, and a selection. Signal generator 350. The selection signal generator 350 generates a first selection afU tiger VSEL1 and a second selection signal VseL2, and selectively controls the first and fourth selectors to respectively connect the transistor 訄卜河2 to the first selection signal. The first supply voltage VDD is coupled to the second selection signal to selectively control the first and second selectors to respectively connect the transistor M to a second supply voltage GND. The charge pump 300 operates in a similar manner to the circuit 2〇〇 in FIG. 2, and after reading the description of the operation mode of the second ® towel circuit 2GG, those having ordinary knowledge in the field should be able to easily understand the electricity. The way the spine works, so the detailed description is omitted here. «Monthly reference to Fig. 4' Fig. 4 is a flow chart showing a charge and discharge method capable of reducing leakage current in an embodiment of the present invention. Please - and refer to the circuit 3〇〇 in Figure 3 and the flow in Figure 4, the steps of the power generation method of the current drop current are as follows: 201103242 Step 400: Provide a first mine a B0 _ ' " The second transistor includes a -first-gate electrode, a -electrode, and as an output step 4〇2 a second transistor, wherein the second transistor includes a second opening 2, a third _, and a fourth electrode, the first transistor: the idle electrode is bribed to the second gate electrode of the second transistor, and the second gate electrode of the second electrical body is lightly connected to the second transistor The fourth electrode. Step 404. Providing a first (receiving gg, 曰, 器, including a two-end point, respectively coupled to the first electrode of the first electrode body and - the first supply voltage, for The first | crystal is selectively connected to the first supply voltage. Step 406. Providing a second selector, comprising: a first electrode electrically connected to the first electric B body and a second supply voltage for selectively connecting the first transistor To the second supply voltage. Step 408: providing a second media crying. The selector has a two-terminal point, respectively coupled to the fourth electrode of the second transistor and the second supply voltage for selectively The second transistor is coupled to the third supply voltage. Step: controlling the first selector to be selectively turned off to interrupt the connection of the first transistor to the first supply voltage, so that there is no current in the first transistor, so that the charge is lost (four) Bit* is affected by leakage current. In summary, according to the charge pump and the charging and discharging method proposed by the present invention, the output of the charge fruit will be affected by the current, so that the accuracy of the voltage of the voltage controlled shock 201103242 can be improved. . The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should fall within the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing an embodiment of a phase locked loop of the present invention. Fig. 2 is a schematic view showing an embodiment of a circuit including a phase detector and a charge pump in Fig. 1 of the present invention. Figure 3 is a schematic architectural diagram of one embodiment of a charge pump of the present invention. Fig. 4 is a flow chart showing an embodiment of a charging and discharging method capable of reducing leakage current according to the present invention. [Main component symbol description] 100 phase-locked loop 110 phase detector 112, 114 and gate 116, 350 select signal generator 120 charge pump 130 low-pass filter 140 voltage-controlled oscillator 202 inverter 204 delay unit 210 > 310 first selector 12 201103242 220, 320 second selector 230, 330 third selector 240, 340 fourth selector