TWI415519B - A control device for segmented control of a light emitting diode - Google Patents

<P>PROBLEM TO BE SOLVED: To provide a segment control LED drive element which is suitable for driving a plurality of LEDs arranged in an array shape. <P>SOLUTION: A drive element registers a group channel signal in a group channel data area and registers a current count value in a count data area when receiving a latch permission signal for a segment. The drive element updates a luminance signal in a buffer circuit via a designated channel in the group channel data area when receiving a latch permission signal for segment update. A comparison circuit outputs a drive signal for driving a LED by segment update in accordance with the registered count value, a real-time count value, and the updated luminance signal. <P>COPYRIGHT: (C)2012,JPO&amp;INPIT

發光二極體之分段控制的驅動裝置 Segmented controlled driving device for light-emitting diode

本發明係關於一種發光二極體的驅動裝置，特別是一種適用於驅動液晶顯示器(Liquid Crystal Display，LCD)的發光二極體背光源之可分時段更新控制的驅動裝置。 The invention relates to a driving device for a light-emitting diode, in particular to a driving device for controlling the time-division update of a light-emitting diode backlight of a liquid crystal display (LCD).

由於發光二極體(Light Emitting Diode，LED)與一般發光源相比較，發光二極體具有壽命長、耗電量低、不易損壞等優點，使得發光二極體成為人類在研究開發與生活應用方面的重要對象。 Since the light emitting diode (LED) has the advantages of long life, low power consumption, and low damage, the light emitting diode has become a human research and development application in comparison with a general light source. Important object of the aspect.

近年來，液晶顯示器廣為被人類所應用。由於液晶分子不會自行發光，所以必須藉由背光模組提供光線才可達到顯示的功能。目前所普遍使用的背光模組之光源為冷陰極螢光燈(Cold Cathode Fluorescent Lamp，CCFL)，但冷陰極螢光燈存在有反應速度不易改善等問題。因此，發光二極體成為液晶顯示器的背光源必為未來的趨勢。由於發光二極體屬於點光源，要提供穩定光源給顯示器，需採用陣列式排列的多個發光二極體。驅動裝置會發送脈衝寬度調變(Pulse Width Modulation，PWM)訊號以驅動發光二極體。 In recent years, liquid crystal displays have been widely used by humans. Since the liquid crystal molecules do not emit light by themselves, it is necessary to provide light through the backlight module to achieve the display function. The light source of the backlight module commonly used at present is a Cold Cathode Fluorescent Lamp (CCFL), but the cold cathode fluorescent lamp has problems such that the reaction speed is not easily improved. Therefore, the light-emitting diode becomes a backlight of a liquid crystal display, which is a future trend. Since the light-emitting diode belongs to a point light source, to provide a stable light source to the display, a plurality of light-emitting diodes arranged in an array are required. The drive device sends a Pulse Width Modulation (PWM) signal to drive the LED.

一般而言，用以驅動以陣列排列的發光二極體時，驅動裝置會以串聯的方式連接。以一個長寬各為10×3的發光二極體陣列、每個驅動器具有16個通道，而每一通道可驅動一個發光二極體為例，此時每一行(row)有10個發光二極體，共有三列(column)。但若欲將每一行的發光二極體於不同時間被驅動，則每一行的發光二極體(10個發光二極體)需要連接一驅動裝置以進行控制，使得每一個驅動裝置浪費6個可驅動發光二極體的通道，且總共使用的驅動裝置數量為三個。上述習知的做法存在有需同時更新單一驅動裝置中所有通道的資料問題。而且，當驅動裝置所 驅動的發光二極體數量小於驅動裝置的通道數量時，則浪費驅動裝置未被使用的通道，造成製作成本的浪費。 In general, when driving the light emitting diodes arranged in an array, the driving devices are connected in series. Taking a light-emitting diode array of length and width of 10×3, each driver has 16 channels, and each channel can drive one light-emitting diode as an example. At this time, each row has 10 light-emitting diodes. Polar body, there are three columns (column). However, if each row of LEDs is to be driven at different times, each row of LEDs (10 LEDs) needs to be connected to a driving device for control, so that each driving device wastes 6 The channels of the light-emitting diodes can be driven, and the total number of drives used is three. The above-mentioned conventional practice has the problem of simultaneously updating the data of all channels in a single drive. Moreover, when the drive unit When the number of driving LEDs is smaller than the number of channels of the driving device, the unused channels of the driving device are wasted, resulting in waste of manufacturing costs.

鑒於以上問題，本發明提出一種發光二極體之分段控制的驅動裝置，以解決驅動裝置的通道未完全被使用，進而造成利用發光二極體為背光源的液晶顯示器於製造成本上存在有浪費的問題。 In view of the above problems, the present invention provides a segmented control driving device for a light-emitting diode to solve the problem that the channel of the driving device is not completely used, thereby causing the liquid crystal display using the light-emitting diode as a backlight to have a manufacturing cost. The problem of wasting.

本發明之發光二極體之分段控制的驅動裝置，係適用於驅動以陣列方式排列的多個發光二極體。分段控制的驅動裝置係接收一資料時脈信號、一鎖存致動信號及一資料信號而產生一驅動信號。其中，分段控制的驅動裝置包括串列暫存電路、辨識模組、計數器、控制電路、計數暫存電路、群組暫存模塊、緩存電路以及比較電路。辨識模組接收該資料時脈信號與該鎖存致動信號。當鎖存致動信號的週期為資料時脈信號的週期之二倍時，辨識模組輸出第一致能信號。當鎖存致動信號的週期為資料時脈信號的週期之一倍時，辨識模組輸出第二致能信號。串列暫存電路接收資料信號，並依據第一致能信號輸出群組通道信號或依據第二致能信號輸出亮度信號。 The segmented control driving device of the light-emitting diode of the present invention is suitable for driving a plurality of light-emitting diodes arranged in an array. The segment-controlled driving device receives a data clock signal, a latching actuation signal and a data signal to generate a driving signal. The segmentation control driving device comprises a serial temporary storage circuit, an identification module, a counter, a control circuit, a counting temporary storage circuit, a group temporary storage module, a buffer circuit and a comparison circuit. The identification module receives the data clock signal and the latch actuation signal. When the period of the latch actuation signal is twice the period of the data clock signal, the identification module outputs the first enable signal. When the period of the latch actuation signal is one time of the period of the data clock signal, the identification module outputs the second enable signal. The serial temporary storage circuit receives the data signal, and outputs the group channel signal according to the first enable signal or outputs the brightness signal according to the second enable signal.

計數器循迴計數至預定值，並持續接收整體時脈信號而即時輸出計數值。也就是說，計數值必定小於或等於預定值。控制電路接收群組通道信號而輸出控制信號。計數暫存電路包括多個計數資料區，計數暫存電路可接收鎖存致動信號與控制信號，且可依據所接收的控制信號，使得這些計數資料區之一儲存計數值，每個計數資料區係具有至少一指定通道。 The counter loops back to a predetermined value and continuously receives the overall clock signal to immediately output the count value. That is, the count value must be less than or equal to the predetermined value. The control circuit receives the group channel signal and outputs a control signal. The counting temporary storage circuit comprises a plurality of counting data areas, and the counting temporary storage circuit can receive the latching actuation signal and the control signal, and can cause one of the counting data areas to store the counting value according to the received control signal, and each counting data The fauna has at least one designated channel.

群組暫存模塊包括多個群組通道資料區，群組暫存模塊可接收通道選擇信號與控制信號，且可依據所接收的控制信號，使得這些群組通道資料區之一儲存串列暫存電路所接收到的資料信號，且每個計數資料區分別與這些群組通道資料區之一對應，這些計數資料區與其對應的群組通道資料區係具有相同的指定通道。 The group temporary storage module includes a plurality of group channel data areas, and the group temporary storage module can receive the channel selection signal and the control signal, and can store one of the group channel data areas according to the received control signal. The data signals received by the circuit, and each of the count data areas respectively correspond to one of the group channel data areas, and the count data areas have the same designated channels as the corresponding group channel data areas.

緩存電路於接收到第二致能信號時，緩存亮度信號於指定通道，且緩存亮度信號的指定通道需由上述儲存串列暫存電路所接收到的資 料信號之群組通道資料區所控制。比較電路係接收這些計數資料區所儲存的計數值、計數器即時輸出的計數值與指定通道所緩存亮度信號而輸出驅動信號。驅動信號係用以控制這些發光二極體的發光狀態。其中，當計數器即時輸出的計數值分別與這些計數資料區所儲存的計數值之差值大於亮度信號時，驅動信號驅動這些發光二極體。 When receiving the second enable signal, the buffer circuit buffers the luminance signal on the designated channel, and the designated channel of the buffered luminance signal needs to be received by the storage serial register temporary storage circuit. The group signal data area of the material signal is controlled. The comparison circuit receives the count value stored in the count data area, the count value output by the counter and the brightness signal buffered by the designated channel, and outputs the drive signal. The driving signals are used to control the lighting states of the light emitting diodes. Wherein, when the difference between the count value of the counter output and the count value stored in the count data area is greater than the brightness signal, the driving signal drives the light emitting diodes.

依據本發明之分段控制的驅動裝置，係適用於以發光二極體為背光源的液晶顯示器。藉由計數暫存電路、控制信號以及群組通道信號，驅動裝置僅需單一計數器即可使得驅動裝置中的指定通道於不同時段進行資料的更新，進而解決習知技術中所存在的需同時更新單一驅動裝置中所有通道的資料的問題。而且藉由群組暫存模塊可控制其具有的指定通道儲存串列暫存電路所接收的資料訊號為亮度信號，可確保指定通道才可更新亮度信號。再者，藉由上述驅動裝置的結構可使得每一驅動裝置的所有通道皆被使用，不會存在有通道閒置而造成浪費的問題。 The segmented control driving device according to the present invention is suitable for a liquid crystal display with a light emitting diode as a backlight. By counting the temporary storage circuit, the control signal and the group channel signal, the driving device only needs a single counter to enable the specified channel in the driving device to update the data in different time periods, thereby solving the need to simultaneously update in the prior art. Problem with data for all channels in a single drive. Moreover, the group temporary storage module can control the data signal received by the specified channel storage serial temporary storage circuit to be a luminance signal, thereby ensuring that the specified channel can update the luminance signal. Moreover, by the structure of the above-mentioned driving device, all the channels of each driving device can be used, and there is no problem that the channel is idle and waste.

以上關於本發明的內容說明及以下之實施方式的說明係用以示範與解釋本發明的精神與原理，並且提供本發明的專利申請範圍更進一步的解釋。 The description of the present invention and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention, and to provide further explanation of the scope of the invention.

90、92‧‧‧發光二極體 90, 92‧‧‧Lighting diodes

96、97、98、99‧‧‧開關 96, 97, 98, 99‧‧‧ switch

100a、100b、200‧‧‧分段控制的驅動裝置 100a, 100b, 200‧‧‧ segment controlled drive

102、202‧‧‧串列暫存電路 102, 202‧‧‧ tandem temporary storage circuit

103、203‧‧‧辨識模組 103, 203‧‧‧ Identification Module

104、204‧‧‧計數器 104, 204‧‧‧ counter

106、206‧‧‧控制電路 106, 206‧‧‧ control circuit

108、208‧‧‧計數暫存電路 108, 208‧‧‧ count temporary storage circuit

110、210‧‧‧群組暫存模塊 110, 210‧‧‧Group Staging Module

112、212‧‧‧緩存電路 112, 212‧‧‧ Cache circuit

114、214‧‧‧比較電路 114, 214‧‧‧ comparison circuit

120、220‧‧‧第一計數資料區 120, 220‧‧‧ first count data area

122、222‧‧‧第二計數資料區 122, 222‧‧‧ second count data area

224‧‧‧第三計數資料區 224‧‧‧ third count data area

126、226‧‧‧比較模組 126, 226‧‧‧ comparison module

130‧‧‧選擇器 130‧‧‧Selector

131‧‧‧減法器 131‧‧‧Subtractor

132‧‧‧比較器 132‧‧‧ comparator

134、234‧‧‧第一群組通道資料區 134, 234‧‧‧First group channel data area

136、236‧‧‧第二群組通道資料區 136, 236‧‧‧Second group channel data area

238‧‧‧第三群組通道資料區 238‧‧‧ Third group channel data area

GCLK1、GCLK2‧‧‧整體時脈信號 GCLK1, GCLK2‧‧‧ overall clock signal

DCLK1、DCLK2‧‧‧資料時脈信號 DCLK1, DCLK2‧‧‧ data clock signal

LE1、LE2‧‧‧鎖存致動信號 LE1, LE2‧‧‧Latch actuation signals

SD1、SD2、SD3‧‧‧資料信號 SD1, SD2, SD3‧‧‧ data signals

SDI、SDO‧‧‧資料信號 SDI, SDO‧‧‧ data signals

DS1、DS2‧‧‧驅動信號 DS1, DS2‧‧‧ drive signals

FE1、FE2‧‧‧第一致能信號 FE1, FE2‧‧‧ first enable signal

SE1、SE2‧‧‧第二致能信號 SE1, SE2‧‧‧ second enable signal

GC1、GC2‧‧‧群組通道信號 GC1, GC2‧‧‧ group channel signals

IS1、IS2‧‧‧亮度信號 IS1, IS2‧‧‧ brightness signal

CNT1、CNT2‧‧‧計數值 CNT1, CNT2‧‧‧ count value

CS1、CS2‧‧‧控制信號 CS1, CS2‧‧‧ control signals

T₀、T₁、T₂、T₃、T₄、T₅‧‧‧時序 T ₀ , T ₁ , T ₂ , T ₃ , T ₄ , T ₅ ‧‧‧ timing

T₆、T₇、T₈、T₉、T₁₀、T₁₁‧‧‧時序 T ₆ , T ₇ , T ₈ , T ₉ , T ₁₀ , T ₁₁ ‧‧‧ Timing

t₀、t₁、t₂、t₃、t₄、t₅‧‧‧時序 t ₀ , t ₁ , t ₂ , t ₃ , t ₄ , t ₅ ‧‧‧ timing

t₆、t₇、t₈、t₉、t₁₀、t₁₁‧‧‧時序 t ₆ , t ₇ , t ₈ , t ₉ , t ₁₀ , t ₁₁ ‧‧‧

t₁₂、t₁₃、t₁₄、t₁₅、t₁₆、t₁₇‧‧‧時序 t ₁₂ , t ₁₃ , t ₁₄ , t ₁₅ , t ₁₆ , t ₁₇ ‧‧‧

第1圖係為依據本發明之分段控制的驅動裝置的第一實施例應用於陣列式排列的發光二極體的電路連接示意圖；第2圖係為依據本發明之分段控制的驅動裝置第一實施例電路方塊示意圖；第3圖係為依據本發明之分段控制的驅動裝置第一實施例的計數暫存電路與群組暫存模塊之電路方塊示意圖；第4圖係為依據本發明之分段控制的驅動裝置第一實施例的比較模組電路方塊示意圖； 第5圖係為依據本發明之分段控制的驅動裝置第一實施例之分段驅動的時序圖；第6圖係為依據本發明之分段控制的驅動裝置的第二實施例之電路方塊示意圖；以及第7圖係為依據本發明之分段控制的驅動裝置第二實施例之分段驅動的時序圖。 1 is a schematic diagram of a circuit connection of a first embodiment of a segment-controlled driving device according to the present invention applied to an array of light-emitting diodes; and FIG. 2 is a segment-controlled driving device according to the present invention; The circuit block diagram of the first embodiment is a circuit block diagram of the first embodiment of the driving device for segmentation control according to the present invention; FIG. 4 is a schematic diagram of the circuit according to the present invention; Block diagram of a comparison module circuit of the first embodiment of the driving device for segmentation control of the invention; Figure 5 is a timing diagram of the segment drive of the first embodiment of the drive device according to the present invention; and Figure 6 is a circuit block of the second embodiment of the drive device for segment control according to the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 7 is a timing diagram of a segment drive of a second embodiment of a segmented drive device in accordance with the present invention.

請參照「第1圖」，係為依據本發明之分段控制的驅動裝置的第一實施例應用於陣列式排列的發光二極體的電路連接示意圖。發光二極體之分段控制的驅動裝置100a、100b係適用於驅動以陣列式排列之多個發光二極體90。在本實施例中，分段控制的驅動裝置100a與分段控制的驅動裝置100b分別可驅動十六個通道，每個通道可以包含一個或多個發光二極體90，在同一通道中的發光二極體90係同步動作，以本實施例為例，每一通道係僅具有一個發光二極體90，但並不以此為限。從圖中可以見悉，因發光二極體陣列中僅具有30個發光二極體90，故第二個分段控制的驅動裝置100b的最後二個通道並未連接任何的發光二極體。此外，本實施例中被驅動的陣列排列之發光二極體90雖僅有10×3個，但是並不限於此。 Please refer to FIG. 1 for a circuit connection diagram of a first embodiment of a segmented control device according to the present invention applied to an array of light emitting diodes. The segmented controlled driving devices 100a, 100b of the light emitting diodes are adapted to drive a plurality of light emitting diodes 90 arranged in an array. In this embodiment, the segment-controlled driving device 100a and the segment-controlled driving device 100b can respectively drive sixteen channels, each channel can include one or more light-emitting diodes 90, and the light in the same channel The diodes 90 are synchronously operated. In this embodiment, for example, each channel has only one light-emitting diode 90, but is not limited thereto. As can be seen from the figure, since there are only 30 light-emitting diodes 90 in the array of light-emitting diodes, the last two channels of the driving device 100b controlled by the second segment are not connected to any light-emitting diodes. Further, although the number of the light-emitting diodes 90 arranged in the array to be driven in the present embodiment is only 10 × 3, it is not limited thereto.

從「第1圖」中可以得知，分段控制的驅動裝置100a、100b連接相同的資料時脈信號DCLK1(data clock signal)與鎖存致動信號LE1(latch enable signal)，分段控制的驅動裝置100a接收資料信號SD1(serial data，亦可稱為SDI,serial data input)而輸出資料信號SD2(亦可稱SDO，serial data output)，分段控制的驅動裝置100b接收資料信號SD2而輸出資料信號SD3。換句話說，分段控制的驅動裝置100a與分段控制的驅動裝置100b串接。且分段控制的驅動裝置100a、100b係可能會連接到不同行(row)，因此，以分段控制的驅動裝置100a為例，其前10個通道係驅動發光二極體陣列的第一行，而後6個通道則是驅動發光二極體陣列的第二行的前6個發光二極體90，分段控制的驅動裝置100b則以此類推。 As can be seen from "FIG. 1", the segmented control driving devices 100a, 100b are connected to the same data clock signal DCLK1 (data clock signal) and latch enable signal LE1 (latch enable signal), segmented control The drive device 100a receives the data signal SD1 (serial data, also referred to as SDI, serial data input) and outputs a data signal SD2 (also referred to as SDO, serial data output), and the segmented control device 100b receives the data signal SD2 and outputs Data signal SD3. In other words, the segment-controlled drive device 100a is connected in series with the segment-controlled drive device 100b. And the segment-controlled driving devices 100a, 100b may be connected to different rows. Therefore, taking the segment-controlled driving device 100a as an example, the first 10 channels drive the first row of the LED array. The next six channels are the first six LEDs 90 driving the second row of the LED array, and the segment-controlled driving device 100b is deduced by analogy.

在本實施例中，發光二極體陣列的驅動方式為一個時間點會對同一行進行亮度更新及驅動，因此，分段控制的驅動裝置100a的前10個通道在更新亮度(或稱灰階)資料時，後6個通道則不更新。而後6個通道在更新時，前10個通道則不更新，此即本發明欲達成之分段驅動(更新)之目的，但本實施例並非用以限定本發明，可依據實際分段更新狀況進行調整，需注意的是通道進行分段更新亮度資料的同時，不會影響其他不需更新亮度資料的通道。以下實施例中，分段控制的驅動裝置100a可為更新通道的亮度資料，但本實施例並非用以限定本發明。 In this embodiment, the driving manner of the LED array is to update and drive the brightness of the same row at a time point. Therefore, the first 10 channels of the segment-controlled driving device 100a are updated in brightness (or gray scale). When the data is available, the last 6 channels are not updated. When the last six channels are updated, the first 10 channels are not updated, which is the purpose of the segmentation drive (update) to be achieved by the present invention. However, this embodiment is not intended to limit the present invention, and may be updated according to the actual segmentation. To make adjustments, it should be noted that the channel will update the brightness data in segments without affecting other channels that do not need to update the brightness data. In the following embodiments, the segment-controlled driving device 100a may be the brightness information of the update channel, but the embodiment is not intended to limit the present invention.

請參考「第2圖」，係為依據本發明之分段控制的驅動裝置的第一實施例之電路方塊示意圖。分段控制的驅動裝置100a係接收資料時脈信號DCLK1、鎖存致動信號LE1及資料信號SD1而產生至少一驅動信號DS1(drive signal)，每一驅動信號DS1係用以控制每一通道所連接的發光二極體90之發光狀態。在本實施例中，所有信號皆可為方波信號，但非用以限定本發明。 Please refer to FIG. 2, which is a circuit block diagram of a first embodiment of a segmented control driving device according to the present invention. The segmentation control driving device 100a receives the data clock signal DCLK1, the latch actuation signal LE1, and the data signal SD1 to generate at least one driving signal DS1 (drive signal), and each driving signal DS1 is used to control each channel. The light-emitting state of the connected light-emitting diodes 90. In this embodiment, all signals may be square wave signals, but are not intended to limit the present invention.

發光二極體90之分段控制的驅動裝置100a包括開關96、開關98、串列暫存電路102、辨識模組103、計數器104、控制電路106、計數暫存電路108、群組暫存模塊110、緩存電路112以及比較電路114。 The driving device 100a for segment control of the LEDs 90 includes a switch 96, a switch 98, a serial temporary storage circuit 102, an identification module 103, a counter 104, a control circuit 106, a counting temporary storage circuit 108, and a group temporary storage module. 110. Cache circuit 112 and comparison circuit 114.

辨識模組103接收資料時脈信號DCLK1與鎖存致動信號LE1，當鎖存致動信號LE1的高準位時間為資料時脈信號DCLK1的高準位時間之二倍(或鎖存致動信號LE1的高準位時間包含二次資料時脈信號DCLK1的上升邊緣)時，辨識模組103輸出第一致能信號FE1(first enable)。當鎖存致動信號LE1的高準位時間為資料時脈信號DCLK1的高準位時間之一倍(或鎖存致動信號LE1的高準位時間包含一次資料時脈信號DCLK1的上升邊緣)時，辨識模組103輸出第二致能信號SE1(second enable)。開關96依據第一致能信號FE1而開啟，使得串列暫存電路102接收資料信號SD1而輸出群組通道信號GC1(group channel)，或開關98依據第二致能信號SE1而開啟，使得串列暫存電路102接收資料信號SD1而輸出亮度信號IS1(intensity signal)，且串列暫存電路102輸出資料信號SD2。 The identification module 103 receives the data clock signal DCLK1 and the latch actuation signal LE1, and the high-level time of the latch actuation signal LE1 is twice the high-level time of the data clock signal DCLK1 (or latch actuation) When the high level time of the signal LE1 includes the rising edge of the secondary data clock signal DCLK1, the identification module 103 outputs the first enable signal FE1 (first enable). When the high-level time of the latch actuation signal LE1 is one times the high-level time of the data clock signal DCLK1 (or the high-level time of the latch actuation signal LE1 includes the rising edge of the data clock signal DCLK1) The identification module 103 outputs a second enable signal SE1 (second enable). The switch 96 is turned on according to the first enable signal FE1, so that the serial temporary storage circuit 102 receives the data signal SD1 and outputs the group channel signal GC1 (group channel), or the switch 98 is turned on according to the second enable signal SE1, so that the string The column temporary storage circuit 102 receives the data signal SD1 and outputs a luminance signal IS1 (intensity signal), and the serial temporary storage circuit 102 outputs the data signal SD2.

在本實施例中，鎖存致動信號LE1可為下降邊緣(falling edge)觸發的信號，但本實施例並非用以限定本發明。也就是說，鎖存致動信號LE1亦可為上升邊緣(rising edge)觸發的信號。其中，下降邊緣係指從高準位轉變成低準位的位置，上升邊緣係指從低準位轉變成高準位的位置。 In this embodiment, the latch actuation signal LE1 can be a falling edge (falling Edge) The triggered signal, but this embodiment is not intended to limit the invention. That is to say, the latch actuation signal LE1 can also be a signal triggered by a rising edge. Wherein, the falling edge refers to a position that changes from a high level to a low level, and the rising edge refers to a position that changes from a low level to a high level.

計數器104循迴計數至預定值，並持續接收整體時脈信號GCLK1(global clock signal)而即時輸出計數值，其中整體時脈信號GCLK1為分段控制的驅動裝置100a的內部時脈信號。換句話說，預定值係為計數值的最大值，也就是說計數值必小於或等於預定值。前述循迴計數係指計數器104從零開始數至預定值，在到達預定值後，則再回到零繼續累加。舉例而言，若預定值為4095(2的12次方，即12位元bit)，則計數器104依據整體時脈信號GCLK1，每接收一個時脈即累加1，從零開始，一直數到4095，到達4095後，下一個時脈即從零開始重新計數。而計數器104所輸出的計數值，則是指在計數器104計數過程中，該計數器104當時所計數到的數值，亦可稱即時計數值。 The counter 104 counts back to a predetermined value and continuously receives the global clock signal GCLK1 (global clock signal) to output the count value instantaneously, wherein the overall clock signal GCLK1 is the internal clock signal of the segment-controlled driving device 100a. In other words, the predetermined value is the maximum value of the count value, that is, the count value must be less than or equal to the predetermined value. The aforementioned round-robin count means that the counter 104 counts from zero to a predetermined value, and after reaching the predetermined value, it returns to zero and continues to accumulate. For example, if the predetermined value is 4095 (the 12th power of 2, that is, the 12-bit bit), the counter 104 accumulates 1 for each clock received according to the overall clock signal GCLK1, starting from zero and continuing to the number 4095. After reaching 4095, the next clock is recounted from zero. The counter value output by the counter 104 refers to the value counted by the counter 104 during the counting of the counter 104, which may also be called the real-time counter value.

當辨識模組103輸出第一致能信號FE1時，控制電路106接收串列暫存電路102所輸出的群組通道信號GC1，而輸出控制信號CS1。在本實施例中，控制信號CS1包括10(即第一信號)與01(即第二信號)，但本實施例並非用以限定本發明。可依據實際分段控制的驅動裝置100a中所有通道被分段的群組數量來決定控制信號CS1所包括的信號數量，在本實施例中，分段控制的驅動裝置100a的所有通道被分成二群組，即第一通道至第十通道為一個群組，第十一通道至第十六通道為另一個群組。換句話說，當群組通道信號GC1為1111 1111 1100 0000時，控制電路106利用此群組通道信號GC1(即1111 1111 1100 0000的第一個信號與最後一個信號)而並聯輸出10(即第一信號)。當群組通道信號GC1為0000 0000 0011 1111時，控制電路106利用此群組通道信號GC1(即0000 0000 0011 1111的第一個信號與最後一個信號)而並聯輸出01(即第二信號)，但本實施例並非用以限制本發明。 When the identification module 103 outputs the first enable signal FE1, the control circuit 106 receives the group channel signal GC1 output by the serial temporary storage circuit 102, and outputs the control signal CS1. In the present embodiment, the control signal CS1 includes 10 (ie, the first signal) and 01 (ie, the second signal), but the embodiment is not intended to limit the present invention. The number of signals included in the control signal CS1 may be determined according to the number of groups in which all channels in the driving device 100a of the actual segmentation control are segmented. In this embodiment, all channels of the segment-controlled driving device 100a are divided into two. The group, that is, the first channel to the tenth channel are one group, and the eleventh channel to the sixteenth channel are another group. In other words, when the group channel signal GC1 is 1111 1111 1100 0000, the control circuit 106 uses the group channel signal GC1 (ie, the first signal and the last signal of 1111 1111 1100 0000) to output 10 in parallel (ie, a signal). When the group channel signal GC1 is 0000 0000 0011 1111, the control circuit 106 uses the group channel signal GC1 (ie, the first signal and the last signal of 0000 0000 0011 1111) to output 01 (ie, the second signal) in parallel, However, this embodiment is not intended to limit the invention.

請參照「第2圖」與「第3圖」，「第3圖」係為依據本發明之分段控制的驅動裝置第一實施例的計數暫存電路與群組暫存模塊之電路 方塊示意圖。計數暫存電路108包括第一計數資料區120與第二計數資料區122，且分別與控制電路106及計數器104連接，但本實施例並非用以限定本發明，可依據實際分段控制的驅動裝置100a之所有通道被分成的群組數量決定計數資料區的數量，不過，需注意的是計數資料區的數量最多可與分段控制的驅動裝置100a的通道數量相同。 Please refer to "Fig. 2" and "Fig. 3", which is a circuit of the counting temporary storage circuit and the group temporary storage module of the first embodiment of the driving device according to the present invention. Block diagram. The counting temporary storage circuit 108 includes a first counting data area 120 and a second counting data area 122, and is respectively connected to the control circuit 106 and the counter 104. However, this embodiment is not intended to limit the present invention, and may be driven according to actual segmentation control. The number of groups in which all channels of the device 100a are divided determines the number of count data areas, however, it should be noted that the number of count data areas may be the same as the number of channels of the segment-controlled drive device 100a.

當辨識模組103輸出第一致能信號FE1且控制電路106輸出控制信號CS1時，計數暫存電路108係接收鎖存致動信號LE1(此鎖存致動信號LE1的高準位時間為資料時脈信號DCLK1的高準位時間之二倍)與控制信號CS1時，於第一計數資料區120與第二計數資料區122其中之一儲存計數器104當時計數到的計數值，且第一計數資料區120具有第一通道至第十通道為其指定通道，第二計數資料區122具有第十一通道至第十六通道為其指定通道。舉例而言，當計數暫存電路108接收鎖存致動信號LE1與10(即第一信號)時，由於控制電路106並聯輸出10(即1輸入第一計數資料區120，0輸入第二計數資料區122)，所以第一計數資料區120儲存計數值。當計數暫存電路108接收接收鎖存致動信號LE1與01(即第二信號)時，由於控制電路106並聯輸出01(即0輸入第一計數資料區120，1輸入第二計數資料區122)，所以第二計數資料區122儲存計數值。 When the identification module 103 outputs the first enable signal FE1 and the control circuit 106 outputs the control signal CS1, the count temporary storage circuit 108 receives the latch actuation signal LE1 (the high-level time of the latch actuation signal LE1 is data). When the control signal CS1 is equal to the control signal CS1, the counter value counted by the counter 104 is stored in one of the first count data area 120 and the second count data area 122, and the first count is The data area 120 has a first channel to a tenth channel for its designated channel, and the second count data area 122 has an eleventh channel to a sixteenth channel for its designated channel. For example, when the count temporary storage circuit 108 receives the latch actuation signals LE1 and 10 (ie, the first signal), since the control circuit 106 outputs 10 in parallel (ie, 1 input first count data area 120, 0 input second count) The data area 122), so the first count data area 120 stores the count value. When the count temporary storage circuit 108 receives the receive latch actuation signals LE1 and 01 (ie, the second signal), since the control circuit 106 outputs 01 in parallel (ie, 0 is input to the first count data area 120, 1 is input to the second count data area 122. Therefore, the second count data area 122 stores the count value.

群組暫存模塊110包括第一群組通道資料區134與第二群組通道資料區136，且分別與串列暫存電路102及控制電路106連接。群組暫存模塊110係於接收到第一致能信號FE1與控制信號CS1時，於第一群組通道資料區134與第二群組通道資料區136其中之一儲存群組通道信號GC1，計數資料區的數量與群組通道資料區的數量相同，且每一計數資料區與每一群組通道資料區對應，計數資料區與其對應的群組通道資料區係具有相同的指定通道。 The group temporary storage module 110 includes a first group channel data area 134 and a second group channel data area 136, and is connected to the serial temporary storage circuit 102 and the control circuit 106, respectively. The group temporary storage module 110 stores the group channel signal GC1 in one of the first group channel data area 134 and the second group channel data area 136 when receiving the first enable signal FE1 and the control signal CS1. The number of counting data areas is the same as the number of group channel data areas, and each counting data area corresponds to each group channel data area, and the counting data area has the same designated channel as its corresponding group channel data area.

也就是說，當群組暫存模塊110接收到鎖存致動信號LE1(此鎖存致動信號LE1的高準位時間為資料時脈信號DCLK1的高準位時間之二倍)與10(即第一信號)時，由於控制電路106並聯輸出10(即1輸入第一群組通道資料區134，0輸入第二群組通道資料區136)，所以第一群組通道資料區134儲存群組通道信號GC1。當群組暫存模塊110接收到鎖存 致動信號LE1(此鎖存致動信號LE1的高準位時間為資料時脈信號DCLK1的高準位時間之二倍)與01(即第二信號)時，由於控制電路106並聯輸出01(即0輸入第一群組通道資料區134，1輸入第二群組通道資料區136)，所以第二群組通道資料區136儲存群組通道信號GC1。 That is, when the group temporary storage module 110 receives the latch actuation signal LE1 (the high-level time of the latch actuation signal LE1 is twice the high-level time of the data clock signal DCLK1) and 10 ( That is, the first signal), since the control circuit 106 outputs 10 in parallel (ie, 1 input first group channel data area 134, 0 input second group channel data area 136), the first group channel data area 134 stores the group. Group channel signal GC1. When the group temporary storage module 110 receives the latch When the actuation signal LE1 (the high-level time of the latch actuation signal LE1 is twice the high-level time of the data clock signal DCLK1) and 01 (ie, the second signal), the control circuit 106 outputs 01 in parallel. That is, 0 is input to the first group channel data area 134, 1 is input to the second group channel data area 136), so the second group channel data area 136 stores the group channel signal GC1.

其中，第一群組通道資料區134與第一計數資料區120對應，第二群組通道資料區136與第二計數資料區122對應。第一群組通道資料區134具有第一通道至第十通道為其指定通道，第二群組通道資料區136具有第十一通道至第十六通道為其指定通道。其中，第一群組通道資料區134所儲存的群組通道信號GC1為信號為1111 1111 1100 0000，第二群組通道資料區136所儲存的群組通道信號GC1為0000 0000 0011 1111。此群組通道信號GC1僅為依據「第1圖」之應用情形而舉例，但並不以此為限。 The first group channel data area 134 corresponds to the first count data area 120, and the second group channel data area 136 corresponds to the second count data area 122. The first group channel data area 134 has a first channel to a tenth channel for its designated channel, and the second group channel data area 136 has an eleventh channel to a sixteenth channel for its designated channel. The group channel signal GC1 stored in the first group channel data area 134 is 1111 1111 1100 0000, and the group channel signal GC1 stored in the second group channel data area 136 is 0000 0000 0011 1111. This group channel signal GC1 is exemplified only for the application case according to "FIG. 1", but is not limited thereto.

請復參照「第2圖」，緩存電路112與串列暫存電路102連接，並於接收到第二致能信號SE1(即辨識模組103輸出之訊號)時，緩存亮度信號IS1於指定通道。上述的指定通道係依據儲存群組通道信號GC1的群組資料區所決定。舉例而言，當第一群組通道資料區134儲存的群組通道信號GC1為1111 1111 1100 0000時，第一通道至第十通道分別緩存亮度信號IS1，而第十一通道至第十六通道則不進行緩存亮度信號IS1。 Referring to FIG. 2, the buffer circuit 112 is connected to the serial temporary storage circuit 102, and when the second enable signal SE1 (ie, the signal output by the identification module 103) is received, the brightness signal IS1 is buffered in the designated channel. . The above specified channel is determined according to the group data area of the storage group channel signal GC1. For example, when the group channel signal GC1 stored in the first group channel data area 134 is 1111 1111 1100 0000, the first channel to the tenth channel respectively buffer the luminance signal IS1, and the eleventh channel to the thirteenth channel respectively. Then, the buffer luminance signal IS1 is not performed.

請同時參照「第2圖」、「第3圖」與「第4圖」，「第4圖」係為依據本發明之分段控制的驅動裝置第一實施例的比較模組電路方塊示意圖。比較電路114接收第一計數資料區120與第二計數資料區122所儲存的計數值、計數器104即時輸出的計數值與亮度信號IS1並據以輸出至少一驅動信號DS1。在本實施例中，比較電路114包括十六個比較模組126，每個比較模組126個別與一指定通道連接，但本實施例並非用以限定本發明，比較模組126的數量與可分段控制的驅動裝置100a之通道數量相同。而且，每一比較模組126包括選擇器130、減法器131以及比較器132。 Please refer to "Fig. 2", "Fig. 3" and "Fig. 4" at the same time. Fig. 4 is a block diagram showing a comparison module circuit of the first embodiment of the drive device for segmentation control according to the present invention. The comparison circuit 114 receives the count value stored in the first count data area 120 and the second count data area 122, the count value outputted by the counter 104 and the brightness signal IS1, and outputs at least one drive signal DS1 accordingly. In the present embodiment, the comparison circuit 114 includes sixteen comparison modules 126, each of which is individually connected to a designated channel. However, this embodiment is not intended to limit the present invention, and the number of comparison modules 126 is The number of channels of the segment-controlled drive device 100a is the same. Moreover, each comparison module 126 includes a selector 130, a subtractor 131, and a comparator 132.

第一群組通道資料區134與第二群組通道資料區136所儲存的群組通道信號GC1的大小皆為16bit，且皆為並聯輸出至指定的比較模組126。也就是說，第一群組通道資料區134及第二群組通道資料區136所儲存的群組通道信號GC1之每一個位元分別傳輸到其指定的比較模組126。 舉例而言，第一群組通道資料區134及第二群組通道資料區136所儲存的群組通道信號GC1之第十六位元傳輸至第十六通道所連接比較模組126中的選擇器130。 The group channel signal GC1 stored in the first group channel data area 134 and the second group channel data area 136 are all 16 bits in size and are output in parallel to the designated comparison module 126. That is, each of the group channel signals GC1 stored in the first group channel data area 134 and the second group channel data area 136 is transmitted to its designated comparison module 126. For example, the 16th bit of the group channel signal GC1 stored in the first group channel data area 134 and the second group channel data area 136 is transmitted to the selection of the comparison module 126 connected to the 16th channel. 130.

依據上述方式，每一選擇器130依據第一群組通道資料區134所儲存的群組通道信號GC1之一位元以及第二群組通道資料區136所儲存的群組通道信號GC1之一位元選擇性的輸出第一計數資料區120的計數值或第二計數資料區122的計數值。 According to the above manner, each selector 130 is based on one of the group channel signal GC1 stored in the first group channel data area 134 and one of the group channel signals GC1 stored in the second group channel data area 136. The count value of the first count data area 120 or the count value of the second count data area 122 is outputted by the element.

舉例而言，當選擇器130所接收到的第一群組通道資料區134所儲存的群組通道信號GC1之第十六位元以及第二群組通道資料區136之第十六位元分別為低準位以及高準位時，則選擇器130輸出第二計數資料區122的計數值。當選擇器130所接收到的第一群組通道資料區134所儲存的群組通道信號GC1之第十六位元以及第二群組通道資料區136之第十六位元分別為高準位以及低準位時，則選擇器130輸出第一計數資料區120的計數值，但本實施例並非用以限定本發明。 For example, the 16th bit of the group channel signal GC1 and the 16th bit of the second group channel data area 136 stored in the first group channel data area 134 received by the selector 130 respectively When the low level and the high level are low, the selector 130 outputs the count value of the second count data area 122. The 16th bit of the group channel signal GC1 and the 16th bit of the second group channel data area 136 stored in the first group channel data area 134 received by the selector 130 are respectively high level. And the low level, the selector 130 outputs the count value of the first count data area 120, but the embodiment is not intended to limit the present invention.

每一減法器131依據計數器104的即時輸出的計數值CNT1減掉每一選擇器130所輸出的計數資料區120的計數值CNT2或計數資料區122的計數值CNT2而產生差值，每一比較器132係比較差值與其指定通道所緩存的亮度信號IS1，而個別輸出驅動信號DS1予其指定通道所連接的發光二極體90，驅動信號DS1係用以控制與指定通道連接的發光二極體90之發光狀態。 Each subtractor 131 subtracts the count value CNT2 of the count data area 120 or the count value CNT2 of the count data area 122 outputted by each selector 130 according to the count value CNT1 of the immediate output of the counter 104, and generates a difference, each comparison. The device 132 compares the difference signal with the brightness signal IS1 buffered by the designated channel, and the individual output driving signal DS1 is connected to the light-emitting diode 90 connected to the designated channel. The driving signal DS1 is used to control the light-emitting diode connected to the designated channel. The illuminating state of the body 90.

其中，當差值小於零時，則差值轉變為此負數的補數，計數器104所循迴計數的預定值。舉例而言，若預定值為4095(2的12次方，即12位元bit)，計數器104的即時輸出的計數值CNT1減掉每一選擇器130所輸出的第一計數資料區120的計數值CNT2而產生-1000，則差值會轉變為3096。而且，當第一計數資料區120或第二計數資料區122所儲存的計數值分別與計數器104即時輸出的計數值之差值小於亮度信號IS1時，比較器132產生驅動信號DS1的電位為低準位以驅動發光二極體90。當差值大於或等於亮度信號IS1時，比較器132產生驅動信號DS1的電位為高準位且不驅動發光二極體90。 Wherein, when the difference is less than zero, the difference is converted to the complement of the negative number, and the counter 104 returns the predetermined value of the count. For example, if the predetermined value is 4095 (12th power of 12, that is, 12-bit bit), the count value CNT1 of the immediate output of the counter 104 subtracts the count of the first count data area 120 output by each selector 130. The value CNT2 produces -1000, and the difference is converted to 3096. Moreover, when the difference between the count value stored in the first count data area 120 or the second count data area 122 and the count value outputted by the counter 104 is smaller than the brightness signal IS1, the comparator 132 generates the potential of the drive signal DS1 to be low. The level is used to drive the light emitting diode 90. When the difference is greater than or equal to the luminance signal IS1, the comparator 132 generates the potential of the driving signal DS1 to a high level and does not drive the light emitting diode 90.

在本實施例中，每一群組通道信號GC1的大小可為16位元(bit)(即分段控制的驅動裝置100a的通道數)，每一亮度信號IS1的大小可為12 bit，串列暫存電路102可但不限於為192 bit的位移暫存器(即16*12 bit)，但本實施例並非用以限定本發明。 In this embodiment, the size of each group channel signal GC1 may be 16 bits (ie, the number of channels of the segment-controlled driving device 100a), and each brightness signal IS1 may be 12 bits in size. The column temporary storage circuit 102 can be, but is not limited to, a 192 bit shift register (i.e., 16*12 bit), but this embodiment is not intended to limit the present invention.

請參照「第2圖」與「第5圖」，「第5圖」係為依據本發明之分段控制的驅動裝置第一實施例之分段驅動的時序圖。首先，第一段更新(即驅動第一通道至第十通道)，辨識模組103於時序T₀接收鎖存致動信號LE1與資料時脈信號DCLK1，而輸出第一致能信號FE1，串列暫存電路102依據第一致能信號FE1將於時序T₁至T₂所收到的資料信號SD1，在時序T₂輸出為群組通道信號GC1。若此時的群組通道信號GC1為1111 1111 1100 0000，控制電路106接收群組通道信號GC1而並聯輸出10(即第一信號)。 Please refer to "Fig. 2" and "Fig. 5", which are timing charts of the segment drive of the first embodiment of the drive device for segmentation control according to the present invention. First, the first segment is updated (ie, driving the first channel to the tenth channel), and the identification module 103 receives the latch actuation signal LE1 and the data clock signal DCLK1 at the timing T ₀ , and outputs the first enable signal FE1, the string. The column temporary storage circuit 102 outputs the group channel signal GC1 at the timing T ₂ according to the data signal SD1 received by the first enable signal FE1 at the timings T ₁ to T ₂ . If the group channel signal GC1 at this time is 1111 1111 1100 0000, the control circuit 106 receives the group channel signal GC1 and outputs 10 in parallel (ie, the first signal).

接著，計數暫存電路108接收鎖存致動信號LE1與10(即第一信號)，使得第一計數資料區120儲存計數值，且第一計數資料區120的指定通道為第一通道至第十通道。群組暫存模塊110接收群組通道信號GC1與10(即第一信號)，使得第一群組通道資料區134儲存群組通道信號GC1，且第一群組通道資料區134的指定通道為第一通道至第十通道。 Then, the count temporary storage circuit 108 receives the latch actuation signals LE1 and 10 (ie, the first signal), so that the first count data area 120 stores the count value, and the designated channel of the first count data area 120 is the first channel to the first Ten channels. The group temporary storage module 110 receives the group channel signals GC1 and 10 (ie, the first signal), such that the first group channel data area 134 stores the group channel signal GC1, and the designated channel of the first group channel data area 134 is First to tenth channels.

辨識模組103於時序T₃接收鎖存致動信號LE1與資料時脈信號DCLK1而輸出第二致能信號SE1，串列暫存電路102依據第二致能信號SE1將於時序T₄至T₅所收到的資料信號SD1輸出為亮度信號IS1。緩存電路112接收第二致能信號SE1而緩存亮度信號IS1於對應指定通道的緩存器中(即第一群組通道資料區134的指定通道，也就是說，對應第一通道至第十通道的緩存器)。每一通道連接一比較模組126，每一比較模組126先接收第一計數資料區120的計數值，之後接收計數器104即時輸出的計數值CNT1以進行相減而產生差值。 Receiving identification module 103 in latch timing T actuation signal _{LE1. 3} and DCLK1 clock signal to output a second data enable signal SE1, 102 series register circuit according to a second enable signal _{SE1. 4} will timing T to T ₅ received information signal SD1 output luminance signal IS1. The buffer circuit 112 receives the second enable signal SE1 and buffers the luminance signal IS1 in the buffer corresponding to the designated channel (ie, the designated channel of the first group channel data area 134, that is, corresponding to the first channel to the tenth channel Cache). Each channel is connected to a comparison module 126. Each comparison module 126 first receives the count value of the first count data area 120, and then receives the count value CNT1 output by the counter 104 for subtraction to generate a difference.

當差值小於零時，則差值轉變成為此負數的補數。接著比較模組126中的比較器132會接收通道所對應的亮度信號IS1與差值而進行大小的比較，當差值小於通道所對應的亮度信號IS1時，則比較器132於時序T5輸出低準位以驅動通道所連接的發光二極體90，進而達到驅動第一通道 至第十通道的目的。 When the difference is less than zero, the difference transition becomes the complement of this negative number. Then, the comparator 132 in the comparison module 126 receives the luminance signal IS1 corresponding to the channel and compares the difference. When the difference is smaller than the luminance signal IS1 corresponding to the channel, the comparator 132 outputs the low at the timing T5. Positioning to drive the LEDs 90 connected to the channel, thereby driving the first channel To the purpose of the tenth channel.

舉例而言，當第一通道的亮度信號為2048，第一計數資料區120所儲存的計數值為1000，此時計數器104的即時輸出的計數值為1000(下一循迴計數值)，則減法器131會將計數器104的即時輸出的計數值CNT1減掉第一計數資料區120所儲存的計數值CNT2，差值為0、1、2……、3094、3095(因為計數器104即時輸出的計數值仍在循迴計數)，當計數器104的即時輸出的計數值CNT1從4095(即預定值)變成0時，差值會變成負數，此時差值會轉變成補數，即會變成3096、3097、3098……、4095，即差值會從0、1、2、……、3094、3095、3096、3097、3098……、4095、0、1、2，其餘部分以此類推。接著，比較器132會將差值與第一通道的亮度信號IS1(即2048)進行比較，當差值大於或等於2048時，比較器132輸出高準位(即無法驅動第一通道的發光二極體)。當差值小於2048時，比較器132輸出低準位(即驅動第一通道的發光二極體90)。 For example, when the brightness signal of the first channel is 2048, the count value stored in the first count data area 120 is 1000, and the count value of the immediate output of the counter 104 is 1000 (the next cycle count value). The subtracter 131 subtracts the count value CNT1 of the immediate output of the counter 104 from the count value CNT2 stored in the first count data area 120, and the difference is 0, 1, 2, ..., 3094, 3095 (because the counter 104 is output immediately) The count value is still counting back. When the count value CNT1 of the immediate output of the counter 104 changes from 4095 (ie, the predetermined value) to 0, the difference will become a negative number, and the difference will be converted into a complement, which will become 3096. , 3097, 3098, ..., 4095, that is, the difference will be from 0, 1, 2, ..., 3094, 3095, 3096, 3097, 3098, ..., 4095, 0, 1, 2, and so on. Next, the comparator 132 compares the difference with the luminance signal IS1 of the first channel (ie, 2048). When the difference is greater than or equal to 2048, the comparator 132 outputs a high level (ie, the illumination of the first channel cannot be driven). Polar body). When the difference is less than 2048, the comparator 132 outputs a low level (i.e., the light-emitting diode 90 that drives the first channel).

需要注意的是，由於同一個群組的每一通道之亮度信號可能不同，所以同一群組的每一通道所連接之發光二極體被驅動(即驅動信號為低準位)的時間長度與被驅動(即驅動信號為低準位)的時間點亦可能不同，但在本實施例中所表示的情形為差值從0開始的特殊情形，所以同一群組的每一通道所連接之發光二極體被驅動的時間點相同，但本實施例並非用以限定本發明。再者，由於同一群組中比較器所接收到的差值相同(因為同一群組的每一通道對應同一計數資料區與同一計數器)，所以同一群組的每一通道所連接之發光二極體於下一次之後(包含下一次)被驅動的時間點相同。 It should be noted that since the luminance signals of each channel of the same group may be different, the length of time that the LEDs connected to each channel of the same group are driven (ie, the driving signal is low level) The time points that are driven (ie, the drive signal is low level) may also be different, but the situation represented in this embodiment is a special case where the difference starts from 0, so the light connected to each channel of the same group is connected. The time points at which the diodes are driven are the same, but this embodiment is not intended to limit the invention. Furthermore, since the difference received by the comparators in the same group is the same (because each channel of the same group corresponds to the same count data area and the same counter), the light-emitting diodes connected to each channel of the same group are The time point after the next time (including the next time) is driven is the same.

「第5圖」所表示的時序圖係為本實施例中分段控制的驅動裝置進行第一次資料更新的示意圖，即初始設定。換句話說，分段控制的驅動裝置100a於第一段更新前，第一通道至第十通道的亮度信號為零，分段控制的驅動裝置100a於第二段更新前，第十一通道至第十六通道的亮度信號為零。 The timing chart shown in FIG. 5 is a schematic diagram of the first data update performed by the segmented control driving device in the present embodiment, that is, the initial setting. In other words, before the first segment update, the segment control mobile device 100a has zero luminance signals of the first channel to the tenth channel, and the segment control drive device 100a is updated to the eleventh channel before the second segment is updated. The luminance signal of the sixteenth channel is zero.

第二段更新(即驅動第十一通道至第十六通道)，辨識模組103於時序T₆接收鎖存致動信號LE1與資料時脈信號DCLK1而輸出第一致 能信號FE1，串列暫存電路102依據第一致能信號FE1將於時序T₇至T₈所收到的資料信號SD1輸出為群組通道信號GC1，此時的群組通道信號GC1為0000 0000 0011 1111，控制電路106接收群組通道信號GC1而並聯輸出01(即第二信號)。接著，計數暫存電路108接收鎖存致動信號LE1與01(即第二信號)，使得第二計數資料區122儲存計數值，且第二計數資料區122的指定通道為第十一通道至第十六通道。群組暫存模塊110接收群組通道信號GC1與01(即第二信號)，使得第二群組通道資料區136儲存群組通道信號GC1，且第二群組通道資料區136的指定通道為第十一通道至第十六通道。 Update second section (i.e., drive channel eleventh to sixteenth channel), the identification module 103 to receive a latch timing T ₆ actuation signal LE1 and DCLK1 clock signal and outputs a first data enable signal FE1, tandem The temporary storage circuit 102 outputs the data signal SD1 received at the timing T ₇ to T ₈ according to the first enable signal FE1 as the group channel signal GC1, and the group channel signal GC1 at this time is 0000 0000 0011 1111, and the control circuit 106 receives the group channel signal GC1 and outputs 01 in parallel (ie, the second signal). Then, the count temporary storage circuit 108 receives the latch actuation signals LE1 and 01 (ie, the second signal), so that the second count data area 122 stores the count value, and the designated channel of the second count data area 122 is the eleventh channel to The sixteenth channel. The group temporary storage module 110 receives the group channel signals GC1 and 01 (ie, the second signal), so that the second group channel data area 136 stores the group channel signal GC1, and the designated channel of the second group channel data area 136 is The eleventh channel to the sixteenth channel.

辨識模組103於時序T₉接收鎖存致動信號LE1與資料時脈信號DCLK1而輸出第二致能信號SE1，串列暫存電路102依據第二致能信號SE1將於時序T₁₀至T₁₁所收到的資料信號SD1輸出為亮度信號IS1(或稱灰階信號)。緩存電路112接收第二致能信號SE1而緩存亮度信號IS1於指定通道(即第二群組通道資料區136的指定通道，也就是說，第十一通道至第十六通道)。 Identification module 103 to receive a latch timing T actuation signal _{LE1. 9} and DCLK1 clock signal to output a second data enable signal SE1, 102 series register circuit according to a second enable signal SE1 will timing T ₁₀ to T ₁₁ received data signal SD1 output luminance signal IS1 (also known as gray-scale signal). The buffer circuit 112 receives the second enable signal SE1 and buffers the luminance signal IS1 to the designated channel (ie, the designated channel of the second group channel data area 136, that is, the eleventh to sixteenth channels).

每一通道連接一比較模組126，每一比較模組126先接收第二計數資料區122的計數值與計數器104即時輸出的計數值進行相減而產生差值，當差值小於零時，則差值轉變成此負數的補數。接著比較模組126中的比較器132會接收通道所對應的亮度信號IS1與差值而進行大小的比較，當差值小於通道所對應的亮度信號IS1時，則比較器132於時序T₁₁輸出低準位以驅動通道所連接的發光二極體90，進而達到驅動第十一通道至第十六通道的目的。 Each channel is connected to a comparison module 126. Each comparison module 126 first receives the count value of the second count data area 122 and subtracts the count value output by the counter 104 to generate a difference. When the difference is less than zero, Then the difference is converted to the complement of this negative number. Then, the comparator 132 in the comparison module 126 receives the brightness signal IS1 corresponding to the channel and compares the difference. When the difference is smaller than the brightness signal IS1 corresponding to the channel, the comparator 132 outputs the time at the timing T ₁₁ . The low level is used to drive the light-emitting diodes 90 connected to the channels, thereby achieving the purpose of driving the eleventh to sixteenth channels.

上述之分段控制的驅動裝置100a可分成兩個群組，並於不同時段進行更新，但本實施例並非用以限定本發明。在本實施例中，陣列式排列的發光二極體90被驅動的順序可由排列順序較前面的發光二極體90越先進行更新驅動(即第一群組通道資料區134之指定通道所連接的發光二極體90先進行更新且驅動)，但本實施例並非用以限定本發明。舉例而言，分段控制的驅動裝置100b所連接的發光二極體90可先進行更新驅動，之後分段控制的驅動裝置100a所連接的發光二極體90再進行更新驅動，且 在分段控制的驅動裝置100a所連接的發光二極體90之更新驅動的過程中，可先由第二群組通道資料區136之指定通道所連接的發光二極體90開始進行驅動更新，之後再更新且驅動第一群組通道資料區134之指定通道所連接的發光二極體90。 The above-mentioned segment-controlled driving device 100a can be divided into two groups and updated at different time periods, but the embodiment is not intended to limit the present invention. In this embodiment, the order in which the arrayed light-emitting diodes 90 are driven can be updated by the first order of the light-emitting diodes 90 in the arrangement order (ie, the designated channels of the first group channel data area 134 are connected). The LEDs 90 are first updated and driven), but this embodiment is not intended to limit the invention. For example, the LEDs 90 connected to the segment-controlled driving device 100b can be updated and driven, and then the LEDs 90 connected to the segment-controlled driving device 100a are updated and driven. During the update driving of the LEDs 90 connected to the segment-controlled driving device 100a, the driving diodes 90 connected by the designated channels of the second group channel data region 136 may be started to be updated. The LEDs 90 connected to the designated channels of the first group channel data area 134 are then updated and driven.

依據本發明之分段控制的驅動裝置可將單一驅動裝置的所有通道分成多個群組，注意的是驅動裝置的群組最多僅能與驅動裝置的通道數相同。舉例而言，驅動裝置亦可分成三個群組，並於不同時段進行更新，以下為驅動裝置可分成三個群組的詳細說明，驅動裝置分成三個群組以上的實施例可由此延伸。 The segment-controlled drive device according to the present invention can divide all channels of a single drive device into a plurality of groups, noting that the group of drive devices can only be the same as the number of channels of the drive device at most. For example, the driving device can also be divided into three groups and updated at different time periods. The following is a detailed description of the driving device can be divided into three groups, and the embodiment in which the driving device is divided into three groups or more can be extended thereby.

請參照「第6圖」，係為係為依據本發明之分段控制的驅動裝置的第二實施例之電路方塊示意圖。在本實施例中，分段控制的驅動裝置200具有十六個通道且所有通道分成三個群組，分別為第一通道至第二通道，第三通道至第十二通道以及第十三通道至第十六通道。其中，每一通道連接一對應的發光二極體92，但本實施例並非用以限定本發明。分段控制的驅動裝置200包括開關97、開關99、串列暫存電路202、辨識模組203、計數器204、控制電路206、計數暫存電路208、群組暫存模塊210、緩存電路212以及比較電路214。 Please refer to FIG. 6 for a block diagram of a second embodiment of a drive device for segment control according to the present invention. In this embodiment, the segment-controlled driving device 200 has sixteen channels and all channels are divided into three groups, which are a first channel to a second channel, a third channel to a twelfth channel, and a thirteenth channel. To the sixteenth channel. Each of the channels is connected to a corresponding light-emitting diode 92, but the embodiment is not intended to limit the present invention. The segmentation control driving device 200 includes a switch 97, a switch 99, a serial temporary storage circuit 202, an identification module 203, a counter 204, a control circuit 206, a counting temporary storage circuit 208, a group temporary storage module 210, a buffer circuit 212, and Comparison circuit 214.

辨識模組203接收資料時脈信號DCLK2與鎖存致動信號LE2，當鎖存致動信號LE2的高準位時間為資料時脈信號DCLK2的高準位時間之二倍(或鎖存致動信號LE2的高準位時間包含二次資料時脈信號DCLK2的上升邊緣)時，辨識模組203輸出第一致能信號FE2(first enable)。當鎖存致動信號LE2的高準位時間為資料時脈信號DCLK2的高準位時間之一倍(或鎖存致動信號LE2的高準位時間包含一次資料時脈信號DCLK2的上升邊緣)時，辨識模組203輸出第二致能信號SE2(second enable)。開關97依據第一致能信號FE2而開啟，使得串列暫存電路202接收資料信號SDI(serial data input)而輸出群組通道信號GC2(group channel)，或開關99依據第二致能信號SE2而開啟，使得串列暫存電路202接收資料信號SDI而輸出亮度信號IS2(intensity signal)，且串列暫存電路202輸出的資料信號SDO(serial data output)，此資料信號SDO可傳送至下一個與分段控制的驅 動裝置200串接的驅動裝置(圖中未標示)。 The identification module 203 receives the data clock signal DCLK2 and the latch actuation signal LE2 when the high-level time of the latch actuation signal LE2 is twice the high-level time of the data clock signal DCLK2 (or latch actuation) When the high level time of the signal LE2 includes the rising edge of the secondary data clock signal DCLK2, the identification module 203 outputs the first enable signal FE2 (first enable). When the high-level time of the latch actuation signal LE2 is one times the high-level time of the data clock signal DCLK2 (or the high-level time of the latch actuation signal LE2 includes the rising edge of the data clock signal DCLK2) The identification module 203 outputs a second enable signal SE2 (second enable). The switch 97 is turned on according to the first enable signal FE2, so that the serial temporary storage circuit 202 receives the serial data input (SDI) and outputs the group channel signal GC2 (group channel), or the switch 99 is based on the second enable signal SE2. And turning on, causing the serial temporary storage circuit 202 to receive the data signal SDI and outputting the luminance signal IS2 (intensity signal), and serializing the data signal SDO (serial data output) output by the temporary storage circuit 202, the data signal SDO can be transmitted to the next a drive with segmentation control The driving device 200 is connected in series with a driving device (not shown).

在本實施例中，鎖存致動信號LE2可為下降邊緣(falling edge)觸發的信號，但本實施例並非用以限定本發明。也就是說，鎖存致動信號LE2亦可為上升邊緣(rising edge)觸發的信號。其中，下降邊緣係指從高準位轉變成低準位的位置，上升邊緣係指從低準位轉變成高準位的位置。 In the present embodiment, the latch actuation signal LE2 may be a falling edge triggered signal, but this embodiment is not intended to limit the present invention. That is to say, the latch actuation signal LE2 can also be a signal triggered by a rising edge. Wherein, the falling edge refers to a position that changes from a high level to a low level, and the rising edge refers to a position that changes from a low level to a high level.

計數器204循迴計數至預定值，並持續接收整體時脈信號GCLK2(global clock signal)而即時輸出計數值，其中整體時脈信號GCLK2為分段控制的驅動裝置200之內部時脈信號。 The counter 204 counts back to a predetermined value, and continuously receives the global clock signal GCLK2 (global clock signal) to instantly output the count value, wherein the overall clock signal GCLK2 is the internal clock signal of the segment-controlled drive device 200.

當辨識模組203輸出第一致能信號FE2時，控制電路206接收群組通道信號GC2而輸出控制信號CS2。在本實施例中，控制信號CS2包括100(即第一信號)、010(即第二信號)與001(即第三信號)，但本實施例並非用以限定本發明。可依據實際驅動裝置200中所有通道被分段的群組數量來決定控制信號CS2所包括的信號數量。 When the identification module 203 outputs the first enable signal FE2, the control circuit 206 receives the group channel signal GC2 and outputs the control signal CS2. In the present embodiment, the control signal CS2 includes 100 (ie, the first signal), 010 (ie, the second signal), and 001 (ie, the third signal), but the embodiment is not intended to limit the present invention. The number of signals included in the control signal CS2 can be determined according to the number of groups in which all channels in the actual driving device 200 are segmented.

控制電路206依據群組通道信號GC2而輸出控制信號CS2的方法可於控制電路206內建一真值表，但本實施例並非限定本發明。 The method in which the control circuit 206 outputs the control signal CS2 according to the group channel signal GC2 can construct a truth table in the control circuit 206, but the embodiment does not limit the present invention.

當串列暫存電路202依據第一致能信號FE2而輸出群組通道信號GC2時，計數暫存電路208依第一信號、第二信號以及第三信號而儲存計數器204輸出的計數值於第一計數資料區220(亦可稱計數暫存區)、第二計數資料區222及第三計數資料區224。第一計數資料區220的指定通道為第一通道至第二通道，第二計數資料區222的指定通道為第三通道至第十二通道，以及第三計數資料區224的指定通道為第十三通道至第十六通道。群組暫存模塊210依100(即第一信號)、010(即第二信號)以及001(即第三信號)而儲存群組通道信號GC2於第一群組通道資料區234、第二群組通道資料區236及第三群組通道資料區238。 When the serial temporary storage circuit 202 outputs the group channel signal GC2 according to the first enable signal FE2, the counting temporary storage circuit 208 stores the count value output by the counter 204 according to the first signal, the second signal and the third signal. A count data area 220 (also referred to as a count temporary storage area), a second count data area 222, and a third count data area 224. The designated channel of the first count data area 220 is the first channel to the second channel, the designated channel of the second count data area 222 is the third channel to the twelfth channel, and the designated channel of the third count data area 224 is the tenth. Three to sixteen channels. The group temporary storage module 210 stores the group channel signal GC2 in the first group channel data area 234 and the second group according to 100 (ie, the first signal), 010 (ie, the second signal), and 001 (ie, the third signal). The group channel data area 236 and the third group channel data area 238.

第一群組通道資料區234與第一計數資料區220對應，且第一群組通道資料區234的指定通道為第一通道至第二通道。第二群組通道資料區236與第二計數資料區222對應，且第二群組通道資料區236的指定通道為第三通道至第十二通道。第三群組通道資料區238與第三計數資料 區224對應，且第三群組通道資料區238的指定通道為第十三通道至第十六通道。 The first group channel data area 234 corresponds to the first count data area 220, and the designated channel of the first group channel data area 234 is the first channel to the second channel. The second group channel data area 236 corresponds to the second count data area 222, and the designated channel of the second group channel data area 236 is the third channel to the twelfth channel. Third group channel data area 238 and third count data The area 224 corresponds to, and the designated channel of the third group channel data area 238 is the thirteenth channel to the sixteenth channel.

比較電路214包括十六個比較模組226，每一比較模組226與一通道相連接。每一比較模組226係個別接收第一計數資料區220的計數值、第二計數資料區222的計數值、第三計數資料區224的計數值、計數器204即時輸出的計數值以及每一比較模組236所具有的指定通道之亮度信號IS2，而個別輸出驅動信號予指定通道所連接的發光二極體。 The comparison circuit 214 includes sixteen comparison modules 226, each of which is coupled to a channel. Each comparison module 226 individually receives the count value of the first count data area 220, the count value of the second count data area 222, the count value of the third count data area 224, the count value output by the counter 204, and each comparison. The module 236 has a brightness signal IS2 of the designated channel, and the individual output drive signals are applied to the light-emitting diodes connected to the designated channel.

請參照「第6圖」與「第7圖」，「第7圖」係為依據本發明之分段控制的驅動裝置第二實施例之分段驅動的時序圖。首先，第一段更新(即驅動第一通道至第二通道)，辨識模組203於時序t₀接收鎖存致動信號LE2與資料時脈信號DCLK2，而輸出第一致能信號FE2，串列暫存電路202依據第一致能信號FE2將於時序t₁至t₂所收到的資料信號SDI，而輸出為群組通道信號GC2。若此時的群組通道信號GC2為1100 0000 0000 0000，控制電路206接收群組通道信號GC2而並聯輸出100(即第一信號)。 Please refer to "Fig. 6" and "Fig. 7", which are timing charts of the segment drive of the second embodiment of the drive device according to the present invention. First, update the first section (i.e. the first channel to the second channel drive), the identification module 203 to receive latch timing t ₀ LE2 actuation signal when the clock signal DCLK2 data, and outputs the first enable signal FE2 is, string The column temporary storage circuit 202 outputs the group channel signal GC2 according to the data signal SDI received by the first enable signal FE2 at the timings t ₁ to t ₂ . If the group channel signal GC2 at this time is 1100 0000 0000 0000, the control circuit 206 receives the group channel signal GC2 and outputs 100 in parallel (ie, the first signal).

接著，計數暫存電路208接收鎖存致動信號LE2與100(即第一信號)，使得第一計數資料區220儲存計數值，且第一計數資料區220的指定通道為第一通道至第二通道。群組暫存模塊210接收群組通道信號GC2與100(即第一信號)，使得第一群組通道資料區234儲存群組通道信號GC2，且第一群組通道資料區234的指定通道為第一通道至第二通道。 Then, the count temporary storage circuit 208 receives the latch actuation signals LE2 and 100 (ie, the first signal), so that the first count data area 220 stores the count value, and the designated channel of the first count data area 220 is the first channel to the first Two channels. The group temporary storage module 210 receives the group channel signals GC2 and 100 (ie, the first signal), such that the first group channel data area 234 stores the group channel signal GC2, and the designated channel of the first group channel data area 234 is The first channel to the second channel.

辨識模組203於時序t₃接收鎖存致動信號LE2與資料時脈信號DCLK2而輸出第二致能信號SE2，串列暫存電路202依據第二致能信號SE2將於時序t₄至t₅所收到的資料信號SDI輸出為亮度信號IS2。緩存電路212接收第二致能信號SE2而緩存亮度信號IS2於指定通道(即第一群組通道資料區234的指定通道，也就是說，第一通道至第二通道)。每一通道連接一比較模組226，每一比較模組226先接收第一計數資料區220的計數值，之後接收計數器204即時輸出的計數值以進行相減而產生差值。 Recognition module 203 to receive latch timing _{t. 3} LE2 actuation signal and data clock signal DCLK2 output a second enable signal SE2, based on the second serial register circuit 202 will enable signal _{SE2. 4} timing t to t ₅ received data signal SDI output luminance signal IS2. The buffer circuit 212 receives the second enable signal SE2 and buffers the luminance signal IS2 to the designated channel (ie, the designated channel of the first group channel data area 234, that is, the first channel to the second channel). Each channel is connected to a comparison module 226. Each comparison module 226 first receives the count value of the first count data area 220, and then receives the count value output by the counter 204 for subtraction to generate a difference.

當差值小於零時，則差值轉變成此負數的補數。接著比較模組226會接收通道所對應的亮度信號IS2與差值而進行大小的比較，當差值小於通道所對應的亮度信號IS2時，則比較模組226於時序t₅輸出低準位以 驅動通道所連接的發光二極體，進而達到驅動第一通道至第二通道的目的。 When the difference is less than zero, the difference is converted to the complement of this negative number. Then, the comparison module 226 receives the brightness signal IS2 corresponding to the channel and compares the difference. When the difference is smaller than the brightness signal IS2 corresponding to the channel, the comparison module 226 outputs the low level at the timing t _{5 .} The light-emitting diode connected to the driving channel further achieves the purpose of driving the first channel to the second channel.

第二段更新(即驅動第三通道至第十二通道)，辨識模組203於時序t₆接收鎖存致動信號LE2與資料時脈信號DCLK2而輸出第一致能信號FE2，串列暫存電路202依據第一致能信號FE2將於時序t₇至t₈所收到的資料信號SDI輸出為群組通道信號GC2，此時的群組通道信號GC2為0011 1111 1111 0000，控制電路206接收群組通道信號GC2而並聯輸出010(即第二信號)。 Update second section (i.e. the third channel to twelfth driving channel), the identification module 203 at the timing t ₆ receiving the latch actuation signal LE2 data clock signal DCLK2 and outputs first enable signal FE2 is, temporary tandem The memory circuit 202 outputs the data signal SDI received at the timing t ₇ to t ₈ according to the first enable signal FE2 as the group channel signal GC2, and the group channel signal GC2 at this time is 0011 1111 1111 0000, and the control circuit 206 The group channel signal GC2 is received and the 010 (ie, the second signal) is output in parallel.

接著，計數暫存電路208接收鎖存致動信號LE2與010(即第二信號)，使得第二計數資料區222儲存計數值，且第二計數資料區222的指定通道為第三通道至第十二通道。群組暫存模塊210接收群組通道信號GC2與010(即第二信號)，使得第二群組通道資料區236儲存群組通道信號GC2，且第二群組通道資料區236的指定通道為第三通道至第十二通道。 Then, the count temporary storage circuit 208 receives the latch actuation signals LE2 and 010 (ie, the second signal), so that the second count data area 222 stores the count value, and the designated channel of the second count data area 222 is the third channel to the first Twelve channels. The group temporary storage module 210 receives the group channel signals GC2 and 010 (ie, the second signal), so that the second group channel data area 236 stores the group channel signal GC2, and the designated channel of the second group channel data area 236 is The third channel to the twelfth channel.

辨識模組203於時序t₉接收鎖存致動信號LE2與資料時脈信號DCLK2而輸出第二致能信號SE2，串列暫存電路202依據第二致能信號SE2將於時序t₁₀至t₁₁所收到的資料信號SDI輸出為亮度信號IS2(或稱灰階信號)。緩存電路212接收第二致能信號SE2而緩存亮度信號IS2於指定通道(即第二群組通道資料區236的指定通道，也就是說，第三通道至第十二通道)。 Recognition module 203 to receive latch timing _{t. 9} LE2 actuation signal and data clock signal DCLK2 output a second enable signal SE2, based on the second serial register circuit 202 will enable signal SE2 timing t ₁₀ to t The received data signal SDI of ₁₁ is the luminance signal IS2 (or gray scale signal). The buffer circuit 212 receives the second enable signal SE2 and buffers the luminance signal IS2 to the designated channel (ie, the designated channel of the second group channel data area 236, that is, the third channel to the twelfth channel).

每一通道連接一比較模組226，每一比較模組226先接收第二計數資料區222的計數值與計數器204即時輸出的計數值進行相減而產生差值，當差值小於零時，則差值轉變為此負數的補數。接著比較模組226會接收通道所對應的亮度信號IS2與差值而進行大小的比較，當差值小於通道所對應的亮度信號IS2時，則比較模組226於時序t₁₁輸出低準位以驅動通道所連接的發光二極體92，進而達到驅動第三通道至第十二通道的目的。 Each channel is connected to a comparison module 226. Each comparison module 226 first receives the count value of the second count data area 222 and subtracts the count value output by the counter 204 to generate a difference. When the difference is less than zero, Then the difference is converted to the complement of the negative number. Then, the comparison module 226 receives the brightness signal IS2 corresponding to the channel and compares the difference. When the difference is smaller than the brightness signal IS2 corresponding to the channel, the comparison module 226 outputs the low level at the timing t _{11 .} The light-emitting diode 92 connected to the driving channel further achieves the purpose of driving the third channel to the twelfth channel.

第三段更新(即驅動第十三通道至第十六通道)，辨識模組203於時序t₁₂接收鎖存致動信號LE2與資料時脈信號DCLK2輸出第一致能信號FE2，串列暫存電路202依據第一致能信號FE2將於時序t₁₃至t₁₄所收到的資料信號SDI輸出為群組通道信號GC2，此時的群組通道信號GC2為 0000 0000 0000 1111，控制電路206接收群組通道信號GC2而並聯輸出001(即第三信號)。 When updating the third segment (i.e., drive channel thirteenth to sixteenth channel), the identification module 203 to receive a latch timing of the actuation signals LE2 t ₁₂ and data output clock signal DCLK2 first enable signal FE2 is, temporary tandem The memory circuit 202 outputs the data signal SDI received at the timing t ₁₃ to t ₁₄ according to the first enable signal FE2 as the group channel signal GC2, and the group channel signal GC2 at this time is 0000 0000 0000 1111, and the control circuit 206 The group channel signal GC2 is received and the 001 (ie, the third signal) is output in parallel.

接著，計數暫存電路208接收群組通道信號GC2與001(即第三信號)，使得第三計數資料區224儲存群組通道信號GC2，且第三計數資料區224的指定通道為第十三通道至第十六通道。群組暫存模塊210接收鎖存致動信號LE2與001(即第三信號)，使得第三群組通道資料區238儲存計數值，且第三群組通道資料區238的指定通道為第十三通道至第十六通道。 Then, the counting temporary storage circuit 208 receives the group channel signals GC2 and 001 (ie, the third signal), so that the third counting data area 224 stores the group channel signal GC2, and the designated channel of the third counting data area 224 is the thirteenth. Channel to the sixteenth channel. The group temporary storage module 210 receives the latch actuation signals LE2 and 001 (ie, the third signal) such that the third group channel data area 238 stores the count value, and the designated channel of the third group channel data area 238 is the tenth. Three to sixteen channels.

辨識模組203於時序t₁₅接收鎖存致動信號LE2與資料時脈信號DCLK2而輸出第二致能信號SE2，串列暫存電路202依據第二致能信號SE2將於時序t₁₆至t₁₇所收到的資料信號SDI輸出為亮度信號IS2(或稱灰階信號)。緩存電路212接收第二致能信號SE2而緩存亮度信號IS2於指定通道(即第三群組通道資料區238的指定通道，也就是說，第十三通道至第十六通道)。 Recognition module 203 to receive latch timing t ₁₅ to the actuation signal LE2 data clock signal DCLK2 output a second enable signal SE2, based on the second serial register circuit 202 will enable signal SE2 timing t ₁₆ to t ₁₇ SDI output received data signal into a luminance signal IS2 (also known as gray-scale signal). The buffer circuit 212 receives the second enable signal SE2 and buffers the luminance signal IS2 to the designated channel (ie, the designated channel of the third group channel data area 238, that is, the thirteenth channel to the sixteenth channel).

每一通道連接一比較模組226，每一比較模組226先接收第三計數資料區224的計數值與計數器204即時輸出的計數值進行相減而產生差值，當差值小於零時，則差值轉變成此負數的補數。接著比較模組226中會接收通道所對應的亮度信號IS2與差值而進行大小的比較，當差值小於通道所對應的亮度信號IS2時，則比較模組226於時序t₁₇輸出低準位以驅動通道所連接的發光二極體92，進而達到驅動第十三通道至第十六通道的目的。「第7圖」所表示的時序圖係為本實施例中的驅動裝置進行第一次資料更新的示意圖，即初始設定。換句話說，分段控制的驅動裝置200於第一段更新前，第一通道至第二通道的亮度信號為零，分段控制的驅動裝置200於第二段更新前，第三通道至第十二通道的亮度信號為零，分段控制的驅動裝置200於第三段更新前，第十三通道至第十六通道的亮度信號為零。 Each channel is connected to a comparison module 226. Each comparison module 226 first receives the count value of the third count data area 224 and subtracts the count value output by the counter 204 to generate a difference. When the difference is less than zero, Then the difference is converted to the complement of this negative number. Then, the comparison module 226 compares the brightness signal IS2 corresponding to the channel and the difference, and when the difference is smaller than the brightness signal IS2 corresponding to the channel, the comparison module 226 outputs the low level at the timing t ₁₇ . The driving diodes 92 connected to the driving channels are used to drive the thirteenth channel to the sixteenth channel. The timing chart shown in Fig. 7 is a schematic diagram of the first data update of the driving device in the present embodiment, that is, the initial setting. In other words, before the first segment update, the segment control mobile device 200 has zero luminance signals from the first channel to the second channel, and the segment control drive device 200 is updated before the second segment, the third channel to the first channel. The twelve-channel luminance signal is zero, and the segment-controlled driving device 200 has zero luminance signals from the thirteenth channel to the sixteenth channel before the third segment is updated.

上述的第二實施例中，發光二極體92的驅動順序可由第一群組通道資料區234之指定通道所連接的發光二極體92開始進行驅動更新，之後再更新且驅動第二群組通道資料區236之指定通道所連接的發光二極體92，最後驅動且更新第三群組通道資料區238之指定通道所連接的 發光二極體92，但本實施例並非用以限定本發明，可依照實際狀況進行調整。換句話說，發光二極體92的驅動順序亦可由第三群組通道資料區238之指定通道所連接的發光二極體92開始進行驅動更新，之後再更新且驅動第二群組通道資料區236之指定通道所連接的發光二極體92，最後驅動且更新第一群組通道資料區234之指定通道所連接的發光二極體92。更詳細地說，發光二極體92的驅動順序亦可由分段控制的驅動裝置200的第十三通道至第十六通道所連接的發光二極體92開始進行驅動更新，之後再更新且驅動分段控制的驅動裝置200的第三通道至第十二通道所連接的發光二極體92，最後驅動且更新分段控制的驅動裝置200的第一通道至第二通道所連接的發光二極體92。 In the second embodiment, the driving sequence of the LEDs 92 can be driven and updated by the LEDs 92 connected to the designated channels of the first group channel data area 234, and then updated and driven to the second group. The LEDs 92 connected to the designated channels of the channel data area 236 are finally driven and updated to be connected to the designated channels of the third group channel data area 238. The light-emitting diode 92 is not limited to the present invention, and can be adjusted according to actual conditions. In other words, the driving sequence of the LEDs 92 can also be driven and updated by the LEDs 92 connected to the designated channels of the third group channel data area 238, and then the second group channel data area is updated and driven. The light-emitting diode 92 connected to the designated channel of 236 finally drives and updates the light-emitting diode 92 connected to the designated channel of the first group channel data area 234. In more detail, the driving sequence of the LEDs 92 can also be driven and updated by the LEDs 92 connected to the thirteenth channel to the sixteenth channel of the segment-controlled driving device 200, and then updated and driven. The LEDs 92 connected to the third to twelfth channels of the segment-controlled driving device 200, and finally driving and updating the LEDs connected to the first channel to the second channel of the segment-controlled driving device 200 Body 92.

依據本發明之分段控制的驅動裝置，係適用於以發光二極體為背光源的液晶顯示器。藉由計數暫存電路、控制信號以及群組通道信號，驅動裝置僅需單一計數器及多個計數資料區即可使得驅動裝置中的指定通道於不同時段進行資料的更新，最多可將每一通道皆單獨於不同時段進行資料的更新。接著，藉由群組暫存模塊可控制其具有的指定通道儲存串列暫存電路所接收的資料訊號為亮度信號，可確保指定通道才可更新亮度信號，非指定通道保持原狀。再者，藉由上述驅動裝置的結構可使得每一驅動裝置的所有通道皆被使用，不會存在有通道閒置而造成浪費的問題。 The segmented control driving device according to the present invention is suitable for a liquid crystal display with a light emitting diode as a backlight. By counting the temporary storage circuit, the control signal and the group channel signal, the driving device only needs a single counter and a plurality of counting data areas, so that the designated channel in the driving device can update the data in different time periods, and each channel can be up to each channel. The data is updated separately at different time periods. Then, the group temporary storage module can control the data signal received by the serial channel storage temporary circuit to be a luminance signal, thereby ensuring that the specified channel can update the luminance signal, and the non-designated channel remains unchanged. Moreover, by the structure of the above-mentioned driving device, all the channels of each driving device can be used, and there is no problem that the channel is idle and waste.

雖然本發明以前述的較佳實施例揭露如上，然其並非用以限定本發明，任何熟習相像技藝者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，因此本發明的專利保護範圍須視本說明書所附的申請專利範圍所界定者為準。 While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of patent protection of the invention is subject to the definition of the scope of the patent application attached to this specification.

90‧‧‧發光二極體 90‧‧‧Lighting diode

96、98‧‧‧開關 96, 98‧‧‧ switch

100a‧‧‧分段控制的驅動裝置 100a‧‧‧Segment-controlled drive unit

102‧‧‧串列暫存電路 102‧‧‧ tandem temporary storage circuit

103‧‧‧辨識模組 103‧‧‧ Identification Module

104‧‧‧計數器 104‧‧‧ counter

106‧‧‧控制電路 106‧‧‧Control circuit

108‧‧‧計數暫存電路 108‧‧‧Counter temporary storage circuit

110‧‧‧群組暫存模塊 110‧‧‧Group Staging Module

112‧‧‧緩存電路 112‧‧‧Cache circuit

114‧‧‧比較電路 114‧‧‧Comparative circuit

120‧‧‧第一計數資料區 120‧‧‧First count data area

122‧‧‧第二計數資料區 122‧‧‧Second count data area

126‧‧‧比較模組 126‧‧‧Comparative Module

134‧‧‧第一群組通道資料區 134‧‧‧First group channel data area

136‧‧‧第二群組通道資料區 136‧‧‧Second group channel data area

GCLK1‧‧‧整體時脈信號 GCLK1‧‧‧ overall clock signal

DCLK1‧‧‧資料時脈信號 DCLK1‧‧‧ data clock signal

LE1‧‧‧鎖存致動信號 LE1‧‧‧Latch actuation signal

SD1、SD2‧‧‧資料信號 SD1, SD2‧‧‧ data signals

DS1‧‧‧驅動信號 DS1‧‧‧ drive signal

FE1‧‧‧第一致能信號 FE1‧‧‧first enable signal

SE1‧‧‧第二致能信號 SE1‧‧‧Secondary signal

GC1‧‧‧群組通道信號 GC1‧‧‧ group channel signal

IS1‧‧‧亮度信號 IS1‧‧‧Brightness signal

CS1‧‧‧控制信號 CS1‧‧‧ control signal