TWI826228B - Circuit for asymmetric half-bridge flyback power supply - Google Patents
- ️Mon Dec 11 2023
100:非對稱半橋返馳式電源 100: Asymmetric half-bridge flyback power supply
200:電路 200:Circuit
210:第一電壓檢測單元 210: First voltage detection unit
220:開關控制單元 220: Switch control unit
230:第二電壓檢測單元 230: Second voltage detection unit
240:第三電壓檢測單元 240: The third voltage detection unit
AUX,FB,HB,INV:節點 AUX,FB,HB,INV:node
burst,charge_on,CV_off,DCM_on,DEM_off,gate_up,gate_down,sample1,sample2,ZVS_down_on,ZVS_off,ZVS_up_on:信號 burst,charge_on,CV_off,DCM_on,DEM_off,gate_up,gate_down,sample1,sample2,ZVS_down_on,ZVS_off,ZVS_up_on: signal
C2,C3,C4,C5,C6,C7,C8:電容 C2,C3,C4,C5,C6,C7,C8: capacitor
comp:比較器 comp: comparator
Cr,Vcr:諧振電容 Cr, Vcr: resonant capacitance
D1:二極體 D1: Diode
Deadtime control:死區時間控制模組 Deadtime control: dead time control module
DEM control:退磁檢測模組 DEM control: Demagnetization detection module
gm1,gm2:轉換比例 gm1, gm2: conversion ratio
Ic1,Ic2:放電電流 Ic1,Ic2: discharge current
IDo,ILr,Io:電流 I Do , I Lr , Io: current
ILm:勵磁電流 I Lm : Excitation current
-In:電流 -In: current
-In1:接通電流 -In1: Turn on current
In2:負向電流幅值 In2: Negative current amplitude
-In2:斷開電流 -In2: disconnect current
Ip:最大電流值 IP: maximum current value
K:比例 K: Ratio
LOGIC1:第一邏輯模組 LOGIC1: The first logic module
LOGIC2:第二邏輯模組 LOGIC2: The second logic module
Lp:原邊電感 Lp: primary side inductance
Lr:漏感 Lr: leakage inductance
Ls:副邊電感 Ls: secondary inductance
N:匝數比 N: turns ratio
Naux:匝數 Naux: number of turns
Np,Ns:匝數 Np, Ns: number of turns
OC:光耦 OC: Optocoupler
OP:運算放大器 OP: operational amplifier
Q1 gate,Q2 gate:控制信號 Q1 gate, Q2 gate: control signal
Q1:第一開關 Q1: First switch
Q2:第二開關 Q2: Second switch
R1,R2,R3,R4,R5,R6,R7:電阻 R1, R2, R3, R4, R5, R6, R7: Resistors
Rcs:電流檢測電阻 Rcs: current detection resistor
SW1,SW2,SW3,SW4,SW5:開關 SW1,SW2,SW3,SW4,SW5: switch
t0,t1,t2,t3,t4,t5,t6,t7:時間 t0,t1,t2,t3,t4,t5,t6,t7: time
TL431:三端穩壓器 TL431: Three-terminal voltage regulator
Tdem,Ton,Ton1,Ton2,Ts:時長 Tdem,Ton,Ton1,Ton2,Ts: duration
Tzvs:原邊電感反向充電時間段 Tzvs: Primary side inductor reverse charging time period
Vaux,Vc,VHB,Vn:電壓 Vaux,Vc,V HB ,Vn: voltage
VCCS1,VCCS2:壓控電流源 VCCS1, VCCS2: voltage controlled current source
Vcs:電阻電壓 Vcs: resistance voltage
Vdc:初始電壓 Vdc: initial voltage
Vin:輸入電壓 Vin: input voltage
Vin-NVo:充磁電壓 Vin-NVo: magnetizing voltage
Vo:輸出電壓 Vo: output voltage
Vth:閾值電壓 Vth: threshold voltage
Waux:繞組 Waux: winding
ZVS control:零電壓切換控制模組 ZVS control: Zero voltage switching control module
從下面結合圖式對本發明的具體實施方式的描述中可以更好地理解本發明,其中:圖1示出了根據一個示例性實施例的非對稱半橋返馳式電源的示意性電路圖。 The present invention can be better understood from the following description of specific embodiments of the invention in conjunction with the drawings, in which: Figure 1 shows a schematic circuit diagram of an asymmetric half-bridge flyback power supply according to an exemplary embodiment.
圖2示出了根據一個示例性實施例的圖1的非對稱半橋返馳式電源中的信號的時序圖。 2 illustrates a timing diagram of signals in the asymmetric half-bridge flyback power supply of FIG. 1 according to an exemplary embodiment.
圖3示出了根據另一示例性實施例的圖1的非對稱半橋返馳式電源中的信號的時序圖。 3 shows a timing diagram of signals in the asymmetric half-bridge flyback power supply of FIG. 1 according to another exemplary embodiment.
圖4是根據本發明的一個示例性實施例的示出用於非對稱半橋返馳式電源的電路的框圖。 4 is a block diagram illustrating a circuit for an asymmetric half-bridge flyback power supply in accordance with an exemplary embodiment of the present invention.
圖5是根據本發明的一個示例性實施例的示出用於非對稱半橋返馳式電源的電路與非對稱半橋返馳式電源之間的連接關係的示意性電路圖。 5 is a schematic circuit diagram showing a connection relationship between a circuit for an asymmetric half-bridge flyback power supply and an asymmetric half-bridge flyback power supply according to an exemplary embodiment of the present invention.
圖6示出了根據本發明的一個示例性實施例的圖5的電路中的信號的時序圖。 FIG. 6 shows a timing diagram of signals in the circuit of FIG. 5 according to an exemplary embodiment of the present invention.
圖7示出了根據本發明的另一示例性實施例的圖5的電路中的信號的時序圖。 FIG. 7 shows a timing diagram of signals in the circuit of FIG. 5 according to another exemplary embodiment of the present invention.
圖8示出了根據本發明的一個示例性實施例的圖5的電路中的退磁檢測模組的示意性電路圖。 FIG. 8 shows a schematic circuit diagram of the demagnetization detection module in the circuit of FIG. 5 according to an exemplary embodiment of the present invention.
圖9示出了根據本發明的一個示例性實施例的與圖8的電路對應的信號的時序圖。 FIG. 9 shows a timing diagram of signals corresponding to the circuit of FIG. 8 according to an exemplary embodiment of the present invention.
圖10示出了根據本發明的另一示例性實施例的圖5的電路中的退磁檢測模組的示意性電路圖。 FIG. 10 shows a schematic circuit diagram of the demagnetization detection module in the circuit of FIG. 5 according to another exemplary embodiment of the present invention.
圖11示出了根據本發明的一個示例性實施例的與圖10的電路對應的信號的時序圖。 FIG. 11 shows a timing diagram of signals corresponding to the circuit of FIG. 10 according to an exemplary embodiment of the present invention.
圖12示出了根據本發明的一個示例性實施例的圖8或圖10中的退磁檢測模組中的負壓檢測模組的示意性電路圖。 FIG. 12 shows a schematic circuit diagram of the negative pressure detection module in the demagnetization detection module in FIG. 8 or 10 according to an exemplary embodiment of the present invention.
圖13示出了根據本發明的另一示例性實施例的圖8或圖10中的退磁檢測模組中的負壓檢測模組的示意性電路圖。 FIG. 13 shows a schematic circuit diagram of the negative pressure detection module in the demagnetization detection module in FIG. 8 or 10 according to another exemplary embodiment of the present invention.
下面將詳細描述本發明的各個方面的特徵和示例性實施例。在下面的詳細描述中,提出了許多具體細節,以便提供對本發明的全面理解。但是,對於本領域技術人員來說很明顯的是,本發明可以在不需要這些具體細節中的一些細節的情況下實施。下面對實施例的描述僅僅是為了通過示出本發明的示例來提供對本發明的更好的理解。本發明決不限於下面所提出的任何具體配置和演算法,而是在不脫離本發明的精神的前提下覆蓋了元素、部件和演算法的任何修改、替換和改進。在圖式和下面的描述中,沒有示出公知的結構和技術,以便避免對本發明造成不必要的模糊。 Features and exemplary embodiments of various aspects of the invention are described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the invention. However, it will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the invention by illustrating examples of the invention. The present invention is in no way limited to any specific configurations and algorithms set forth below, but covers any modifications, substitutions and improvements of elements, components and algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.
圖1示出了根據一個示例性實施例的非對稱半橋返馳式電源100的示意性電路圖。 FIG. 1 shows a schematic circuit diagram of an asymmetric half-bridge flyback power supply 100 according to an exemplary embodiment.
如圖1所示,非對稱半橋返馳式電源100包括第一開關Q1、第二開關Q2、變壓器的原邊電感Lp和變壓器的副邊電感Ls。原邊電感Lp的匝數Np與副邊電感Ls的匝數Ns比為Np:Ns=N。第一開關Q1與第二開關Q2之間的節點為HB。 As shown in Figure 1, the asymmetric half-bridge flyback power supply 100 includes a first switch Q1, a second switch Q2, a primary inductor Lp of the transformer, and a secondary inductor Ls of the transformer. The ratio of the number of turns Np of the primary inductor Lp to the number of turns Ns of the secondary inductor Ls is Np: Ns=N. The node between the first switch Q1 and the second switch Q2 is HB.
在第一開關Q1接通且第二開關Q2斷開期間,變壓器通過原邊電感Lp充磁,在第一開關Q1斷開且第二開關Q2接通期間變壓器通過副邊電感Ls退磁。 When the first switch Q1 is on and the second switch Q2 is off, the transformer is magnetized by the primary inductor Lp, and when the first switch Q1 is off and the second switch Q2 is on, the transformer is demagnetized by the secondary inductor Ls.
具體地,在第一開關Q1接通且第二開關Q2斷開期間,變壓 器通過輸入電壓Vin經由以下充磁回路充磁:第一開關Q1、諧振電容Cr、漏感Lr、原邊電感Lp、電流檢測電阻Rcs到參考地。此時,由於變壓器副邊電路中二極體D1對電流流向的限制,而使得副邊電感Ls中沒有電流。 Specifically, during the period when the first switch Q1 is turned on and the second switch Q2 is turned off, the voltage transformer The device is magnetized by the input voltage Vin through the following magnetizing circuit: the first switch Q1, the resonant capacitor Cr, the leakage inductance Lr, the primary inductor Lp, the current detection resistor Rcs to the reference ground. At this time, due to the restriction of the current flow direction by the diode D1 in the secondary circuit of the transformer, there is no current in the secondary inductor Ls.
在第一開關Q1斷開且第二開關Q2接通期間,變壓器通過以下退磁回路通過原邊電感Lp向副邊電感Ls退磁:第二開關Q2、諧振電容Cr、漏感Lr、原邊電感Lp、電流檢測電阻Rcs。此時,副邊電感Ls中具有電流IDo。 When the first switch Q1 is turned off and the second switch Q2 is turned on, the transformer demagnetizes the secondary inductor Ls through the primary inductor Lp through the following demagnetization circuit: second switch Q2, resonant capacitor Cr, leakage inductance Lr, primary inductor Lp , current detection resistor Rcs. At this time, there is a current I Do in the secondary inductor Ls.
圖1所示的非對稱半橋返馳式電源100的變壓器的一個充磁過程和一個退磁過程構成一個工作週期。該非對稱半橋返馳式電源100在固定工作頻率下工作,以在每個工作週期中重複上述充磁和退磁過程,而在輸出端向所連接的負載提供輸出電壓Vo。該輸出電壓Vo對應於所連接的負載的工作電壓,電容C2用於使得輸出端的輸出電壓Vo穩定於負載的工作電壓處。 A magnetization process and a demagnetization process of the transformer of the asymmetric half-bridge flyback power supply 100 shown in Figure 1 constitute a working cycle. The asymmetric half-bridge flyback power supply 100 operates at a fixed operating frequency to repeat the above-mentioned magnetizing and demagnetizing processes in each working cycle, and provides the output voltage Vo to the connected load at the output end. The output voltage Vo corresponds to the working voltage of the connected load, and the capacitor C2 is used to stabilize the output voltage Vo at the output end at the working voltage of the load.
以下參照圖2和圖3描述圖1的非對稱半橋返馳式電源100的工作過程的示例。 An example of the working process of the asymmetric half-bridge flyback power supply 100 of FIG. 1 is described below with reference to FIGS. 2 and 3 .
圖2示出了根據一個示例性實施例的圖1的非對稱半橋返馳式電源100中的信號的時序圖。 FIG. 2 shows a timing diagram of signals in the asymmetric half-bridge flyback power supply 100 of FIG. 1 according to an exemplary embodiment.
圖2示出的是臨界導通模式(Critical Conduction Current Mode,CRM)下的非對稱半橋返馳式電源100的工作過程。該臨界導通模式通常適於所連接的負載為重載(即,負載所需的工作電壓較大)的情況。 FIG. 2 shows the working process of the asymmetric half-bridge flyback power supply 100 in critical conduction mode (Critical Conduction Current Mode, CRM). This critical conduction mode is usually suitable for situations where the connected load is a heavy load (that is, the operating voltage required by the load is relatively large).
在圖2中,Q1 gate表示第一開關Q1的控制信號,Q2 gate表示第二開關Q2的控制信號,ILr表示漏感Lr的電流,IDo表示副邊電感Ls的電流,VHB表示節點HB處的電壓。 In Figure 2, Q1 gate represents the control signal of the first switch Q1, Q2 gate represents the control signal of the second switch Q2, I Lr represents the current of the leakage inductor Lr, I Do represents the current of the secondary inductor Ls, and V HB represents the node The voltage at HB.
在時間t0處,控制信號Q1 gate使第一開關Q1接通,此時,控制信號Q2 gate使第二開關Q2處於斷開狀態。 At time t0, the control signal Q1 gate causes the first switch Q1 to be turned on. At this time, the control signal Q2 gate causes the second switch Q2 to be in an off state.
在時間t0至時間t1期間,控制信號Q1 gate使第一開關Q1保持接通狀態,控制信號Q2 gate使第二開關Q2保持斷開狀態。在此期間, 輸入電壓Vin通過諧振電容Cr對變壓器的原邊電感Lp充電。原邊電感Lp中的電流即為漏感Lr中的電流ILr,該電流ILr正向增大。此外,在此期間,第一開關Q1中的寄生電容兩端的電壓為0伏(Volt,V)、即未被充電。第二開關Q2中的寄生電容兩端的電壓為Vin。 From time t0 to time t1, the control signal Q1 gate keeps the first switch Q1 in the on state, and the control signal Q2 gate keeps the second switch Q2 in the off state. During this period, the input voltage Vin charges the primary inductor Lp of the transformer through the resonant capacitor Cr. The current in the primary inductance Lp is the current I Lr in the leakage inductance Lr, and the current I Lr increases in the positive direction. In addition, during this period, the voltage across the parasitic capacitance in the first switch Q1 is 0 volt (Volt,V), that is, it is not charged. The voltage across the parasitic capacitance in the second switch Q2 is Vin.
在時間t1處,控制信號Q1 gate使第一開關Q1斷開,此時,控制信號Q2 gate仍使第二開關Q2保持斷開狀態。原邊電感Lp中的電流(此時,即為漏感Lr中的電流ILr)達到最大值Ip。 At time t1, the control signal Q1 gate causes the first switch Q1 to turn off. At this time, the control signal Q2 gate still causes the second switch Q2 to remain in the off state. The current in the primary inductance Lp (at this time, the current I Lr in the leakage inductance Lr) reaches the maximum value Ip.
在時間t1至時間t2期間,控制信號Q1 gate使第一開關Q1保持斷開狀態,控制信號Q2 gate使第二開關Q2保持斷開狀態,輸入電壓Vin對原邊電感Lp的充電回路斷開。由於電感中的電流無法突變,因此正向的原邊電感Lp的電流ILr對第二開關Q2的寄生電容放電、並對第一開關Q1的寄生電容充電,而使得節點HB處的電壓VHB逐漸下降,直至在時間t2附近下降至0V。此時,第二開關Q2的寄生電容兩端的電壓為0V,第一開關Q1的寄生電容兩端的電壓為Vin。 From time t1 to time t2, the control signal Q1 gate keeps the first switch Q1 in the off state, the control signal Q2 gate keeps the second switch Q2 in the off state, and the charging loop of the input voltage Vin to the primary inductor Lp is disconnected. Since the current in the inductor cannot mutate suddenly, the current I Lr of the forward primary inductance Lp discharges the parasitic capacitance of the second switch Q2 and charges the parasitic capacitance of the first switch Q1, so that the voltage at the node HB V HB Gradually decrease until it drops to 0V near time t2. At this time, the voltage across the parasitic capacitance of the second switch Q2 is 0V, and the voltage across the parasitic capacitance of the first switch Q1 is Vin.
在時間t2處,即在節點HB處的電壓VHB為0V時,控制信號Q2 gate使第二開關Q2零電壓切換(Zero Voltage Switching,ZVS),此時,控制信號Q1 gate仍使第一開關Q1保持斷開狀態。 At time t2, that is, when the voltage V HB at node HB is 0V, the control signal Q2 gate causes the second switch Q2 to zero voltage switching (ZVS). At this time, the control signal Q1 gate still causes the first switch Q1 remains off.
在時間t2至時間t3期間,諧振電容Cr與漏感Lr諧振,漏感Lr的電流ILr下降至0安(Ampere,A)後負向增大,同時變壓器通過副邊電感Ls退磁,原邊電感Lp的勵磁電流ILm(如圖2中斜向下的虛線所示)線性減小。副邊電感Ls具有圖2所示的電流IDo。 From time t2 to time t3, the resonant capacitor Cr resonates with the leakage inductance Lr. The current I Lr of the leakage inductance Lr drops to 0 A (Ampere, A) and then increases in the negative direction. At the same time, the transformer demagnetizes through the secondary inductance Ls, and the primary side The excitation current I Lm of the inductor Lp (shown as the dotted line diagonally downward in Figure 2) decreases linearly. The secondary inductor Ls has the current I Do shown in Figure 2.
在時間t3處,漏感Lr的電流ILr諧振至和原邊電感Lp的勵磁電流ILm同樣大。此時,變壓器退磁結束,副邊電感Ls的電流IDo為0A。 At time t3, the current I Lr of the leakage inductance Lr resonates to be as large as the excitation current I Lm of the primary inductor Lp. At this time, the demagnetization of the transformer is completed, and the current I Do of the secondary inductor Ls is 0A.
在時間t3至時間t4期間,諧振電容Vcr通過第二開關Q2對變壓器的原邊電感Lp放電,漏感Lr諧振的電流ILr負向增大,直至在時間t4附近負向增至-In。 From time t3 to time t4, the resonant capacitor Vcr discharges the primary inductor Lp of the transformer through the second switch Q2, and the resonance current I Lr of the leakage inductance Lr increases negatively until it increases negatively to -In near time t4.
在時間t4處,控制信號Q2 gate使第二開關Q2斷開,諧振 電容Vcr對變壓器原邊電感Lp的放電回路斷開。此時,控制信號Q1 gate仍使第一開關Q1保持斷開狀態。 At time t4, the control signal Q2 gate turns off the second switch Q2 and resonates The discharge circuit of the capacitor Vcr to the transformer primary inductance Lp is disconnected. At this time, the control signal Q1 gate still keeps the first switch Q1 in the off state.
在時間t4至時間t5期間,由於電感中的電流無法突變,因此漏感Lr的負向電流ILr對第一開關Q1的寄生電容放電、並對第二開關Q2的寄生電容充電,而使得節點HB處的電壓逐漸上升,直至在時間t5附近上升直至Vin。此時,第一開關Q1的寄生電容兩端的電壓為0V,第二開關Q2的寄生電容兩端的電壓為Vin。 From time t4 to time t5, since the current in the inductor cannot mutate suddenly, the negative current I Lr of the leakage inductance Lr discharges the parasitic capacitance of the first switch Q1 and charges the parasitic capacitance of the second switch Q2, so that the node The voltage at HB gradually rises until it rises to Vin near time t5. At this time, the voltage across the parasitic capacitance of the first switch Q1 is 0V, and the voltage across the parasitic capacitance of the second switch Q2 is Vin.
在時間t5處,控制信號Q1 gate使第一開關Q1零位準接通。此後,非對稱半橋返馳式電源100重複上述工作過程。即,時間t5與時間t0均為非對稱半橋返馳式電源100的一個工作週期的起始時間。 At time t5, the control signal Q1 gate causes the first switch Q1 to be turned on at zero level. Thereafter, the asymmetric half-bridge flyback power supply 100 repeats the above working process. That is, time t5 and time t0 are both the starting time of a working cycle of the asymmetric half-bridge flyback power supply 100 .
在上述工作過程中,非對稱半橋返馳式電源100的輸出端的電流(負載電流)Io為Io=[(Ip-In)/2]×Np/Ns。 During the above working process, the current (load current) Io at the output end of the asymmetric half-bridge flyback power supply 100 is Io=[(Ip-In)/2]×Np/Ns.
圖3示出了根據另一示例性實施例的圖1的非對稱半橋返馳式電源100中的信號的時序圖。 FIG. 3 shows a timing diagram of signals in the asymmetric half-bridge flyback power supply 100 of FIG. 1 according to another exemplary embodiment.
圖3示出的是斷續導通模式(Discontinuous Conduction Mode,DCM)下的非對稱半橋返馳式電源100的工作過程。該斷續導通模式通常適於所連接的負載為輕載(即,負載所需的工作電流較小)的情況。 FIG. 3 shows the working process of the asymmetric half-bridge flyback power supply 100 in Discontinuous Conduction Mode (DCM). This discontinuous conduction mode is usually suitable when the connected load is a light load (that is, the operating current required by the load is small).
圖3中的Q1 gate、Q2 gate、ILr、IDo和VHB分別具有與圖2相同的含義。 Q1 gate, Q2 gate, I Lr , I Do and V HB in Figure 3 respectively have the same meanings as in Figure 2 .
在圖3的時間t0至時間t4期間,非對稱半橋返馳式電源100的工作方式與圖2相似,這裡不再贅述。 During the period from time t0 to time t4 in FIG. 3 , the working mode of the asymmetric half-bridge flyback power supply 100 is similar to that in FIG. 2 , and will not be described again here.
圖3與圖2的不同之處在於時間t4之後的時間段。 Figure 3 differs from Figure 2 in the time period after time t4.
例如,在時間t4至時間t5期間,第一開關Q1的寄生電容以及第二開關Q2的寄生電容的充放電會與原邊電感Lp產生如圖3所示的諧振。 For example, from time t4 to time t5, the charging and discharging of the parasitic capacitance of the first switch Q1 and the second switch Q2 will resonate with the primary inductance Lp as shown in FIG. 3 .
在時間t5至時間t6期間,控制信號Q2 gate使第二開關Q2再次接通,諧振電容Vcr通過第二開關Q2對變壓器原邊電感Lp放電,電 流ILr負向增大,直至在時間t6附近負向增大至-In1。 From time t5 to time t6, the control signal Q2 gate turns on the second switch Q2 again, the resonant capacitor Vcr discharges the transformer primary inductor Lp through the second switch Q2, and the current I Lr increases in the negative direction until near time t6 Increases to -In1 in the negative direction.
在時間t6處,控制信號Q2 gate使第二開關Q2斷開,諧振電容Vcr對變壓器的原邊電感Lp放電回路斷開。 At time t6, the control signal Q2 gate turns off the second switch Q2, and the resonant capacitor Vcr disconnects the discharge circuit of the primary inductor Lp of the transformer.
在時間t6至時間t7期間,由於原邊電感Lp中的電流無法突變,因而負向的原邊電流ILr對第一開關Q1的寄生電容放電、並對第二開關Q2的寄生電容充電,使得節點HB處的電壓逐漸上升,直至在時間t7附近上升至Vin,此時,第一開關Q1的寄生電容兩端的電壓為0V,第二開關Q2的寄生電容兩端的電壓為Vin。 From time t6 to time t7, since the current in the primary inductance Lp cannot change suddenly, the negative primary current I Lr discharges the parasitic capacitance of the first switch Q1 and charges the parasitic capacitance of the second switch Q2, so that The voltage at node HB gradually increases until it reaches Vin near time t7. At this time, the voltage across the parasitic capacitance of the first switch Q1 is 0V, and the voltage across the parasitic capacitance of the second switch Q2 is Vin.
在時間t7處,控制信號Q1 gate使第一開關Q1零位準接通。此後,非對稱半橋返馳式電源100重複上述工作過程。即,時間t7與時間t0均為非對稱半橋返馳式電源100的一個工作週期的起始時間。 At time t7, the control signal Q1 gate causes the first switch Q1 to be turned on at zero level. Thereafter, the asymmetric half-bridge flyback power supply 100 repeats the above working process. That is, time t7 and time t0 are both the starting time of a working cycle of the asymmetric half-bridge flyback power supply 100 .
在上述工作過程中,非對稱半橋返馳式電源100的輸出端的電流Io為:
During the above working process, the current Io at the output end of the asymmetric half-bridge flyback power supply 100 is:在上式(1)中,-In1為如圖3所示的第一開關的接通電流(對應於圖2中所示的電流-In),-In2為如圖3所示的第二開關的斷開電流,Ton1為如圖3所示的時間t0至時間t1的時間段的時長,Ton2為如圖3所示的時間t2至時間t4的時間段的時長,Ts為一個工作週期的時長。 In the above formula (1), -In1 is the turn-on current of the first switch shown in Figure 3 (corresponding to the current -In shown in Figure 2), and -In2 is the second switch shown in Figure 3 The disconnection current of of duration.
參照圖2和圖3,非對稱半橋返馳式電源100在固定工作頻率下工作。當所連接的負載變化、例如由重載轉為輕載時,其僅將工作模式從圖2所示的臨界導通模式改變為圖3所示的斷續導通模式。在斷續導通模式下,為了適應負載電流Io減小導致的Ton1的減小,需要同時減小Ton2的大小來減小負向電流幅值In2,而目前常用的控制方式是採用固定的Ton2時間,使得負向電流幅值In2很大,從而阻礙了工作週期Ts的增加。因而,這種方式會導致非對稱半橋返馳式電源100的工作頻率與負載的大小不匹配,從而導致非對稱半橋返馳式電源100的效率較低。 Referring to FIGS. 2 and 3 , the asymmetric half-bridge flyback power supply 100 operates at a fixed operating frequency. When the connected load changes, for example from a heavy load to a light load, it simply changes the operating mode from the critical conduction mode shown in Figure 2 to the discontinuous conduction mode shown in Figure 3. In the intermittent conduction mode, in order to adapt to the reduction of Ton1 caused by the reduction of load current Io, it is necessary to reduce the size of Ton2 at the same time to reduce the negative current amplitude In2, and the currently commonly used control method is to use a fixed Ton2 time , making the negative current amplitude In2 very large, thus hindering the increase of the duty cycle Ts. Therefore, this method will cause the operating frequency of the asymmetric half-bridge flyback power supply 100 to not match the size of the load, resulting in low efficiency of the asymmetric half-bridge flyback power supply 100 .
為了至少解決上述問題,根據本發明的實施例提出了一種用 於非對稱半橋返馳式電源的電路。 In order to at least solve the above problems, an embodiment of the present invention proposes a method for Circuit for asymmetric half-bridge flyback power supply.
圖4是根據本發明的一個示例性實施例的示出用於非對稱半橋返馳式電源的電路200的框圖。 FIG. 4 is a block diagram illustrating a circuit 200 for an asymmetric half-bridge flyback power supply in accordance with an exemplary embodiment of the present invention.
例如,非對稱半橋返馳式電源100可以與圖1相似,但其第一開關Q1和第二開關Q2的接通和斷開由根據本發明的實施例的用於非對稱半橋返馳式電源的電路200來控制。該電路200包括第一電壓檢測單元210和開關控制單元220。 For example, the asymmetric half-bridge flyback power supply 100 may be similar to FIG. 1 , but the first switch Q1 and the second switch Q2 are turned on and off by a switch for the asymmetric half-bridge flyback according to an embodiment of the present invention. The power supply circuit 200 is used to control. The circuit 200 includes a first voltage detection unit 210 and a switch control unit 220.
第一電壓檢測單元210被配置為檢測非對稱半橋返馳式電源100的輸出端的輸出電壓Vo,例如,檢測通過輸出電壓Vo產生的回饋電壓(節點FB處)。輸出電壓Vo對應於非對稱半橋返馳式電源100所連接的負載的工作電壓。 The first voltage detection unit 210 is configured to detect the output voltage Vo at the output terminal of the asymmetric half-bridge flyback power supply 100 , for example, detect the feedback voltage (at node FB) generated by the output voltage Vo. The output voltage Vo corresponds to the operating voltage of the load connected to the asymmetric half-bridge flyback power supply 100 .
在一個實施例中,第一電壓檢測單元210可通過檢測輸出端的輸出電壓Vo的分壓產生回饋電壓(例如,以下圖5中節點FB處的電壓),來檢測及控制輸出電壓。 In one embodiment, the first voltage detection unit 210 can detect and control the output voltage by detecting the divided voltage of the output voltage Vo at the output terminal to generate a feedback voltage (for example, the voltage at node FB in FIG. 5 below).
開關控制單元220被配置為在非對稱半橋返馳式電源100的每個工作週期期間,根據輸出電壓Vo,將第一開關Q1接通第一時間段,並將第二開關Q2接通第二時間段,其中,第一開關Q1和第二開關Q2不同時處於接通狀態。 The switch control unit 220 is configured to turn on the first switch Q1 for a first period of time and turn on the second switch Q2 for a first period of time according to the output voltage Vo during each working cycle of the asymmetric half-bridge flyback power supply 100 . Two time periods, in which the first switch Q1 and the second switch Q2 are not in the on state at the same time.
由此,上述電路200能夠根據非對稱半橋返馳式電源100所連接的負載的工作電壓,來調節接通第一開關以進行充磁的第一時間段、以及接通第二開關以進行退磁的第二時間段。即,電路200能夠調節非對稱半橋返馳式電源100的工作頻率,而使得其能夠自我調整所連接的負載的工作電壓,提高了非對稱半橋返馳式電源的工作效率。 Therefore, the circuit 200 can adjust the first period of time during which the first switch is turned on for magnetization and the second switch is turned on according to the working voltage of the load connected to the asymmetric half-bridge flyback power supply 100 . The second period of demagnetization. That is, the circuit 200 can adjust the operating frequency of the asymmetric half-bridge flyback power supply 100 so that it can self-adjust the operating voltage of the connected load, thereby improving the operating efficiency of the asymmetric half-bridge flyback power supply.
在一個實施例中,電路200還可包括:第二電壓檢測單元230。第二電壓檢測單元230可被配置為與原邊電感Lp和副邊電感Ls耦合,以在變壓器充磁期間檢測原邊電感的原邊電壓,並在變壓器退磁期間檢測副邊電感的副邊電壓。 In one embodiment, the circuit 200 may further include: a second voltage detection unit 230. The second voltage detection unit 230 may be configured to be coupled with the primary inductor Lp and the secondary inductor Ls to detect the primary voltage of the primary inductor during magnetization of the transformer, and to detect the secondary voltage of the secondary inductor during demagnetization of the transformer. .
在一個實施例中,電路200還可包括:第三電壓檢測單元240。第三電壓檢測單元240可被配置為在變壓器充磁期間,檢測充磁回路上的電流檢測電阻Rcs兩端的電阻電壓Vcs。 In one embodiment, the circuit 200 may further include: a third voltage detection unit 240. The third voltage detection unit 240 may be configured to detect the resistance voltage Vcs across the current detection resistor Rcs on the magnetization loop during magnetization of the transformer.
在這種情況下,在一個實施例中,開關控制單元220可被配置為:根據電阻電壓Vcs和回饋電壓,確定第一時間段的時長Ton;以及根據回饋電壓、原邊電壓和副邊電壓,確定第二時間段(Tdem+Tzvs)的時長。 In this case, in one embodiment, the switch control unit 220 may be configured to: determine the duration Ton of the first time period according to the resistance voltage Vcs and the feedback voltage; and determine the duration Ton of the first time period according to the feedback voltage, the primary side voltage and the secondary side voltage. voltage to determine the duration of the second time period (Tdem+Tzvs).
在一個實施例中,第二時間段可包括退磁時間段(Tdem)和原邊電感反向充電時間段(Tzvs)。開關控制單元220可被配置為:根據回饋電壓、原邊電壓和副邊電壓,確定退磁時間段的時長Tdem;根據原邊電壓確定原邊電感反向充電時間段的時長Tzvs。 In one embodiment, the second time period may include a demagnetization time period (Tdem) and a primary inductor reverse charging time period (Tzvs). The switch control unit 220 may be configured to: determine the duration of the demagnetization period Tdem according to the feedback voltage, primary voltage and secondary voltage; determine the duration of the primary inductor reverse charging period Tzvs according to the primary voltage.
在一個實施例中,為使第一開關Q1和第二開關Q2能夠零電壓接通,開關控制單元220可被配置為:在第一時間段結束後的第一死區時間段(以下圖6和圖7中的時間t1-t2之間的時間段)之後,接通第二開關;在原邊電感反向充電時間段之後的第二死區時間段(以下圖6中的時間t4-t5之間的時間段,或者圖7中的時間t5-t6之間的時間段)之後,接通第一開關。 In one embodiment, in order to enable the first switch Q1 and the second switch Q2 to be turned on at zero voltage, the switch control unit 220 may be configured to: during the first dead time period after the end of the first time period (see Figure 6 below) After the time period between t1 and t2 in Figure 7), the second switch is turned on; after the second dead time period after the reverse charging time period of the primary inductor (between time t4 and t5 in Figure 6 below) (or the time period between time t5-t6 in Figure 7), the first switch is turned on.
這裡,第一死區時間段可以為用於使第二開關零電壓接通所需的時間段,第二死區時間段可以為用於使第一開關零電壓接通所需的時間段,其可以根據第一開關和第二開關的自身特性來確定。 Here, the first dead time period may be a time period required to turn on the second switch with zero voltage, and the second dead time period may be a time period required to turn on the first switch with zero voltage, It can be determined according to the own characteristics of the first switch and the second switch.
以上第一開關接通的時間為非對稱半橋返馳式電源的工作週期的開始時間。 The above time when the first switch is turned on is the starting time of the working cycle of the asymmetric half-bridge flyback power supply.
此外,在一個實施例中,為了更好地適應負載,根據本發明的電路200還可以使非對稱半橋返馳式電源100工作於不同的工作模式。具體地,開關控制單元220還可被配置為:將檢測輸出電壓的分壓產生的回饋電壓的分壓與預定電壓閾值進行比較;在該分壓大於所述預定電壓閾值的情況下,確定負載為重載負載,使非對稱半橋返馳式電源工作於臨界 導通模式;在該分壓小於或等於預定電壓閾值的情況下,確定負載為輕載負載,使非對稱半橋返馳電源工作於斷續導通模式。 In addition, in one embodiment, in order to better adapt to the load, the circuit 200 according to the present invention can also make the asymmetric half-bridge flyback power supply 100 work in different operating modes. Specifically, the switch control unit 220 may also be configured to: compare the divided voltage of the feedback voltage generated by detecting the divided voltage of the output voltage with a predetermined voltage threshold; if the divided voltage is greater than the predetermined voltage threshold, determine the load For heavy loads, the asymmetric half-bridge flyback power supply operates at critical Conduction mode; when the divided voltage is less than or equal to the predetermined voltage threshold, the load is determined to be a light load, so that the asymmetric half-bridge flyback power supply operates in the discontinuous conduction mode.
相應地,在臨界導通模式下,開關控制單元220可被配置為使退磁時間段與原邊電感反向充電時間段為連續的時間段。 Accordingly, in the critical conduction mode, the switch control unit 220 may be configured to make the demagnetization period and the primary inductor reverse charging period be continuous time periods.
在斷續導通模式下,開關控制單元220可被配置為使退磁時間段與原邊電感反向充電時間段之間間隔第三時間段(以下圖7中的時間t3至時間t4之間的時間段),以在第三時間段期間使第一開關Q1和第二開關Q2均保持為斷開狀態。 In the discontinuous conduction mode, the switch control unit 220 may be configured to space a third time period (the time between time t3 to time t4 in FIG. 7 below) between the demagnetization period and the primary inductor reverse charging period. period), so that both the first switch Q1 and the second switch Q2 are kept in the off state during the third time period.
在一個實施例中,開關控制單元220可根據回饋電壓(例如,上述分壓)確定第三時間段的時長。 In one embodiment, the switch control unit 220 may determine the length of the third time period according to the feedback voltage (eg, the above-mentioned divided voltage).
以下參照圖5至圖13來描述根據本發明的用於非對稱半橋返馳式電源的電路200的一些實現方式的示例。 Examples of some implementations of a circuit 200 for an asymmetric half-bridge flyback power supply according to the present invention are described below with reference to FIGS. 5 to 13 .
圖5是根據本發明的一個示例性實施例的示出用於非對稱半橋返馳式電源的電路200與非對稱半橋返馳式電源100之間的連接關係的示意性電路圖。 FIG. 5 is a schematic circuit diagram showing the connection relationship between the circuit 200 for an asymmetric half-bridge flyback power supply and the asymmetric half-bridge flyback power supply 100 according to an exemplary embodiment of the present invention.
圖5所示的非對稱半橋返馳式電源100與圖1相似,其也包括第一開關Q1、第二開關Q2、變壓器的原邊電感Lp和變壓器的副邊電感Ls,在第一開關Q1接通且第二開關Q2斷開期間,變壓器通過原邊電感Lp充磁,在第一開關Q1斷開且第二開關Q2接通期間變壓器通過副邊電感Ls退磁。 The asymmetric half-bridge flyback power supply 100 shown in Figure 5 is similar to Figure 1. It also includes a first switch Q1, a second switch Q2, a primary inductor Lp of the transformer, and a secondary inductor Ls of the transformer. In the first switch When Q1 is turned on and the second switch Q2 is turned off, the transformer is magnetized by the primary inductor Lp, and when the first switch Q1 is turned off and the second switch Q2 is turned on, the transformer is demagnetized by the secondary inductor Ls.
圖5與圖1的不同之處在於:用於控制第一開關Q1的接通和斷開的信號gate_up、以及用於控制第二開關Q2的接通和斷開的信號gate_up由根據本發明的實施例的電路200產生。 The difference between FIG. 5 and FIG. 1 is that the signal gate_up used to control the on and off of the first switch Q1 and the signal gate_up used to control the on and off of the second switch Q2 are provided by the signal gate_up according to the present invention. The circuit 200 of the embodiment is produced.
如圖5所示,第一電壓檢測單元210通過電阻R1-R4、電容C3-C5、光耦OC、三端穩壓器TL431,在節點FB處檢測輸出電壓Vo的回饋電壓(為便於描述,以下也可稱為回饋電壓)。 As shown in Figure 5, the first voltage detection unit 210 detects the feedback voltage of the output voltage Vo at the node FB through the resistors R1-R4, capacitors C3-C5, optocoupler OC, and three-terminal regulator TL431 (for convenience of description, It can also be called feedback voltage below).
第二電壓檢測單元230通過與原邊電感Lp、副邊電感Ls耦 合的繞組Waux、並通過電阻R5-R6,在節點INV處檢測與原邊電壓或副邊電壓對應的分壓(為便於描述,以下稱為原邊電壓或副邊電壓)。這裡,繞組Waux的電壓Vaux與原邊電感Lp的原邊電壓對應、或者與副邊電感Ls的副邊電壓對應,因此節點INV處的電壓(電壓Vaux的分壓)也與原邊電感Lp的原邊電壓對應、或者與副邊電感Ls的副邊電壓對應。例如,在第一開關Q1接通期間,節點INV處的電壓與原邊電壓對應;在第二開關Q2接通期間,節點INV處的電壓與副邊電壓對應。 The second voltage detection unit 230 is coupled to the primary inductor Lp and the secondary inductor Ls. The combined winding Waux, and through the resistors R5-R6, detects the divided voltage corresponding to the primary voltage or the secondary voltage at the node INV (for convenience of description, hereafter referred to as the primary voltage or the secondary voltage). Here, the voltage Vaux of the winding Waux corresponds to the primary voltage of the primary inductor Lp, or to the secondary voltage of the secondary inductor Ls. Therefore, the voltage at the node INV (the divided voltage of the voltage Vaux) also corresponds to the voltage of the primary inductor Lp. The primary side voltage corresponds to the secondary side voltage of the secondary side inductor Ls. For example, when the first switch Q1 is turned on, the voltage at the node INV corresponds to the primary side voltage; while the second switch Q2 is turned on, the voltage at the node INV corresponds to the secondary side voltage.
第三電壓檢測單元240檢測電流檢測電阻Rcs兩端的電阻電壓Vcs。 The third voltage detection unit 240 detects the resistance voltage Vcs across the current detection resistor Rcs.
以下對開關控制單元220中的各個模組進行說明。 Each module in the switch control unit 220 is described below.
開關控制單元220中左上方示出的比較器(comp)用於將電阻電壓Vcs與節點FB處分壓後的電壓(輸出電壓Vo的回饋電壓)進行比較,以當電阻電壓Vcs大於節點FB處分壓後的電壓時,產生用於斷開第一開關的信號CV_off。例如,在第一開關Q1接通的充磁期間,電阻電壓Vcs逐漸增大,當增大至大於節點FB處分壓後的電壓時,說明充磁的程度已與回饋電壓、即負載所需的電壓匹配,此時可斷開第一開關Q1。 The comparator (comp) shown in the upper left of the switch control unit 220 is used to compare the resistor voltage Vcs with the divided voltage at the node FB (the feedback voltage of the output voltage Vo), so that when the resistor voltage Vcs is greater than the divided voltage at the node FB When the voltage is higher, a signal CV_off for turning off the first switch is generated. For example, during the magnetization period when the first switch Q1 is turned on, the resistance voltage Vcs gradually increases. When it increases to greater than the divided voltage at the node FB, it means that the degree of magnetization has matched the feedback voltage, that is, the required voltage of the load. The voltages match, and the first switch Q1 can be turned off at this time.
調頻模組(Frequency control,FRE)用於根據節點FB處的電壓確定非對稱半橋返馳式電源的工作模式,例如,臨界導通模式或斷續導通模式,並在斷續導通模式下確定使第二開關Q2再次接通的時間。例如,FRE可以輸出高位準的DCM_on信號來指示臨界導通模式;FRE可以輸出低位準的DCM_on信號來指示斷續導通模式,並且該信號可在用於使第二開關Q2再次接通的時間點短暫地變高。 The frequency regulation module (Frequency control, FRE) is used to determine the operating mode of the asymmetric half-bridge flyback power supply based on the voltage at node FB, such as critical conduction mode or discontinuous conduction mode, and determine the use of the power supply in the discontinuous conduction mode. The time when the second switch Q2 is turned on again. For example, the FRE may output a high-level DCM_on signal to indicate the critical conduction mode; the FRE may output a low-level DCM_on signal to indicate the discontinuous conduction mode, and the signal may be briefly used to turn the second switch Q2 on again. The ground becomes higher.
FRE下方的比較器(comp)用於根據節點FB處的電壓確定負載電流是否過下,如果過小,則輸出使得第一開關Q1和第二開關Q2均斷開、進而使得非對稱半橋返馳式電源停止工作的burst信號。 The comparator (comp) below FRE is used to determine whether the load current is too low based on the voltage at node FB. If it is too small, the output causes both the first switch Q1 and the second switch Q2 to turn off, thereby causing the asymmetric half-bridge flyback. burst signal when the power supply stops working.
退磁檢測模組(DEM control)根據節點INV處的電壓確定是否退磁結束,並產生能夠指示退磁是否結束的DEM_off信號。 The demagnetization detection module (DEM control) determines whether demagnetization is completed based on the voltage at node INV, and generates a DEM_off signal that indicates whether demagnetization is completed.
零電壓接通模組(ZVS)用於根據節點INV處的電壓確定原邊電感反向充電時間段(Tzvs),並產生能夠指示原邊電感反向充電時間段是否結束以斷開第二開關Q2的信號ZVS_off。 The zero-voltage turn-on module (ZVS) is used to determine the primary-side inductor reverse charging time period (Tzvs) based on the voltage at the node INV, and generate a signal that can indicate whether the primary-side inductor reverse charging time period is over to turn off the second switch. Q2’s signal ZVS_off.
死區時間控制模組(Deadtime control)用於產生在第一開關斷開之後的第一死區時間之後接通第二開關的信號ZVS_down_on、以及用於在原邊電感反向充電時間段結束之後的第二死區時間段之後接通第一開關的信號ZVS_up_on。 The dead time control module (Deadtime control) is used to generate the signal ZVS_down_on for turning on the second switch after the first dead time after the first switch is turned off, and for generating the signal ZVS_down_on after the primary side inductor reverse charging period ends. After the second dead time period, the signal ZVS_up_on of the first switch is turned on.
第一邏輯模組(LOGIC1)用於根據信號CV_off和信號ZVS_up_on(以及信號burst),產生控制第一開關Q1的接通和斷開的信號gate_up。 The first logic module (LOGIC1) is used to generate a signal gate_up that controls the on and off of the first switch Q1 according to the signal CV_off and the signal ZVS_up_on (and the signal burst).
第二邏輯模組(LOGIC2)用於根據信號DCM_on、burst、DEM_off、ZVS_off和ZVS_down_on,產生控制第二開關Q2的接通和斷開的信號gate_down。 The second logic module (LOGIC2) is used to generate a signal gate_down for controlling the on and off of the second switch Q2 according to the signals DCM_on, burst, DEM_off, ZVS_off and ZVS_down_on.
以下參照圖6和圖7描述上述電路200的具體工作過程。 The specific working process of the above circuit 200 will be described below with reference to FIGS. 6 and 7 .
圖6示出了根據本發明的一個示例性實施例的圖5的電路中的信號的時序圖。 FIG. 6 shows a timing diagram of signals in the circuit of FIG. 5 according to an exemplary embodiment of the present invention.
圖6對應於臨界導通模式。在圖6中的示例中,在第一開關Q1接通的時間段Ton內、以及在第二開關Q2接通的時間段(Tdem和Tzvs)內,非對稱半橋返馳式電源的工作原理與參照圖1和圖2描述的相似,這裡不再贅述。 Figure 6 corresponds to the critical conduction mode. In the example in Figure 6, the working principle of the asymmetric half-bridge flyback power supply is during the time period Ton when the first switch Q1 is turned on, and during the time period (Tdem and Tzvs) when the second switch Q2 is turned on. It is similar to that described with reference to FIGS. 1 and 2 and will not be described again here.
圖6與圖2的不同之處在於:第一開關Q1接通的時間段Ton、第二開關Q2接通的時間段(Tdem和Tzvs)是根據檢測的回饋電壓(節點FB處的電壓)來確定的。即,圖6中的時間t0-t5可以根據回饋電壓而變化,以自我調整負載的大小。 The difference between Figure 6 and Figure 2 is that: the time period Ton during which the first switch Q1 is turned on and the time period (Tdem and Tzvs) during which the second switch Q2 is turned on are determined based on the detected feedback voltage (voltage at node FB). Definitely. That is, the time t0-t5 in Figure 6 can be changed according to the feedback voltage to self-adjust the size of the load.
例如,第一開關Q1接通的時間段(第一時間段、即與時間t0-t1對應的Ton)是根據檢測的節點FB處分壓後的電壓與電阻電壓Vcs的比較結果來確定的。由於節點FB處的電壓與負載電流對應,因而Ton適 應於負載的大小。 For example, the time period during which the first switch Q1 is turned on (the first time period, that is, Ton corresponding to the time t0-t1) is determined based on the comparison result between the detected divided voltage at the node FB and the resistor voltage Vcs. Since the voltage at node FB corresponds to the load current, Ton is suitable for Depending on the size of the load.
第二開關Q2接通的時間段(第二時間段、即與時間t2-t3對應的Tdem和與時間t3-t4對應的Tzvs)是通過DEM control模組檢測的退磁結束時間(DEM_off變為高位準的時間t3)和ZVS模組確定的原邊電感反向充電時間段(ZVS_off信號短暫變高的時間t4指示其結束時間)來確定的。該時間段與回饋電壓對應,因而第二開關Q2接通的時間段適應於負載大小。 The time period when the second switch Q2 is turned on (the second time period, that is, Tdem corresponding to time t2-t3 and Tzvs corresponding to time t3-t4) is the demagnetization end time detected by the DEM control module (DEM_off becomes high) It is determined by the accurate time t3) and the reverse charging time period of the primary inductor determined by the ZVS module (the time t4 when the ZVS_off signal briefly turns high indicates its end time). This time period corresponds to the feedback voltage, so the time period during which the second switch Q2 is turned on is adapted to the load size.
兩個死區時間段、即時間段t1-t2以及時間段t4-t5(第一死區時間段和第二死區時間段)可以分別具有固定時長。 The two dead time periods, namely the time period t1-t2 and the time period t4-t5 (the first dead time period and the second dead time period), may each have a fixed duration.
此外,圖6所示的持續高位準的信號DCM_on可以指示連續模式。回應於信號DCM_on具有高位準,產生的gate_down信號可以使得Tdem和Tzvs為連續的一個時間段。 In addition, the continuously high level signal DCM_on shown in FIG. 6 may indicate the continuous mode. In response to the signal DCM_on having a high level, the generated gate_down signal can make Tdem and Tzvs a continuous period of time.
圖7示出了根據本發明的另一示例性實施例的圖5的電路中的信號的時序圖。 FIG. 7 shows a timing diagram of signals in the circuit of FIG. 5 according to another exemplary embodiment of the present invention.
圖7對應於斷續導通模式。在圖7中的示例中,在第一開關Q1接通的時間段Ton內、以及在第二開關Q2接通的時間段(Tdem和Tzvs)內,非對稱半橋返馳式電源的工作原理與參照圖1和圖3描述的相似,這裡不再贅述。 Figure 7 corresponds to discontinuous conduction mode. In the example in Figure 7, during the time period Ton when the first switch Q1 is turned on, and during the time period (Tdem and Tzvs) when the second switch Q2 is turned on, the working principle of the asymmetric half-bridge flyback power supply It is similar to that described with reference to FIGS. 1 and 3 and will not be described again here.
圖7與圖3的不同之處在於:第一開關Q1接通的時間段Ton、第二開關Q2接通的時間段(Tdem和Tzvs)是根據檢測的回饋電壓(節點FB處的電壓)來確定的。即,圖7中的時間t0-t6可以根據回饋電壓而變化,以自我調整負載的大小。 The difference between Figure 7 and Figure 3 is that: the time period Ton during which the first switch Q1 is turned on and the time period (Tdem and Tzvs) during which the second switch Q2 is turned on are determined based on the detected feedback voltage (voltage at node FB). Definitely. That is, the time t0-t6 in Figure 7 can be changed according to the feedback voltage to self-adjust the size of the load.
例如,第一開關Q1接通的時間段Ton、第二開關Q2接通的時間段(Tdem和Tzvs)均可以是類似於圖6所述的適應於負載大小的時間段。 For example, the time period Ton during which the first switch Q1 is turned on and the time period (Tdem and Tzvs) during which the second switch Q2 is turned on may be time periods adapted to the load size similar to those described in FIG. 6 .
兩個死區時間段、即時間段t1-t2以及時間段t5-t6(第一死區時間段和第二死區時間段)可以分別具有固定時長。 The two dead time periods, namely the time period t1-t2 and the time period t5-t6 (the first dead time period and the second dead time period), may each have a fixed duration.
此外,圖7所示的具有低位準的信號DCM_on可以指示斷續導通模式。回應於信號DCM_on具有低位準,產生的gate_down信號可以使得Tdem和Tzvs為間隔一段時間(第三時間段、即時間t3-t4)的時間段。 In addition, the signal DCM_on having a low level shown in FIG. 7 may indicate the discontinuous conduction mode. In response to the signal DCM_on having a low level, the generated gate_down signal can cause Tdem and Tzvs to be a time period separated by a period of time (the third time period, ie, time t3-t4).
例如,回應於DEM_off信號在時間t3變為高位準(指示退磁結束),gate_down信號可立即使第二開關Q2斷開。之後,在信號DCM_on短暫變高的時間t4,gate_down信號使第二開關Q2再次接通。之後,在信號ZVS_off短暫變高的時間t5,gate_down信號使第二開關Q2再次斷開。然後,在經過死區時間t5-t6之後,在下一工作週期的起點t6,gate_up信號使第一開關Q1零電壓導通,以此類推。 For example, in response to the DEM_off signal becoming high at time t3 (indicating the end of demagnetization), the gate_down signal may immediately turn off the second switch Q2. Afterwards, at time t4 when the signal DCM_on briefly becomes high, the gate_down signal turns the second switch Q2 on again. Afterwards, at time t5 when the signal ZVS_off briefly becomes high, the gate_down signal causes the second switch Q2 to turn off again. Then, after the dead time t5-t6, at the starting point t6 of the next working cycle, the gate_up signal turns on the first switch Q1 with zero voltage, and so on.
通過上述方式,可以使得非對稱半橋返馳式電源在不同的輸入電壓、不同的輸出電壓及不同的輸出電流下,自動調節工作模式和工作頻率(即,調節Ton、Tdem、Tzvs以及工作週期Ts的大小),以適應不同的負載大小,提高工作效率。 Through the above method, the asymmetric half-bridge flyback power supply can automatically adjust the working mode and operating frequency (i.e., adjust Ton, Tdem, Tzvs and working cycle under different input voltages, different output voltages and different output currents). Ts size) to adapt to different load sizes and improve work efficiency.
參照圖5至圖7,零電壓切換控制模組ZVS control可如下確定圖6和圖7中的Tzvs的大小:其可檢測在第一開關Q1接通的時間點t0前後一段時間內的節點INV處的電壓,這段時間段內的節點INV處的電壓可以指示圖5的節點HB處的電壓、即可以指示第一開關Q1是否被零電壓接通;在通過節點INV處的電壓檢測到節點HB處的電壓在t0之前較長時間(例如,大於第一時間閾值)就達到了電壓Vin時,可以縮短Tzvs;在通過節點INV處的電壓檢測到節點HB處的電壓在t0之後才達到了電壓Vin時,可以增大Tzvs;在通過節點INV處的電壓檢測到節點HB處的電壓在t0附近(例如,在第一時間閾值與第二時間閾值之間)達到了電壓Vin時,可以使Tzvs保持不變。 Referring to Figures 5 to 7, the zero-voltage switching control module ZVS control can determine the size of Tzvs in Figures 6 and 7 as follows: It can detect the node INV within a period of time before and after the time point t0 when the first switch Q1 is turned on. The voltage at node INV during this period of time can indicate the voltage at node HB in Figure 5, that is, it can indicate whether the first switch Q1 is turned on by zero voltage; when the voltage at node INV is detected, the node When the voltage at HB reaches voltage Vin a long time before t0 (for example, greater than the first time threshold), Tzvs can be shortened; after detecting the voltage at node HB through the voltage at node INV, it reaches voltage Vin after t0 When the voltage Vin is at the voltage Vin, Tzvs can be increased; when it is detected through the voltage at the node INV that the voltage at the node HB reaches the voltage Vin near t0 (for example, between the first time threshold and the second time threshold), the Tzvs can be increased. Tzvs remains unchanged.
如此,可以保障在非對稱半橋返馳式電源的工作頻率變化時,也能夠使得第一開關Q1保持零電壓接通。應該理解,第二開關Q2的零電壓接通是經過死區時間段t1-t2才能實現的。 In this way, it can be ensured that when the operating frequency of the asymmetric half-bridge flyback power supply changes, the first switch Q1 can be kept on at zero voltage. It should be understood that the zero-voltage turn-on of the second switch Q2 can only be achieved after the dead time period t1-t2.
此外,通過以上圖5至圖7可以看出,可以通過DEM control 模組產生的DEM_off信號準確地指示退磁結束的時間t3。 In addition, as can be seen from Figures 5 to 7 above, we can use DEM control The DEM_off signal generated by the module accurately indicates the time t3 when demagnetization ends.
圖8示出了根據本發明的一個示例性實施例的圖5的電路中的退磁檢測模組(DEM control)的示意性電路圖。圖9示出了根據本發明的一個示例性實施例的與圖8的電路對應的信號的時序圖。 FIG. 8 shows a schematic circuit diagram of the demagnetization detection module (DEM control) in the circuit of FIG. 5 according to an exemplary embodiment of the present invention. FIG. 9 shows a timing diagram of signals corresponding to the circuit of FIG. 8 according to an exemplary embodiment of the present invention.
參照圖8和圖9,在第一開關Q1根據gate_up信號接通期間,退磁檢測模組(DEM control)的開關SW1可根據信號gate_up接通。在此期間,節點AUX處的電壓Vaux指示圖5的原邊電感Lp的電壓,但此時節點AUX處的電壓Vaux為負值。由於需要通過節點INV來檢測節點AUX處的電壓Vaux、進而檢測出原邊電感Lp的電壓,因此可首先通過連接到節點INV的負壓檢測模組將負值的電壓轉換為相應的正值電壓Vn,以便於檢測和後續處理。然後,通過sample1信號使開關SW2接通,以使轉換的正值的電壓Vn被電容C7採樣到,然後通過壓控電流源VCCS1(轉換比例gm1)轉換為對應的電流,並利用該電流在第一開關Q1根據gate_up信號接通期間對電容C6充電。因此,電容C6的充電量與非對稱半橋返馳式電源的原邊的充磁量對應。 Referring to FIGS. 8 and 9 , during the period when the first switch Q1 is turned on according to the gate_up signal, the switch SW1 of the demagnetization detection module (DEM control) may be turned on according to the signal gate_up. During this period, the voltage Vaux at the node AUX indicates the voltage of the primary inductor Lp in Figure 5, but at this time the voltage Vaux at the node AUX is negative. Since it is necessary to detect the voltage Vaux at the node AUX through the node INV, and then detect the voltage of the primary inductor Lp, the negative voltage can be first converted into the corresponding positive voltage through the negative voltage detection module connected to the node INV. Vn to facilitate detection and subsequent processing. Then, the switch SW2 is turned on through the sample1 signal, so that the converted positive voltage Vn is sampled by the capacitor C7, and then converted into the corresponding current through the voltage-controlled current source VCCS1 (conversion ratio gm1), and this current is used in the first A switch Q1 charges the capacitor C6 during the period when the gate_up signal is turned on. Therefore, the charging amount of capacitor C6 corresponds to the magnetizing amount of the primary side of the asymmetric half-bridge flyback power supply.
而在第二開關Q2根據gate_down信號接通期間,開關SW3可根據信號gate_down接通。在此期間,節點INV處的電壓指示圖5的副邊電感Ls的電壓,其具有正的電壓值。然後,通過sample2信號使開關SW4接通,以使節點INV處的電壓被電容C8採樣到,然後通過壓控電流源VCCS2(轉換比例gm2)轉換為對應的電流,並利用該電流在第二開關Q2根據gate_down信號接通期間對電容C6放電。因此,電容C6的放電量與非對稱半橋返馳式電源通過副邊的退磁量對應。 While the second switch Q2 is turned on according to the gate_down signal, the switch SW3 may be turned on according to the gate_down signal. During this period, the voltage at node INV indicates the voltage of the secondary inductor Ls of Figure 5, which has a positive voltage value. Then, the switch SW4 is turned on through the sample2 signal, so that the voltage at the node INV is sampled by the capacitor C8, and then converted into the corresponding current through the voltage-controlled current source VCCS2 (conversion ratio gm2), and this current is used in the second switch Q2 discharges capacitor C6 during the turn-on period of the gate_down signal. Therefore, the discharge amount of capacitor C6 corresponds to the demagnetization amount of the asymmetric half-bridge flyback power supply through the secondary side.
由此,可以通過適當地設置該電路中的參數(如下文參照圖12和圖13所述),而使得在退磁結束時使電容C6恰好結束放電、即電容C6的電壓Vc降為初始電壓Vdc。從而,可通過比較器comp在電容C6放電結束時產生高位準的DEM_off信號,來指示退磁結束的時間。圖8中的開關SW5可用於在電容C6放電結束後將其初始化為具有初始電壓Vdc。 Therefore, by appropriately setting the parameters in the circuit (as described below with reference to Figures 12 and 13), the capacitor C6 just ends discharging when demagnetization is completed, that is, the voltage Vc of the capacitor C6 drops to the initial voltage Vdc. . Therefore, the comparator comp can generate a high-level DEM_off signal when the capacitor C6 ends discharging to indicate the time when the demagnetization is completed. Switch SW5 in Figure 8 can be used to initialize capacitor C6 to have an initial voltage Vdc after it has finished discharging.
圖10示出了根據本發明的另一示例性實施例的圖5的電路中的退磁檢測模組的示意性電路圖。圖11示出了根據本發明的一個示例性實施例的與圖10的電路對應的信號的時序圖。 FIG. 10 shows a schematic circuit diagram of the demagnetization detection module in the circuit of FIG. 5 according to another exemplary embodiment of the present invention. FIG. 11 shows a timing diagram of signals corresponding to the circuit of FIG. 10 according to an exemplary embodiment of the present invention.
參照圖8至圖11,圖10與圖8的不同之處在於:在圖10中,開關SW1由charge_on信號來控制,而charge_on信號為在圖5的電阻電壓Vcs高於閾值電壓Vth(例如,該閾值電壓為表示原邊電感Lp開始穩定充磁的電壓)情況下的gate_on信號。 Referring to Figures 8 to 11, the difference between Figure 10 and Figure 8 is that in Figure 10, the switch SW1 is controlled by the charge_on signal, and the charge_on signal is when the resistor voltage Vcs in Figure 5 is higher than the threshold voltage Vth (for example, This threshold voltage is the gate_on signal when the primary side inductor Lp starts to be stably magnetized).
由此,可以進一步使得電容C6的充電時間段對應於原邊電感Lp的穩定充磁時間段,因而可以進一步提高確定退磁結束時間的精度。 Therefore, the charging time period of the capacitor C6 can be further made to correspond to the stable magnetization time period of the primary inductor Lp, so the accuracy of determining the demagnetization end time can be further improved.
圖12示出了根據本發明的一個示例性實施例的圖8或圖10中的退磁檢測模組中的負壓檢測模組的示意性電路圖。 FIG. 12 shows a schematic circuit diagram of the negative pressure detection module in the demagnetization detection module in FIG. 8 or 10 according to an exemplary embodiment of the present invention.
如圖12所示,負壓檢測模組中的“鉗位元”模組可以將節點INV處的電壓鉗位元在0V左右。由於在第一開關Q1接通期間,電壓Vaux為負值的電壓,因此,以上鉗位會使得在電阻R5上流過與電壓Vaux對應的第一電流。負壓檢測模組中的“電流檢測”模組產生與該第一電流成比例K的第二電流,第二電流流經電阻R7以及參考地。因此,圖12中的電壓Vn與流經電阻R7的第二電流對應、因而與流經電阻R5的第一電流對應、從而與節點AUX處的電壓Vaux對應。通過這種方式,即將節點AUX處的負值的電壓Vaux轉換為了對應的正值的電壓Vn,電壓Vn的具體值如下所述。 As shown in Figure 12, the "clamping element" module in the negative voltage detection module can clamp the voltage at the node INV to about 0V. Since the voltage Vaux is a negative voltage during the period when the first switch Q1 is turned on, the above clamping will cause the first current corresponding to the voltage Vaux to flow through the resistor R5. The "current detection" module in the negative voltage detection module generates a second current proportional to the first current K, and the second current flows through the resistor R7 and the reference ground. Therefore, the voltage Vn in FIG. 12 corresponds to the second current flowing through the resistor R7 and thus to the first current flowing through the resistor R5 and thus to the voltage Vaux at the node AUX. In this way, the negative voltage Vaux at the node AUX is converted into the corresponding positive voltage Vn. The specific value of the voltage Vn is as follows.
當第一開關Q1接通時,變壓器的原邊電感Lp的充磁電壓為Vin-NVo,與其耦合的繞組Waux的節點AUX處具有與Vin-NVo成正比的負值電壓Vaux。因此,上述電壓Vn可以由以下等式表示:
When the first switch Q1 is turned on, the magnetizing voltage of the primary inductance Lp of the transformer is Vin-NVo, and the node AUX of the winding Waux coupled to it has a negative voltage Vaux proportional to Vin-NVo. Therefore, the above voltage Vn can be expressed by the following equation:在以上等式(2)中,Vin表示非對稱半橋返馳式電源的輸入電壓,Vo表示非對稱半橋返馳式電源的輸出電壓,N為原邊電感Lp與副邊電感Ls的匝數比,Naux表示繞組Waux的匝數,Np表示原邊電感Lp的 匝數,R7表示電阻R7的電阻值,R5表示電阻R5的電阻值。由此,電壓Vn是與充磁電壓Vin-NVo相關的電壓。 In the above equation (2), Vin represents the input voltage of the asymmetric half-bridge flyback power supply, Vo represents the output voltage of the asymmetric half-bridge flyback power supply, and N is the turn of the primary inductor Lp and the secondary inductor Ls. Number ratio, Naux represents the number of turns of the winding Waux, Np represents the primary inductance Lp The number of turns, R7 represents the resistance value of resistor R7, and R5 represents the resistance value of resistor R5. Therefore, the voltage Vn is a voltage related to the magnetizing voltage Vin-NVo.
參照圖12和圖8,通過設置電阻R5-R7的阻值、壓控電流源VCCS1-VCCS2的將電壓轉換為電流的轉換比例gm1和gm2,可以實現圖8中的在退磁結束時使電容C6恰好放電結束。 Referring to Figure 12 and Figure 8, by setting the resistance values of resistors R5-R7 and the conversion ratios gm1 and gm2 of the voltage-controlled current sources VCCS1-VCCS2 to convert voltage into current, the capacitor C6 in Figure 8 can be realized at the end of demagnetization. Just when the discharge ends.
例如,在第一開關Q1接通的時間段Ton,原邊電感的充磁滿足以下伏秒平衡等式:Lp×(Ip+In)=(Vin-NVo)×Ton (3) For example, during the time period Ton when the first switch Q1 is turned on, the magnetization of the primary inductor satisfies the following volt-second balance equation: Lp×(Ip+In)=(Vin-NVo)×Ton (3)
在以上等式(3)中,Lp表示原邊電感的電感值,-In表示第一開關Q1接通時原邊電感的電流值,Ip表示原邊電感的最大電流值。 In the above equation (3), Lp represents the inductance value of the primary inductor, -In represents the current value of the primary inductor when the first switch Q1 is turned on, and Ip represents the maximum current value of the primary inductor.
在退磁期間,原邊電感的電流從Ip退到-In,原邊電感的退磁滿足以下伏秒平衡等式(4):Lp×(Ip+In)=NVo×Tdem (4) During the demagnetization period, the current of the primary inductor retreats from Ip to -In. The demagnetization of the primary inductor satisfies the following volt-second balance equation (4): Lp × (Ip + In) = NVo × Tdem (4)
由以上兩個伏秒平衡等式(3)和(4)可以得出退磁時間段Tdem滿足以下等式(5):Tdem=(Vin-NVo)×Ton/NVo (5) From the above two volt-second balance equations (3) and (4), it can be concluded that the demagnetization time period Tdem satisfies the following equation (5): Tdem=(Vin-NVo)×Ton/NVo (5)
而參照圖12,充磁階段的電壓Vn可以使得電容C6的充電電流Ic1為:
Referring to Figure 12, the voltage Vn in the magnetization stage can make the charging current Ic1 of capacitor C6 be:在以上等式(6)中,gm1表示壓控電流源VCCS1將電壓轉換為電流的比例。 In equation (6) above, gm1 represents the ratio of voltage to current converted by voltage-controlled current source VCCS1.
而在電容C6放電過程中,其的放電電流Ic2為:
During the discharge process of capacitor C6, its discharge current Ic2 is:在以上等式(7)中,Ns為副邊電感Ls的匝數。 In equation (7) above, Ns is the number of turns of the secondary inductor Ls.
結合等式(5)-(7)可以得出,如需使得在電容放電時間等於退磁時間Tdem,則圖8和圖12的電路的相關參數需要滿足以下等式 (8):
Combining equations (5)-(7), it can be concluded that if the capacitor discharge time needs to be equal to the demagnetization time Tdem, the relevant parameters of the circuits in Figures 8 and 12 need to satisfy the following equation (8):通過使用滿足以上等式(8)的上述參數來設置圖8和圖12所示的模組的電路,即可實現對退磁時間的準確檢測。 By setting the circuit of the module shown in Figures 8 and 12 using the above parameters that satisfy the above equation (8), accurate detection of the demagnetization time can be achieved.
圖13示出了根據本發明的另一示例性實施例的圖8或圖10中的退磁檢測模組中的負壓檢測模組的示意性電路圖。 FIG. 13 shows a schematic circuit diagram of the negative pressure detection module in the demagnetization detection module in FIG. 8 or 10 according to another exemplary embodiment of the present invention.
如圖13所示,可以通過運算放大器OP來將節點INV處的負值電壓轉換為正值電壓Vn,此時的Vn可以由以下等式(9)表示:
As shown in Figure 13, the negative voltage at node INV can be converted into a positive voltage Vn through the operational amplifier OP. At this time, Vn can be expressed by the following equation (9):在這種情況下,圖8中的電容C6的充電電流Ic1可以由以下等式(10)表示:
In this case, the charging current Ic1 of the capacitor C6 in Figure 8 can be expressed by the following equation (10):電容C6的放電電流Ic2不變,仍如等式(7)所示。結合等式(5)、等式(7)、等式(9)和等式(10)可以得出,如需使得在電容放電時間等於退磁時間Tdem,則圖8和圖13的電路的相關參數需要滿足gm1=gm2。 The discharge current Ic2 of capacitor C6 remains unchanged and is still as shown in equation (7). Combining Equation (5), Equation (7), Equation (9) and Equation (10), it can be concluded that if it is necessary to make the capacitor discharge time equal to the demagnetization time Tdem, then the correlation between the circuits in Figure 8 and Figure 13 The parameters need to satisfy gm1=gm2.
應該理解,以上各個示圖僅示出並描述了與本發明的電路200的應用相關的電路元件,本領域技術人員根據本發明的示例可以容易地獲知未被詳細描述的其他電路元件的功能。 It should be understood that each of the above figures only shows and describes circuit elements relevant to the application of the circuit 200 of the present invention, and those skilled in the art can easily understand the functions of other circuit elements that are not described in detail based on the examples of the present invention.
根據本發明的示例性實施例的用於非對稱半橋返馳式電源的電路,能夠根據所連接的負載的工作電壓,來調節非對稱半橋返馳式電源的工作模式和工作頻率,能夠準確地檢測退磁結束時間,並能夠準確地控制開關的零電壓接通,而使得非對稱半橋返馳式電源能夠自我調整負載的大小,提高工作效率。 The circuit for an asymmetric half-bridge flyback power supply according to an exemplary embodiment of the present invention can adjust the operating mode and operating frequency of the asymmetric half-bridge flyback power supply according to the operating voltage of a connected load, and can It can accurately detect the demagnetization end time and accurately control the zero-voltage turn-on of the switch, so that the asymmetric half-bridge flyback power supply can self-adjust the size of the load and improve work efficiency.
應該理解,本發明並不局限於上文所描述並在圖中示出的特 定配置和處理。為了簡明起見,這裡省略了對已知方法的詳細描述。在上述實施例中,描述和示出了若干具體的步驟作為示例。但是,本發明的方法過程並不限於所描述和示出的具體步驟,本領域的技術人員可以在領會本發明的精神後,作出各種改變、修改和添加,或者改變步驟之間的順序。 It should be understood that the present invention is not limited to the particulars described above and illustrated in the drawings. configuration and processing. For the sake of brevity, detailed descriptions of known methods are omitted here. In the above embodiments, several specific steps are described and shown as examples. However, the method process of the present invention is not limited to the specific steps described and shown. Those skilled in the art can make various changes, modifications and additions, or change the order between steps after understanding the spirit of the present invention.
以上所述的結構框圖中所示的功能塊可以實現為硬體、軟體、固件或者它們的組合。當以硬體方式實現時,其可以例如是電子電路、專用集成電路(Application Specific Integrated Circuit,ASIC)、適當的韌體、外掛程式、功能卡等。當以軟體方式實現時,本發明的元素是被用於執行所需任務的程式或者程式碼片段。程式或者程式碼片段可以存儲在機器可讀介質中,或者通過載波中攜帶的資料信號在傳輸介質或者通信鏈路上傳送。“機器可讀介質”可以包括能夠存儲或傳輸資訊的任何介質。機器可讀介質的示例包括電子電路、半導體記憶體設備、唯讀記憶體(Read-Only Memory,ROM)、快閃記憶體、可擦除ROM(Erasable Read Only Memory,EROM)、軟碟、光碟唯讀記憶體(Compact Disc Read-Only Memory,CD-ROM)、光碟、硬碟、光纖介質、射頻(Radio Frequency,RF)鏈路等。程式碼片段可以經由諸如網際網路、內聯網等的電腦網路被下載。 The functional blocks shown in the above structural block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it may be, for example, an electronic circuit, an Application Specific Integrated Circuit (ASIC), appropriate firmware, a plug-in program, a function card, etc. When implemented in software, elements of the invention are programs or program code fragments that are used to perform the required tasks. The program or program code fragments may be stored in a machine-readable medium, or transmitted over a transmission medium or communications link via a data signal carried in a carrier wave. "Machine-readable medium" can include any medium that can store or transmit information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, read-only memory (ROM), flash memory, erasable ROM (Erasable Read Only Memory, EROM), floppy disks, and optical disks Read-only memory (Compact Disc Read-Only Memory, CD-ROM), optical disc, hard disk, optical fiber media, radio frequency (Radio Frequency, RF) link, etc. Code snippets can be downloaded via computer networks such as the Internet, intranets, etc.
本發明可以以其他的具體形式實現,而不脫離其精神和本質特徵。例如,特定實施例中所描述的演算法可以被修改,而系統體系結構並不脫離本發明的基本精神。因此,當前的實施例在所有方面都被看作是示例性的而非限定性的,本發明的範圍由所附請求項而非上述描述定義,並且,落入請求項的含義和等同物的範圍內的全部改變從而都被包括在本發明的範圍之中。 The present invention may be implemented in other specific forms without departing from its spirit and essential characteristics. For example, algorithms described in specific embodiments may be modified without departing from the basic spirit of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being defined by the appended claims rather than the foregoing description, and the meanings and equivalents falling within the claims. All changes within the scope are therefore included in the scope of the invention.