TWI861528B - Power supply system - Google Patents

A power supply system includes a power factor correction conversion circuit and an isolated power conversion circuit, wherein the power factor correction conversion circuit is configured to correct the power factor of a rectified power to generate a first output power, the isolated power conversion circuit is configured to convert the first output power to generate a second output power. The isolated power conversion circuit includes a transformer, a primary side switch circuit, and a secondary side switch circuit, wherein the transformer includes a primary winding, a secondary winding, and an auxiliary winding. The auxiliary winding is configured to generate an auxiliary voltage, wherein the auxiliary voltage is related to the second output power. When the auxiliary voltage is lower than a disabled threshold, indicating that the voltage of the second output power is lower than a predetermined voltage, the power factor correction conversion circuit provides a bypasses connection between the rectified power and the first output power to stop correcting the power factor of the rectified power.

電源供應系統Power supply system

本發明係有關一種系統，特別是指一種電源供應系統。 The present invention relates to a system, in particular to a power supply system.

依據最新USB PD EPR(Extend Power Range)的協議，現行USB PD充電器的最大輸出功率可以達到240瓦(W)，其中最大輸出電壓為48伏特(V)，最大輸出電流為5安培(A)。又依據諧波電流干擾規範(IEC61000-3-2)，輸出功率高於75瓦的USB PD充電器必須具有功率因數校正轉換器(PFC converter)以修正一輸入電源之功率因數(power factor)，進而最大限度地減少線路頻率諧波(line-frequency harmonics)。然而，當USB PD充電器之輸出功率低於75瓦時，功率因數校正轉換器會使得USB PD充電器產生額外的功耗。 According to the latest USB PD EPR (Extend Power Range) protocol, the maximum output power of current USB PD chargers can reach 240 watts (W), with a maximum output voltage of 48 volts (V) and a maximum output current of 5 amperes (A). According to the harmonic current interference standard (IEC61000-3-2), USB PD chargers with an output power higher than 75 watts must have a power factor correction converter (PFC converter) to correct the power factor of an input power source, thereby minimizing line-frequency harmonics. However, when the output power of a USB PD charger is lower than 75 watts, the power factor correction converter will cause the USB PD charger to generate additional power consumption.

有鑑於此，本發明即針對上述先前技術之不足，提出一種電源供應系統，於電源供應系統之輸出功率低於一輸出功率閾值時(例如小於75瓦時)禁能(disable)功率因數校正轉換器以停止校正所述輸入電源之功率因數，進而降低電源供應系統之功率損耗。 In view of this, the present invention aims at the above-mentioned shortcomings of the prior art and proposes a power supply system, which disables the power factor correction converter to stop correcting the power factor of the input power when the output power of the power supply system is lower than an output power threshold (for example, less than 75 watts), thereby reducing the power loss of the power supply system.

本發明提供了一種電源供應系統，包含：一功因修正轉換電路，用以修正一整流電源之功率因數而產生一第一輸出電源；以及一隔離式電源轉換電路，用以轉換該第一輸出電源而產生一第二輸出電源，包括：一變壓器，包括一一次繞組、一二次繞組以及一輔助繞組，該輔助繞組用以產生一輔助電壓，其中該輔助電壓相關於該第二輸出電源；一一次側切換電路，耦接該一次繞組及該第一輸出電源；以及一二次側切換電路，耦接該二次繞組及該第二輸出電源；其中，當該輔助電壓低於一禁能閾值而示意該第二輸出電源之電壓低於一輸出電壓閾值時，該功因修正轉換電路旁通該整流電源與該第一輸出電源之間以停止修正該整流電源之功率因數，進而降低該電源供應系統之功率損耗。 The present invention provides a power supply system, comprising: a power factor correction conversion circuit, used to correct the power factor of a rectified power supply to generate a first output power supply; and an isolated power conversion circuit, used to convert the first output power supply to generate a second output power supply, including: a transformer, including a primary winding, a secondary winding and an auxiliary winding, the auxiliary winding is used to generate an auxiliary voltage, wherein the auxiliary voltage is related to the second output power supply; A primary switching circuit is coupled to the primary winding and the first output power source; and a secondary switching circuit is coupled to the secondary winding and the second output power source; wherein, when the auxiliary voltage is lower than a disable threshold value, indicating that the voltage of the second output power source is lower than an output voltage threshold value, the power factor correction conversion circuit bypasses the rectifier power source and the first output power source to stop correcting the power factor of the rectifier power source, thereby reducing the power loss of the power supply system.

在一些實施例中，上述該功因修正轉換電路包括：一升壓型功率級電路，包括彼此耦接之一電感器及複數開關，其中該電感器耦接於該整流電源與一切換節點之間；以及一功因修正控制電路，用以控制該些開關中的至少之一以切換該電感器，進而轉換該整流電源而產生該第一輸出電源；其中，當該輔助電壓低於該禁能閾值時，該功因修正控制電路控制該些開關中的至少之一，進而旁通該整流電源與該第一輸出電源，以停止修正該整流電源之功率因數。 In some embodiments, the power factor correction conversion circuit includes: a boost power stage circuit, including an inductor and a plurality of switches coupled to each other, wherein the inductor is coupled between the rectifier power source and a switching node; and a power factor correction control circuit, used to control at least one of the switches to switch the inductor, thereby converting the rectifier power source to generate the first output power source; wherein, when the auxiliary voltage is lower than the disable threshold, the power factor correction control circuit controls at least one of the switches, thereby bypassing the rectifier power source and the first output power source to stop correcting the power factor of the rectifier power source.

在一些實施例中，上述該些開關包括一上橋開關以及一下橋開關，其中該上橋開關耦接於該切換節點與該第一輸出電源之間，該下橋開關耦接於該切換節點與一接地電位之間；其中，當該輔助電壓低於該禁能閾值時，該功因修正控制電路控制該上橋開關導通及該下橋開關不導通，進而旁通該整流電源與該第一輸出電源以停止修正該整流電源之功率因數。 In some embodiments, the switches include an upper bridge switch and a lower bridge switch, wherein the upper bridge switch is coupled between the switching node and the first output power source, and the lower bridge switch is coupled between the switching node and a ground potential; wherein, when the auxiliary voltage is lower than the disable threshold, the power factor correction control circuit controls the upper bridge switch to be turned on and the lower bridge switch to be turned off, thereby bypassing the rectifier power source and the first output power source to stop correcting the power factor of the rectifier power source.

在一些實施例中，上述該升壓型功率級電路更包括一旁通開關，該旁通開關耦接於該整流電源與該第一輸出電源之間；其中，當該輔助 電壓低於該禁能閾值時，該功因修正控制電路控制該旁通開關導通，進而旁通該整流電源與該第一輸出電源以停止修正該整流電源之功率因數。 In some embodiments, the boost power stage circuit further includes a bypass switch coupled between the rectifier power source and the first output power source; wherein, when the auxiliary voltage is lower than the disable threshold, the power factor correction control circuit controls the bypass switch to conduct, thereby bypassing the rectifier power source and the first output power source to stop correcting the power factor of the rectifier power source.

在一些實施例中，上述電源供應系統更包含：一輔助二極體，用以整流該輔助電壓而產生一整流後輔助電壓；以及一輔助電容器，用以濾波該整流後輔助電壓；其中，該整流後輔助電壓用以提供該功因修正控制電路於操作時所需的電源，及/或該功因修正控制電路根據該整流後輔助電壓以判斷該輔助電壓是否低於該禁能閾值。 In some embodiments, the power supply system further includes: an auxiliary diode for rectifying the auxiliary voltage to generate a rectified auxiliary voltage; and an auxiliary capacitor for filtering the rectified auxiliary voltage; wherein the rectified auxiliary voltage is used to provide the power required by the power factor correction control circuit during operation, and/or the power factor correction control circuit determines whether the auxiliary voltage is lower than the disable threshold value according to the rectified auxiliary voltage.

在一些實施例中，上述電源供應系統更包含一分壓電路，該分壓電路用以分壓該輔助電壓而產生一感測電壓，其中該功因修正控制電路根據該感測電壓以判斷該輔助電壓是否低於該禁能閾值。 In some embodiments, the power supply system further includes a voltage divider circuit, which is used to divide the auxiliary voltage to generate a sensing voltage, wherein the power factor correction control circuit determines whether the auxiliary voltage is lower than the disable threshold according to the sensing voltage.

在一些實施例中，上述該功因修正控制電路更包括一取樣維持電路，用以於該輔助電壓之下降緣取樣維持該輔助電壓而產生一輔助取樣維持電壓，其中該功因修正控制電路根據該輔助取樣維持電壓以判斷該輔助電壓是否低於該禁能閾值。 In some embodiments, the power factor correction control circuit further includes a sampling and holding circuit for sampling and maintaining the auxiliary voltage at the falling edge of the auxiliary voltage to generate an auxiliary sampling and holding voltage, wherein the power factor correction control circuit determines whether the auxiliary voltage is lower than the disable threshold value according to the auxiliary sampling and holding voltage.

在一些實施例中，上述該功因修正控制電路於該輔助電壓之上升緣經過一延遲時間後，判斷該輔助電壓是否低於該禁能閾值。 In some embodiments, the power factor correction control circuit determines whether the auxiliary voltage is lower than the disable threshold after a delay time from the rising edge of the auxiliary voltage.

在一些實施例中，上述該隔離式電源轉換電路符合一電源供電規範，使得該第二輸出電源具有一輸出電流上限值，其中該輸出電壓閾值由一輸出功率閾值及該輸出電流上限值而計算。 In some embodiments, the isolated power conversion circuit complies with a power supply specification, so that the second output power has an output current upper limit value, wherein the output voltage threshold is calculated by an output power threshold value and the output current upper limit value.

在一些實施例中，上述電源供應系統更包含符合通用序列匯流排供電規範之一匯流排控制電路，其中當該電源供應系統與一負載裝置透過一匯流排彼此耦接時，該匯流排控制電路根據該負載裝置透過該匯流排所傳送之至少一指令調整該第二輸出電源之電壓；其中，當該輔助電壓低 於該禁能閾值而示意該第二輸出電源之電壓低於一輸出電壓閾值時，進而示意該第二輸出電源之功率低於該輸出功率閾值。 In some embodiments, the power supply system further includes a bus control circuit that complies with the universal serial bus power supply specification, wherein when the power supply system and a load device are coupled to each other through a bus, the bus control circuit adjusts the voltage of the second output power source according to at least one instruction transmitted by the load device through the bus; wherein, when the auxiliary voltage is lower than the disable threshold, indicating that the voltage of the second output power source is lower than an output voltage threshold, it further indicates that the power of the second output power source is lower than the output power threshold.

在一些實施例中，上述電源供應系統更包含一二次側控制電路，用以根據該指令以控制該隔離式電源轉換電路調整該第二輸出電源之電壓。 In some embodiments, the power supply system further includes a secondary side control circuit for controlling the isolated power conversion circuit to adjust the voltage of the second output power according to the instruction.

在一些實施例中，上述該隔離式電源轉換電路為一返馳式電源轉換器、一非對稱半橋返馳式電源轉換器、一半橋電感-電感-電容型返馳式電源轉換器或一全橋電感-電感-電容型返馳式電源轉換器。 In some embodiments, the isolated power conversion circuit is a flyback power converter, an asymmetric half-bridge flyback power converter, a half-bridge inductor-inductor-capacitor flyback power converter, or a full-bridge inductor-inductor-capacitor flyback power converter.

以下將藉由具體實施例詳加說明，以更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。 The following will be explained in detail through specific embodiments to make it easier to understand the purpose, technical content, features and effects of the present invention.

10:電源供應系統 10: Power supply system

100:功因修正轉換電路 100: Power factor correction conversion circuit

110:升壓型功率級電路 110: Boost power stage circuit

120:功因修正控制電路 120: Power factor correction control circuit

120A:功因修正控制電路 120A: Power factor correction control circuit

120B:功因修正控制電路 120B: Power factor correction control circuit

121:比較器 121: Comparator

122:及閘 122: And the gate

123A、123B:緩衝器 123A, 123B: Buffer

124:逆變器 124: Inverter

125:脈寬調變產生電路 125: Pulse width modulation generation circuit

126:穩壓器 126: Voltage regulator

127:取樣維持電路 127: Sampling and holding circuit

1271:比較器 1271: Comparator

1272:延遲器 1272: Delay device

130:回授電路 130: Feedback circuit

200:隔離式電源轉換電路 200:Isolated power conversion circuit

200A-200C:隔離式電源轉換電路 200A-200C:Isolated power conversion circuit

210:一次側切換電路 210: Primary side switching circuit

210A:一次側切換電路 210A: Primary side switching circuit

211:一次側控制電路 211: Primary side control circuit

220:變壓器 220: Transformer

221:一次繞組 221: Single winding

222:二次繞組 222: Secondary winding

223:輔助繞組 223: Auxiliary winding

230:二次側切換電路 230: Secondary side switching circuit

231:二次側控制電路 231: Secondary side control circuit

240:分壓電路 240: Voltage divider circuit

300:匯流排介面電路 300: Bus interface circuit

310:匯流排控制電路 310: Bus control circuit

320:匯流排 320: Bus

330:光耦合電路 330: Optocoupler circuit

t1-t3:時點 t1-t3: time point

AS:及閘訊號 AS: and gate signal

Bled:發光電晶體 Bled: light-emitting transistor

C1-C10:腳位 C1-C10: Foot position

Caux:輔助電容器 Caux: Auxiliary capacitor

Ci:輸入電容器 Ci: Input capacitor

Co:輸出電容器 Co: output capacitor

Cpd:匯流排電容器 Cpd: Bus capacitor

Csh:取樣維持電容器 Csh: Sampling holding capacitor

CC1-CC2:指令訊號 CC1-CC2: command signal

CMP:比較訊號 CMP: Comparison signal

CMP_sh:取樣維持比較訊號 CMP_sh: Sample and maintain comparison signal

Daux:輔助二極體 Daux: auxiliary diode

Dled:發光二極體 Dled: light emitting diode

G1-G6:控制訊號 G1-G6: control signal

Gsh:控制訊號 Gsh: control signal

GND:接地電位 GND: Ground potential

L:電感器 L: Inductor

LX:切換節點 LX: Switch node

Q1:上橋開關 Q1: Bridge switch

Q2:下橋開關 Q2: Lower bridge switch

Q3:一次側開關 Q3: Primary side switch

Q4:二次側開關 Q4: Secondary side switch

Q5:旁通開關 Q5: Bypass switch

Q6:匯流排開關 Q6: Bus switch

Qsh:取樣維持開關 Qsh: sampling hold switch

Rfb1-Rfb2:電阻器 Rfb1-Rfb2: Resistor

Raux1-Raux2:電阻器 Raux1-Raux2: Resistor

S100-S600:步驟 S100-S600: Steps

Spwm:脈寬調變訊號 Spwm: pulse width modulation signal

Td:延遲時間 Td: Delay time

V3:一次側電壓 V3: primary side voltage

Vaux:輔助電壓 Vaux: Auxiliary voltage

Vaux_sh:輔助取樣維持電壓 Vaux_sh: Auxiliary sampling holding voltage

Vauxi:感測電壓 Vauxi: Sense voltage

Vaus_rec:整流輔助電壓 Vaus_rec: Rectification auxiliary voltage

Vfb:回授電壓 Vfb: Feedback voltage

Vfb_led:光耦合回授訊號 Vfb_led: optical coupling feedback signal

Vfb_led’:光耦合回授訊號 Vfb_led’: Optically coupled feedback signal

Vth_dis:禁能閾值 Vth_dis: disable threshold

Vth_sh:取樣維持閾值 Vth_sh: sampling and maintaining threshold value

Vth_vo:輸出電壓閾值 Vth_vo: output voltage threshold

VBUS:匯流排電源 VBUS: bus power

VCC:供電電源 VCC: power supply

VOUT1:第一輸出電源 VOUT1: first output power

VOUT2:第二輸出電源 VOUT2: Second output power supply

VREC:整流電源 VREC: Rectifier power supply

Z1:齊納二極體 Z1: Zener diode

圖1是本發明之一實施例中，電源供應系統的模組方塊圖。 Figure 1 is a module block diagram of a power supply system in one embodiment of the present invention.

圖2是本發明之一實施例中，功因修正轉換電路的電路示意圖。 FIG2 is a circuit diagram of a power factor correction conversion circuit in one embodiment of the present invention.

圖3是本發明之一實施例中，功因修正控制電路的電路示意圖。 FIG3 is a circuit diagram of a power factor correction control circuit in one embodiment of the present invention.

圖4是本發明之一實施例中，隔離式電源轉換電路的電路示意圖。 Figure 4 is a schematic diagram of an isolated power conversion circuit in one embodiment of the present invention.

圖5是本發明之一實施例中，隔離式電源轉換電路的電壓波形圖。 Figure 5 is a voltage waveform diagram of an isolated power conversion circuit in one embodiment of the present invention.

圖6A是本發明之一些實施例中，電源供應系統的運作流程圖(一)。 Figure 6A is a flowchart of the operation of the power supply system in some embodiments of the present invention (I).

圖6B是本發明之一些實施例中，電源供應系統的運作流程圖(二)。 Figure 6B is a flowchart of the operation of the power supply system in some embodiments of the present invention (II).

圖7是本發明之一實施例中，升壓型功率級電路的電路示意圖。 FIG7 is a circuit diagram of a boost-type power stage circuit in one embodiment of the present invention.

圖8A是本發明之另一實施例中，隔離式電源轉換電路的電路示意圖(一)。 FIG8A is a circuit diagram of an isolated power conversion circuit in another embodiment of the present invention (I).

圖8B是本發明之另一實施例中，功因修正控制電路的電路示意圖(一)。 FIG8B is a circuit diagram of a power factor correction control circuit in another embodiment of the present invention (I).

圖9是本發明之另一實施例中，隔離式電源轉換電路的電路示意圖(二)。 Figure 9 is a circuit diagram of an isolated power conversion circuit in another embodiment of the present invention (II).

圖10A是本發明之另一實施例中，功因修正控制電路的電路示意圖(二)。 FIG. 10A is a circuit diagram of a power factor correction control circuit in another embodiment of the present invention (II).

圖10B是本發明之一實施例中，取樣維持電路的電路示意圖。 FIG. 10B is a circuit diagram of a sampling and holding circuit in one embodiment of the present invention.

圖11A是本發明之一實施例中，匯流排控制電路的電路示意圖。 FIG. 11A is a circuit diagram of a bus control circuit in one embodiment of the present invention.

圖11B是本發明之一實施例中，一次側切換電路的電路示意圖。 FIG11B is a circuit diagram of a primary switching circuit in one embodiment of the present invention.

圖12A至圖12C是本發明之一些實施例中，隔離式電源轉換電路的電路示意圖。 Figures 12A to 12C are schematic circuit diagrams of isolated power conversion circuits in some embodiments of the present invention.

圖13是本發明之一些實施例中，電源供應系統的電壓波形圖。 Figure 13 is a voltage waveform diagram of the power supply system in some embodiments of the present invention.

圖14是本發明之一些實施例中，輔助電壓的電壓波形圖。 FIG14 is a voltage waveform diagram of the auxiliary voltage in some embodiments of the present invention.

本發明中的圖式均屬示意，主要意在表示各電路間之耦接關係，以及各訊號波形之間之關係，至於電路、訊號波形與頻率則並未依照比 例繪製。為明確說明起見，許多實務上的細節將在以下敘述中一併說明，但這並不旨在限制本發明的申請專利範圍。 The figures in this invention are schematic, and are mainly intended to show the coupling relationship between the circuits and the relationship between the signal waveforms. The circuits, signal waveforms and frequencies are not drawn to scale. For the sake of clarity, many practical details will be described in the following description, but this is not intended to limit the scope of the patent application of this invention.

請參照圖1，圖1是本發明之一實施例中，電源供應系統10的模組方塊圖。如圖1所示，電源供應系統10包含一功因修正轉換電路100及一隔離式電源轉換電路200，其中功因修正轉換電路100用以修正一整流電源VREC之功率因數(Power Factor，PF)而產生一第一輸出電源VOUT1，隔離式電源轉換電路200用以轉換第一輸出電源VOUT1而產生一第二輸出電源VOUT2。以下將詳細解釋功因修正轉換電路100及隔離式電源轉換電路200各自的結構與功能，並說明彼此間的設置方式。 Please refer to FIG. 1, which is a module block diagram of a power supply system 10 in one embodiment of the present invention. As shown in FIG. 1, the power supply system 10 includes a power factor correction conversion circuit 100 and an isolated power conversion circuit 200, wherein the power factor correction conversion circuit 100 is used to correct the power factor (Power Factor, PF) of a rectifier power supply VREC to generate a first output power supply VOUT1, and the isolated power conversion circuit 200 is used to convert the first output power supply VOUT1 to generate a second output power supply VOUT2. The following will explain in detail the structure and function of the power factor correction conversion circuit 100 and the isolated power conversion circuit 200, and explain the configuration method between each other.

請參照圖2，圖2是本發明之一實施例中，功因修正轉換電路100的電路示意圖，其中功因修正轉換電路100包括一升壓型功率級電路110及一功因修正控制電路120。如圖2所示，在一些實施例中，升壓型功率級電路110包括一輸入電容器Ci、一電感器L、一上橋開關Q1、一下橋開關Q2以及一輸出電容器Co，其中輸入電容器Ci耦接於整流電源VREC與接地電位之間，電感器L耦接於整流電源VREC與一切換節點LX之間，上橋開關Q1耦接於切換節點LX與第一輸出電源VOUT1之間，下橋開關Q2耦接於切換節點LX與接地電位之間，輸出電容器Co耦接於第一輸出電源VOUT1與接地電位之間。 Please refer to FIG. 2 , which is a schematic circuit diagram of a power factor correction conversion circuit 100 in an embodiment of the present invention, wherein the power factor correction conversion circuit 100 includes a boost power stage circuit 110 and a power factor correction control circuit 120. As shown in FIG. 2 , in some embodiments, the boost power stage circuit 110 includes an input capacitor Ci, an inductor L, an upper bridge switch Q1, a lower bridge switch Q2, and an output capacitor Co, wherein the input capacitor Ci is coupled between the rectifier power supply VREC and the ground potential, the inductor L is coupled between the rectifier power supply VREC and a switching node LX, the upper bridge switch Q1 is coupled between the switching node LX and the first output power supply VOUT1, the lower bridge switch Q2 is coupled between the switching node LX and the ground potential, and the output capacitor Co is coupled between the first output power supply VOUT1 and the ground potential.

在一些實施例中，功因修正轉換電路100更包括一回授電路130，其中回授電路130用以根據第一輸出電源VOUT1而產生一回授電壓Vfb，且第一輸出電源VOUT1之電壓與回授電壓Vfb之間具有一比例關係。如圖2所示，在一些實施例中，回授電路130包括二個電阻器Rfb1、Rfb2，其中電阻器Rfb1之值與電阻器Rfb2之值係決定第一輸出電源VOUT1之電壓與回授電壓Vfb之間的比例關係。舉例來說，當電阻器Rfb1之值為4千歐姆(kΩ) 且電阻器Rfb2之值為1千歐姆時，第一輸出電源VOUT1之電壓與回授電壓Vfb之間的比例關係為5比1，也就是說第一輸出電源VOUT1之電壓值為回授電壓Vfb之值的5倍。 In some embodiments, the power factor correction conversion circuit 100 further includes a feedback circuit 130, wherein the feedback circuit 130 is used to generate a feedback voltage Vfb according to the first output power VOUT1, and there is a proportional relationship between the voltage of the first output power VOUT1 and the feedback voltage Vfb. As shown in FIG2, in some embodiments, the feedback circuit 130 includes two resistors Rfb1 and Rfb2, wherein the value of the resistor Rfb1 and the value of the resistor Rfb2 determine the proportional relationship between the voltage of the first output power VOUT1 and the feedback voltage Vfb. For example, when the value of resistor Rfb1 is 4 kiloohms (kΩ) and the value of resistor Rfb2 is 1 kiloohm, the ratio between the voltage of the first output power source VOUT1 and the feedback voltage Vfb is 5 to 1, which means that the voltage value of the first output power source VOUT1 is 5 times the value of the feedback voltage Vfb.

請參照圖3，圖3是本發明之一實施例中，功因修正控制電路120的電路示意圖，其中功因修正控制電路120用以產生控制訊號G1、G2以分別控制上橋開關Q1及下橋開關Q2，進而切換電感器L以將整流電源VREC轉換為第一輸出電源VOUT1。如圖3所示，在一些實施例中，功因修正控制電路120包括一比較器121、一及閘122、複數緩衝器123A、123B、一逆變器124以及一脈寬調變產生電路125，其中比較器121用以比較一輔助電壓Vaux及一禁能閾值Vth_dis而產生一比較訊號CMP，及閘122用以根據比較訊號CMP及一脈寬調變訊號Spwm而產生一及閘訊號AS，緩衝器123A用以接收及閘訊號AS而產生控制訊號G2，緩衝器123B及逆變器124用以接收及閘訊號AS而產生控制訊號G1，脈寬調變產生電路125用以接收回授電壓Vfb而產生脈寬調變訊號Spwm。 Please refer to FIG. 3 , which is a schematic circuit diagram of a power factor correction control circuit 120 in one embodiment of the present invention, wherein the power factor correction control circuit 120 is used to generate control signals G1 and G2 to control the upper bridge switch Q1 and the lower bridge switch Q2 respectively, thereby switching the inductor L to convert the rectified power VREC into the first output power VOUT1. As shown in FIG. 3 , in some embodiments, the power factor correction control circuit 120 includes a comparator 121, a gate 122, a plurality of buffers 123A, 123B, an inverter 124, and a pulse width modulation generation circuit 125, wherein the comparator 121 is used to compare an auxiliary voltage Vaux and a disable threshold Vth_dis to generate a comparison signal CMP, and the gate 122 is used to generate a comparison signal CMP. A gate signal AS is generated according to a comparison signal CMP and a pulse width modulation signal Spwm. The buffer 123A is used to receive the gate signal AS to generate a control signal G2. The buffer 123B and the inverter 124 are used to receive the gate signal AS to generate a control signal G1. The pulse width modulation generation circuit 125 is used to receive the feedback voltage Vfb to generate the pulse width modulation signal Spwm.

請參照圖4，圖4是本發明之一實施例中，隔離式電源轉換電路200的電路示意圖，其中隔離式電源轉換電路200包括一一次側切換電路210、變壓器220及一二次側切換電路230。如圖4所示，在一些實施例中，一次側切換電路210包括一一次側控制電路211以及一一次側開關Q3，變壓器220包括一一次繞組221、一二次繞組222以及一輔助繞組223，二次側切換電路230包括一二次側控制電路231以及一二次側開關Q4，其中一次側切換電路210耦接一次繞組221及第一輸出電源VOUT1，二次側切換電路230耦接二次繞組222及第二輸出電源VOUT2。隔離式電源轉換電路200係透過變壓器220之一次繞組221及二次繞組222將第一輸出電源VOUT1轉換為第二輸出電源VOUT2，其中第一輸出電源VOUT1與第二輸出電源VOUT2之間具有一 比例關係，且所述比例關係相關於一次繞組221與二次繞組222之間的匝數比(turns ratio)。變壓器220之結構與功能係為本發明所屬技術領域中具有通常知識者所習知，故不贅述。 Please refer to FIG. 4 , which is a schematic circuit diagram of an isolated power conversion circuit 200 in one embodiment of the present invention, wherein the isolated power conversion circuit 200 includes a primary-side switching circuit 210, a transformer 220, and a secondary-side switching circuit 230. As shown in FIG. 4 , in some embodiments, the primary switching circuit 210 includes a primary control circuit 211 and a primary switch Q3, the transformer 220 includes a primary winding 221, a secondary winding 222, and an auxiliary winding 223, and the secondary switching circuit 230 includes a secondary control circuit 231 and a secondary switch Q4, wherein the primary switching circuit 210 is coupled to the primary winding 221 and the first output power VOUT1, and the secondary switching circuit 230 is coupled to the secondary winding 222 and the second output power VOUT2. The isolated power conversion circuit 200 converts the first output power VOUT1 into the second output power VOUT2 through the primary winding 221 and the secondary winding 222 of the transformer 220, wherein the first output power VOUT1 and the second output power VOUT2 have a proportional relationship, and the proportional relationship is related to the turns ratio between the primary winding 221 and the secondary winding 222. The structure and function of the transformer 220 are known to those with ordinary knowledge in the technical field to which the present invention belongs, so it is not elaborated.

在一些實施例中，當隔離式電源轉換電路200將第一輸出電源VOUT1轉換為第二輸出電源VOUT2時，一次側控制電路211用以產生控制訊號G3以控制一次側開關Q3之導通狀態，且二次側控制電路231用以產生控制訊號G4以控制二次側開關Q4之導通狀態，其中二次側控制電路為同步整流(synchronous rectification)控制器，以提高功率轉換效率。當一次側開關Q3導通時，第一輸出電源VOUT1之第一輸出電流對一次側繞組221儲能，此時二次側控制電路231產生之控制訊號G4控制二次側開關Q4不導通；當一次側開關Q3不導通時，會在二次側繞組222感應產生二次側感應電流，而流經二次側開關Q4中的內接二極體(body diode)，二次側控制電路231根據二次側開關Q4的汲極電壓的變化，而感測到二次側感應電流的產生，而據以產生控制訊號G4以控制二次側開關Q4導通。 In some embodiments, when the isolated power conversion circuit 200 converts the first output power VOUT1 into the second output power VOUT2, the primary-side control circuit 211 is used to generate a control signal G3 to control the conduction state of the primary-side switch Q3, and the secondary-side control circuit 231 is used to generate a control signal G4 to control the conduction state of the secondary-side switch Q4, wherein the secondary-side control circuit is a synchronous rectification controller to improve power conversion efficiency. When the primary switch Q3 is turned on, the first output current of the first output power source VOUT1 stores energy in the primary winding 221. At this time, the control signal G4 generated by the secondary control circuit 231 controls the secondary switch Q4 to be non-conductive. When the primary switch Q3 is not turned on, a secondary induced current is induced in the secondary winding 222 and flows through the internal diode (body diode) in the secondary switch Q4. The secondary control circuit 231 senses the generation of the secondary induced current according to the change of the drain voltage of the secondary switch Q4, and generates a control signal G4 accordingly to control the secondary switch Q4 to be conductive.

在一些實施例中，變壓器220之輔助繞組223用以產生輔助電壓Vaux，其中輔助電壓Vaux相關於第二輸出電源VOUT2。請參照圖5，圖5是本發明之一實施例中，隔離式電源轉換電路200的電壓波形圖。如圖5所示，當控制訊號G3處於高電位狀態而使一次側開關Q3導通時，一次側電壓V3接地電位而處於低電位狀態，此時第二輸出電源VOUT2之電壓處於低電位狀態，進而使輔助電壓Vaux亦處於低電位狀態；當控制訊號G3處於低電位狀態而使一次側開關Q3不導通時，一次側電壓V3處於高電位狀態，此時第二輸出電源VOUT2之電壓處於高電位狀態，進而使輔助電壓Vaux亦處於高電位狀態。 In some embodiments, the auxiliary winding 223 of the transformer 220 is used to generate an auxiliary voltage Vaux, wherein the auxiliary voltage Vaux is related to the second output power VOUT2. Please refer to FIG5, which is a voltage waveform diagram of the isolated power conversion circuit 200 in one embodiment of the present invention. As shown in Figure 5, when the control signal G3 is in a high state and the primary switch Q3 is turned on, the primary voltage V3 is grounded and in a low state. At this time, the voltage of the second output power VOUT2 is in a low state, and the auxiliary voltage Vaux is also in a low state; when the control signal G3 is in a low state and the primary switch Q3 is not turned on, the primary voltage V3 is in a high state. At this time, the voltage of the second output power VOUT2 is in a high state, and the auxiliary voltage Vaux is also in a high state.

請參照圖6A及圖6B，圖6A及圖6B是本發明之一些實施例中，電源供應系統10的運作流程圖。如圖6A所示，當電源供應系統10開始運作時，電源供應系統10之功因修正轉換電路100會接收並修正整流電源VREC之功率因數而產生第一輸出電源VOUT1(步驟S100)。接著，電源供應系統10之隔離式電源轉換電路200會轉換第一輸出電源VOUT1而產生第二輸出電源VOUT2(步驟S200)，並且隔離式電源轉換電路200之變壓器220會根據第二輸出電源VOUT2而產生輔助電壓Vaux(步驟S300)。隨後，功因修正轉換電路100之功因修正控制電路120會判斷輔助電壓Vaux是否低於禁能閾值Vth_dis(步驟S400)，其中輔助電壓Vaux是否低於禁能閾值Vth_dis示意第二輸出電源VOUT2之電壓值是否低於一輸出電壓閾值。若否，隔離式電源轉換電路200會直接輸出第二輸出電源VOUT2(步驟S500)；若是，隔離式電源轉換電路200會於功因修正控制電路120停止修正整流電源VREC之功率因數後輸出第二輸出電源VOUT2(步驟S600)。 Please refer to FIG. 6A and FIG. 6B , which are operation flow charts of the power supply system 10 in some embodiments of the present invention. As shown in FIG. 6A , when the power supply system 10 starts to operate, the power factor correction conversion circuit 100 of the power supply system 10 receives and corrects the power factor of the rectified power supply VREC to generate the first output power VOUT1 (step S100). Then, the isolated power conversion circuit 200 of the power supply system 10 converts the first output power VOUT1 to generate the second output power VOUT2 (step S200), and the transformer 220 of the isolated power conversion circuit 200 generates the auxiliary voltage Vaux according to the second output power VOUT2 (step S300). Subsequently, the power factor correction control circuit 120 of the power factor correction conversion circuit 100 determines whether the auxiliary voltage Vaux is lower than the disable threshold Vth_dis (step S400), wherein whether the auxiliary voltage Vaux is lower than the disable threshold Vth_dis indicates whether the voltage value of the second output power VOUT2 is lower than an output voltage threshold. If not, the isolated power conversion circuit 200 directly outputs the second output power VOUT2 (step S500); if so, the isolated power conversion circuit 200 outputs the second output power VOUT2 after the power factor correction control circuit 120 stops correcting the power factor of the rectifier power VREC (step S600).

在一些實施例中，隔離式電源轉換電路200符合一電源供電規範，其中規範第二輸出電源VOUT2具有一輸出電流上限值，其中所述輸出電壓閾值係由一輸出功率閾值及所述輸出電流閾值而計算，其中，輸出功率閾值用以規範需要採用功率因數校正轉換器來修正輸入電源之功率因數的下限，也就是說，當第二輸出電源VOUT2之輸出功率高於輸出功率閾值時，必須採用功率因數校正轉換器來修正輸入電源之功率因數。舉例來說，假設所述電源供電規範中規定第二輸出電源VOUT2之輸出電流上限值為5安培，且當第二輸出電源VOUT2之輸出功率閾值為100瓦(示意當第二輸出電源VOUT2之輸出功率高於100瓦時，必須採用功率因數校正轉換器來修正輸入電源之功率因數)時，根據輸出功率閾值與輸出電流上限值，計算所述輸出電壓閾值為20伏特。也就是說，當隔離式電源轉換電路200符合所述源 供電規範時，第二輸出電源VOUT2之電壓若低於所述輸出電壓閾值，則可進一步示意第二輸出電源VOUT2之功率必然低於所述輸出功率閾值。當第二輸出電源VOUT2之功率必然低於所述輸出功率閾值，根據本發明，可旁通整流電源VREC與第一輸出電源VOUT1，以停止修正整流電源之功率因數，進而降低該電源供應系統之功率損耗。 In some embodiments, the isolated power conversion circuit 200 complies with a power supply specification, wherein the second output power VOUT2 is specified to have an output current upper limit, wherein the output voltage threshold is calculated by an output power threshold and the output current threshold, wherein the output power threshold is used to specify the lower limit of the power factor of the input power source that requires a power factor correction converter to be used to correct the power factor of the input power source, that is, when the output power of the second output power VOUT2 is higher than the output power threshold, a power factor correction converter must be used to correct the power factor of the input power source. For example, assuming that the power supply specification stipulates that the output current upper limit of the second output power VOUT2 is 5 amperes, and when the output power threshold of the second output power VOUT2 is 100 watts (indicating that when the output power of the second output power VOUT2 is higher than 100 watts, a power factor correction converter must be used to correct the power factor of the input power), the output voltage threshold is calculated to be 20 volts based on the output power threshold and the output current upper limit. In other words, when the isolated power conversion circuit 200 meets the power supply specification, if the voltage of the second output power VOUT2 is lower than the output voltage threshold, it can be further indicated that the power of the second output power VOUT2 must be lower than the output power threshold. When the power of the second output power source VOUT2 is necessarily lower than the output power threshold, according to the present invention, the rectifier power source VREC and the first output power source VOUT1 can be bypassed to stop correcting the power factor of the rectifier power source, thereby reducing the power loss of the power supply system.

如圖6B所示，當功因修正控制電路120停止修正整流電源VREC之功率因數而輸出第二輸出電源VOUT2時(對應步驟S600)，功因修正控制電路120會控制上橋開關Q1導通及下橋開關Q2不導通，使得整流電源VREC與第一輸出電源VOUT1之間藉由電感器L電性連接而旁通(步驟S610)。如此一來，功因修正控制電路120係停止修正整流電源VREC之功率因數，並且功因修正轉換電路100之升壓型功率級電路110會根據未修正功率因數之整流電源VREC而產生未修正功率因數之第一輸出電源VOUT1(步驟S620)。最後，隔離式電源轉換電路200會轉換未修正功率因數之第一輸出電源VOUT1而產生並輸出未修正功率因數之第二輸出電源VOUT2(步驟S630)。 As shown in FIG6B , when the power factor correction control circuit 120 stops correcting the power factor of the rectifier power supply VREC and outputs the second output power supply VOUT2 (corresponding to step S600), the power factor correction control circuit 120 controls the upper bridge switch Q1 to be turned on and the lower bridge switch Q2 to be turned off, so that the rectifier power supply VREC and the first output power supply VOUT1 are electrically connected and bypassed through the inductor L (step S610). In this way, the power factor correction control circuit 120 stops correcting the power factor of the rectifier power supply VREC, and the boost-type power stage circuit 110 of the power factor correction conversion circuit 100 generates the first output power supply VOUT1 with an uncorrected power factor according to the rectifier power supply VREC with an uncorrected power factor (step S620). Finally, the isolated power conversion circuit 200 converts the first output power VOUT1 with uncorrected power factor to generate and output the second output power VOUT2 with uncorrected power factor (step S630).

請參照圖7，圖7是本發明之一實施例中，升壓型功率級電路110A的電路示意圖，其中升壓型功率級電路110A對應圖2之升壓型功率級電路110。如圖7所示，在一些實施例中，升壓型功率級電路110A更包括一旁通開關Q5，其中旁通開關Q5耦接於整流電源VREC與第一輸出電源VOUT1之間。在一些實施例中，當功因修正控制電路120會判斷輔助電壓Vaux低於禁能閾值Vth_dis時，功因修正控制電路120係控制旁通開關Q5導通，使得整流電源VREC與第一輸出電源VOUT1之間藉由旁通開關Q5直接電性連接而旁通。如此一來，即可達到停止修正整流電源VREC之功率因數的相同效果。 Please refer to FIG. 7, which is a circuit diagram of a boost power stage circuit 110A in one embodiment of the present invention, wherein the boost power stage circuit 110A corresponds to the boost power stage circuit 110 of FIG. 2. As shown in FIG. 7, in some embodiments, the boost power stage circuit 110A further includes a bypass switch Q5, wherein the bypass switch Q5 is coupled between the rectifier power supply VREC and the first output power supply VOUT1. In some embodiments, when the power factor correction control circuit 120 determines that the auxiliary voltage Vaux is lower than the disable threshold Vth_dis, the power factor correction control circuit 120 controls the bypass switch Q5 to be turned on, so that the rectifier power supply VREC and the first output power supply VOUT1 are directly electrically connected and bypassed through the bypass switch Q5. In this way, the same effect of stopping the correction of the power factor of the rectifier power supply VREC can be achieved.

請參照圖8A，圖8A是本發明之另一實施例中，隔離式電源轉換電路200的電路示意圖(一)。如圖8A所示，在一些實施例中，電源供應系統10更包含一輔助二極體Daux及一輔助電容器Caux，其中輔助二極體Daux用以整流輔助電壓Vaux而產生一整流後輔助電壓Vaux_rec，輔助電容器Caux用以濾波整流後輔助電壓Vaux_rec。請進一步參照圖8B，圖8B是本發明之另一實施例中，功因修正控制電路120A的電路示意圖(一)，其中功因修正控制電路120A對應圖3之功因修正控制電路120。如圖8B所示，在一些實施例中，功因修正控制電路120A係根據整流後輔助電壓Vaux_rec以判斷輔助電壓Vaux是否低於禁能閾值Vth_dis。在一些實施例中，整流後輔助電壓Vaux_rec更用以提供功因修正控制電路120A於操作時所需的一供電電源VCC，其中供電電源VCC係由一穩壓器126轉換整流後輔助電壓Vaux_rec而產生。穩壓器126之結構與功能係為本發明所屬技術領域中具有通常知識者所習知，故不贅述。 Please refer to FIG8A, which is a circuit diagram (I) of an isolated power conversion circuit 200 in another embodiment of the present invention. As shown in FIG8A, in some embodiments, the power supply system 10 further includes an auxiliary diode Daux and an auxiliary capacitor Caux, wherein the auxiliary diode Daux is used to rectify the auxiliary voltage Vaux to generate a rectified auxiliary voltage Vaux_rec, and the auxiliary capacitor Caux is used to filter the rectified auxiliary voltage Vaux_rec. Please further refer to FIG8B, which is a circuit diagram (I) of a power factor correction control circuit 120A in another embodiment of the present invention, wherein the power factor correction control circuit 120A corresponds to the power factor correction control circuit 120 of FIG3. As shown in FIG8B , in some embodiments, the power factor correction control circuit 120A determines whether the auxiliary voltage Vaux is lower than the disable threshold Vth_dis according to the rectified auxiliary voltage Vaux_rec. In some embodiments, the rectified auxiliary voltage Vaux_rec is further used to provide a power supply VCC required by the power factor correction control circuit 120A during operation, wherein the power supply VCC is generated by converting the rectified auxiliary voltage Vaux_rec by a voltage regulator 126. The structure and function of the voltage regulator 126 are known to those with ordinary knowledge in the technical field to which the present invention belongs, so it is not elaborated.

在一些實施例中，功因修正控制電路120係根據一感測電壓Vauxi以判斷輔助電壓Vaux是否低於禁能閾值Vth_dis。請參照圖9，圖9是本發明之另一實施例中，隔離式電源轉換電路200的電路示意圖(二)。如圖9所示，在一些實施例中，電源供應系統10更包含一分壓電路240，其中分壓電路240包括複數電阻器Raux1、Raux2。電阻器Raux1、Raux2用以分壓輔助電壓Vaux而產生感測電壓Vauxi，其中輔助電壓Vaux之值與感測電壓Vauxi之值之間具有另一比例關係，所述另一比例關係相關於電阻器Raux1之值與電阻器Raux2之值之間的比例關係。 In some embodiments, the power factor correction control circuit 120 determines whether the auxiliary voltage Vaux is lower than the disable threshold Vth_dis according to a sense voltage Vauxi. Please refer to FIG9, which is a circuit diagram (II) of an isolated power conversion circuit 200 in another embodiment of the present invention. As shown in FIG9, in some embodiments, the power supply system 10 further includes a voltage divider circuit 240, wherein the voltage divider circuit 240 includes a plurality of resistors Raux1 and Raux2. Resistors Raux1 and Raux2 are used to divide the auxiliary voltage Vaux to generate the sensing voltage Vauxi, wherein the value of the auxiliary voltage Vaux and the value of the sensing voltage Vauxi have another proportional relationship, and the other proportional relationship is related to the proportional relationship between the value of resistor Raux1 and the value of resistor Raux2.

請參照圖10A，圖10A是本發明之另一實施例中，功因修正控制電路120B的電路示意圖(二)，其中功因修正控制電路120B對應圖3之功因修正控制電路120。如圖10A所示，在一些實施例中，功因修正控制電路120B 更包括一齊納二極體Z1及一取樣維持電路127，其中齊納二極體Z1用以穩定輔助電壓Vaux，取樣維持電路127用以於輔助電壓Vaux之下降緣(或感測電壓Vauxi之下降緣)取樣維持輔助電壓Vaux(或感測電壓Vauxi)而產生一輔助取樣維持電壓Vaux_sh，使得功因修正控制電路120B係根據輔助取樣維持電壓Vaux_sh以判斷輔助電壓Vaux是否低於禁能閾值Vth_dis。 Please refer to FIG. 10A , which is a circuit diagram (II) of a power factor correction control circuit 120B in another embodiment of the present invention, wherein the power factor correction control circuit 120B corresponds to the power factor correction control circuit 120 of FIG. 3 . As shown in FIG. 10A , in some embodiments, the power factor correction control circuit 120B further includes a Zener diode Z1 and a sampling and holding circuit 127, wherein the Zener diode Z1 is used to stabilize the auxiliary voltage Vaux, and the sampling and holding circuit 127 is used to sample and maintain the auxiliary voltage Vaux (or the sensing voltage Vauxi) at the falling edge of the auxiliary voltage Vaux (or the falling edge of the sensing voltage Vauxi) to generate an auxiliary sampling and holding voltage Vaux_sh, so that the power factor correction control circuit 120B determines whether the auxiliary voltage Vaux is lower than the disable threshold Vth_dis according to the auxiliary sampling and holding voltage Vaux_sh.

請進一步參照圖10B，圖10B是本發明之一實施例中，取樣維持電路127的電路示意圖。如圖10B所示，在一些實施例中，取樣維持電路127包括一比較器1271、一延遲器1272、一取樣維持開關Qsh以及一取樣維持電容器Csh，其中比較器1271用以根據輔助電壓Vaux及一取樣維持閾值Vth_sh而產生一取樣維持比較訊號CMP_sh，延遲器1272用以延遲取樣維持比較訊號CMP_sh而產生一控制訊號Gsh以控制取樣維持開關Qsh之導通狀態，取樣維持電容器Csh用以維持取樣維持電壓Vaux_sh，使得取樣維持電壓Vaux_sh之值維持於輔助電壓Vaux之峰值。 Please further refer to FIG. 10B , which is a circuit diagram of the sample-and-hold circuit 127 in one embodiment of the present invention. As shown in FIG. 10B , in some embodiments, the sample-hold circuit 127 includes a comparator 1271, a delay 1272, a sample-hold switch Qsh, and a sample-hold capacitor Csh, wherein the comparator 1271 is used to generate a sample-hold comparison signal CMP_sh according to the auxiliary voltage Vaux and a sample-hold threshold Vth_sh, the delay 1272 is used to delay the sample-hold comparison signal CMP_sh to generate a control signal Gsh to control the conduction state of the sample-hold switch Qsh, and the sample-hold capacitor Csh is used to maintain the sample-hold voltage Vaux_sh so that the value of the sample-hold voltage Vaux_sh is maintained at the peak value of the auxiliary voltage Vaux.

請參照圖11A，圖11A是本發明之一實施例中，匯流排介面電路300的電路示意圖。如圖11A所示，在一些實施例中，電源供應系統10更包含符合通用序列匯流排供電規範(USB PD protocol)之一匯流排介面電路300，其中通用序列匯流排供電規範規定第二輸出電源VOUT2之輸出電流上限為5安培。在一些實施例中，匯流排介面電路300包括一匯流排控制電路310、一匯流排電容器Cpd、一匯流排開關Q6以及一發光二極體Dled，其中當電源供應系統10透過一匯流排320與一負載裝置彼此耦接時，匯流排控制電路310係根據所述負載裝置透過匯流排320所傳送之複數指令訊號CC1、CC2以產生控制訊號G6，進而控制匯流排開關Q6之導通狀態以調整第二輸出電源VOUT2之電壓值。在一些實施例中，二次側控制電路231係根據指令 訊號CC1、CC2產生控制訊號G4以控制二次側開關Q4之導通狀態，進而調整第二輸出電源VOUT2之電壓。 Please refer to FIG. 11A, which is a schematic diagram of a bus interface circuit 300 in one embodiment of the present invention. As shown in FIG. 11A, in some embodiments, the power supply system 10 further includes a bus interface circuit 300 that complies with the Universal Serial Bus Power Supply (USB PD) protocol, wherein the Universal Serial Bus Power Supply (USB PD) protocol stipulates that the output current upper limit of the second output power source VOUT2 is 5 amperes. In some embodiments, the bus interface circuit 300 includes a bus control circuit 310, a bus capacitor Cpd, a bus switch Q6, and a light-emitting diode Dled, wherein when the power supply system 10 is coupled to a load device via a bus 320, the bus control circuit 310 generates a control signal G6 based on a plurality of command signals CC1 and CC2 transmitted by the load device via the bus 320, thereby controlling the conduction state of the bus switch Q6 to adjust the voltage value of the second output power VOUT2. In some embodiments, the secondary side control circuit 231 generates a control signal G4 according to the command signals CC1 and CC2 to control the conduction state of the secondary side switch Q4, thereby adjusting the voltage of the second output power source VOUT2.

請進一步參照圖11B，圖11B是本發明之一實施例中，一次側切換電路210A的電路示意圖，其中一次側切換電路210A對應圖4之一次側切換電路210。如圖11B所示，在一些實施例中，一次側切換電路210A更包括一發光電晶體Bled，其中發光電晶體Bled係與發光二極體Dled組成一光耦合電路330。發光二極體Dled用以接收匯流排控制電路310根據匯流排電源VBUS所產生之光耦合回授訊號Vfb_led而發光，發光電晶體Bled用以接收發光二極體Dled之光線而產生一光耦合回授訊號Vfb_led’，使得一次側控制電路211根據光耦合回授訊號Vfb_led’調整控制訊號G3之占空比，進而控制一次側開關Q3之導通狀態。 Please further refer to FIG. 11B, which is a circuit diagram of a primary switching circuit 210A in one embodiment of the present invention, wherein the primary switching circuit 210A corresponds to the primary switching circuit 210 of FIG. 4. As shown in FIG. 11B, in some embodiments, the primary switching circuit 210A further includes a phototransistor Bled, wherein the phototransistor Bled and the light emitting diode Dled form an optical coupling circuit 330. The light-emitting diode Dled is used to receive the optical coupling feedback signal Vfb_led generated by the bus power VBUS generated by the bus control circuit 310 to emit light, and the light-emitting transistor Bled is used to receive the light of the light-emitting diode Dled to generate an optical coupling feedback signal Vfb_led', so that the primary-side control circuit 211 adjusts the duty cycle of the control signal G3 according to the optical coupling feedback signal Vfb_led', thereby controlling the conduction state of the primary-side switch Q3.

請參照圖12A至圖12C，圖12A至圖12C是本發明之一些實施例中，隔離式電源轉換電路200的電路示意圖。在一些實施例中，隔離式電源轉換電路可以是但不限於一返馳式電源轉換器(如圖4之隔離式電源轉換電路200所示)、一非對稱半橋返馳式電源轉換器(如圖12A之隔離式電源轉換電路200A所示)、一半橋電感-電感-電容型返馳式電源轉換器(如圖12B之隔離式電源轉換電路200B所示)或一全橋電感-電感-電容型返馳式電源轉換器(如圖12C之隔離式電源轉換電路200C所示)，其中所述非對稱半橋返馳式電源轉換器、所述半橋電感-電感-電容型返馳式電源轉換器及所述全橋電感-電感-電容型返馳式電源轉換器之結構與功能係為本發明所屬技術領域中具有通常知識者所習知，故不贅述。 Please refer to FIGS. 12A to 12C , which are schematic circuit diagrams of an isolated power conversion circuit 200 in some embodiments of the present invention. In some embodiments, the isolated power conversion circuit may be, but is not limited to, a flyback power converter (as shown in the isolated power conversion circuit 200 in FIG. 4 ), an asymmetric half-bridge flyback power converter ( As shown in the isolated power conversion circuit 200A in Figure 12A), a half-bridge inductor-inductor-capacitor type flyback power converter (as shown in the isolated power conversion circuit 200B in Figure 12B) or a full A flyback power converter of the bridge inductor-inductor-capacitor type (as shown in the isolated power conversion circuit 200C of FIG. 12C ), wherein the asymmetric half-bridge flyback power converter, the half-bridge inductor-inductor- The structures and functions of the capacitor-type flyback power converter and the full-bridge inductor-inductor-capacitor-type flyback power converter are known to those with ordinary knowledge in the technical field to which the present invention belongs, so they will not be described in detail.

請同時參照圖1及圖13，圖13是本發明之一實施例中，電源供應系統10的電壓波形圖，其中本實施例之電源供應系統10係符合通用序列匯流排供電規範。如圖13所示，在一些實施例中，當電源供應系統10於時點 t1接收到輸出電壓值為20伏特之第二輸出電源VOUT2的控制指令時，變壓器220係將第一輸出電源VOUT1轉換為電壓值為20伏特之第二輸出電源VOUT2，進而產生振幅為20伏特的輔助電壓Vaux。此時輔助電壓Vaux之值高於禁能閾值Vth_dis(例如為15伏特)示意第二輸出電源VOUT2之電壓高於輸出電壓閾值Vth_vo(例如為15伏特)，進而示意第二輸出電源VOUT2之功率高於一輸出功率閾值(例如為75瓦)，因此功因修正控制電路120會修正整流電源VREC之功率因數。 Please refer to FIG. 1 and FIG. 13 at the same time. FIG. 13 is a voltage waveform diagram of a power supply system 10 in one embodiment of the present invention, wherein the power supply system 10 of the present embodiment complies with the universal serial bus power supply specification. As shown in FIG. 13, in some embodiments, when the power supply system 10 receives a control instruction of a second output power VOUT2 with an output voltage value of 20 volts at time point t1, the transformer 220 converts the first output power VOUT1 into a second output power VOUT2 with a voltage value of 20 volts, thereby generating an auxiliary voltage Vaux with an amplitude of 20 volts. At this time, the value of the auxiliary voltage Vaux is higher than the disable threshold Vth_dis (e.g., 15 volts), indicating that the voltage of the second output power VOUT2 is higher than the output voltage threshold Vth_vo (e.g., 15 volts), and further indicating that the power of the second output power VOUT2 is higher than an output power threshold (e.g., 75 watts), so the power factor correction control circuit 120 will correct the power factor of the rectifier power VREC.

在一些實施例中，當電源供應系統10於時點t3接收到輸出電壓值為5伏特之第二輸出電源VOUT2的控制指令時，變壓器220係將第一輸出電源VOUT1轉換為電壓值為5伏特之第二輸出電源VOUT2，進而產生振幅為5伏特的輔助電壓Vaux。此時輔助電壓Vaux之值低於禁能閾值Vth_dis(例如為15伏特)示意第二輸出電源VOUT2之電壓低於輸出電壓閾值Vth_vo(例如為15伏特)，進而示意第二輸出電源VOUT2之功率低於所述輸出功率閾值(例如為75瓦)，因此功因修正控制電路120會停止修正整流電源VREC之功率因數。 In some embodiments, when the power supply system 10 receives a control instruction for the second output power VOUT2 with an output voltage value of 5 volts at time t3, the transformer 220 converts the first output power VOUT1 into the second output power VOUT2 with a voltage value of 5 volts, thereby generating an auxiliary voltage Vaux with an amplitude of 5 volts. At this time, the value of the auxiliary voltage Vaux is lower than the disable threshold Vth_dis (e.g., 15 volts), indicating that the voltage of the second output power VOUT2 is lower than the output voltage threshold Vth_vo (e.g., 15 volts), and further indicating that the power of the second output power VOUT2 is lower than the output power threshold (e.g., 75 watts), so the power factor correction control circuit 120 stops correcting the power factor of the rectifier power VREC.

請參照圖14，圖14是本發明之一實施例中，輔助電壓Vaux的電壓波形圖，其中圖14之波形為圖13中輔助電壓Vaux於時點t1與時點t2之間的放大圖(zoom in)。如圖14所示，在一些實施例中，功因修正控制電路120於輔助電壓Vaux之上升緣經過一延遲時間Td後才判斷輔助電壓Vaux是否低於禁能閾值Vth_dis(例如為15伏特)，以避免功因修正控制電路120並未接收到正確的輔助電壓Vaux之峰值(20伏特)而導致判斷出現錯誤。 Please refer to FIG. 14, which is a voltage waveform diagram of the auxiliary voltage Vaux in one embodiment of the present invention, wherein the waveform of FIG. 14 is an enlarged diagram (zoom in) of the auxiliary voltage Vaux between time points t1 and t2 in FIG. 13. As shown in FIG. 14, in some embodiments, the power factor correction control circuit 120 determines whether the auxiliary voltage Vaux is lower than the disable threshold Vth_dis (e.g., 15 volts) after a delay time Td from the rising edge of the auxiliary voltage Vaux, so as to avoid the power factor correction control circuit 120 not receiving the correct peak value (20 volts) of the auxiliary voltage Vaux and causing an error in judgment.

綜上所述，本發明之一些實施例中的電源供應系統10係透過功因修正控制電路120判斷輔助電壓Vaux是否低於禁能閾值Vth_dis，以決定是否要停止修正整流電源VREC之功率因數，進而降低電源供應系統10之功 率損耗，其中輔助電壓Vaux低於禁能閾值Vth_dis示意第二輸出電源VOUT2之電壓值低於輸出電壓閾值Vth_vo，進而示意第二輸出電源VOUT2之功率值低於一輸出功率閾值。 In summary, the power supply system 10 in some embodiments of the present invention determines whether the auxiliary voltage Vaux is lower than the disable threshold Vth_dis through the power factor correction control circuit 120 to determine whether to stop correcting the power factor of the rectifier power VREC, thereby reducing the power loss of the power supply system 10, wherein the auxiliary voltage Vaux is lower than the disable threshold Vth_dis, indicating that the voltage value of the second output power VOUT2 is lower than the output voltage threshold Vth_vo, and further indicating that the power value of the second output power VOUT2 is lower than an output power threshold.

以上已針對較佳實施例來說明本發明，唯以上所述者，僅係為使熟悉本技術者易於了解本發明的內容而已，並非用來限定本發明之權利範圍。所說明之各個實施例，並不限於單獨應用，亦可以組合應用，舉例而言，兩個或以上之實施例可以組合運用，而一實施例中之部分組成亦可用以取代另一實施例中對應之組成部件。此外，在本發明之相同精神下，熟悉本技術者可以思及各種等效變化以及各種組合，舉例而言，本發明所稱「根據某訊號進行處理或運算或產生某輸出結果」，不限於根據該訊號的本身，亦包含於必要時，將該訊號進行電壓電流轉換、電流電壓轉換、及/或比例轉換等，之後根據轉換後的訊號進行處理或運算產生某輸出結果。由此可知，在本發明之相同精神下，熟悉本技術者可以思及各種等效變化以及各種組合，其組合方式甚多，在此不一一列舉說明。因此，本發明的範圍應涵蓋上述及其他所有等效變化。 The present invention has been described above with reference to the preferred embodiments. However, the above description is only for the purpose of making it easier for those familiar with the art to understand the content of the present invention, and is not intended to limit the scope of the invention. The embodiments described are not limited to single application, but can also be applied in combination. For example, two or more embodiments can be used in combination, and a part of the components in one embodiment can also be used to replace the corresponding components in another embodiment. In addition, under the same spirit of the present invention, those familiar with the present technology can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or calculating or generating an output result according to a certain signal", which is not limited to the signal itself, but also includes, when necessary, converting the signal into voltage-current, current-voltage, and/or ratio, and then processing or calculating the converted signal to generate an output result. It can be seen that under the same spirit of the present invention, those familiar with the present technology can think of various equivalent changes and various combinations, and there are many combinations, which are not listed here one by one. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

100:功因修正轉換電路 100: Power factor correction conversion circuit

110:升壓型功率級電路 110: Boost power stage circuit

120:功因修正控制電路 120: Power factor correction control circuit

130:回授電路 130: Feedback circuit

Ci:輸入電容器 Ci: Input capacitor

Co:輸出電容器 Co: output capacitor

G1-G2:控制訊號 G1-G2: control signal

L:電感器 L: Inductor

LX:切換節點 LX: Switch node

Q1:上橋開關 Q1: Bridge switch

Q2:下橋開關 Q2: Lower bridge switch

Rfb1-Rfb2:電阻器 Rfb1-Rfb2: Resistor

Vaux:輔助電壓 Vaux: Auxiliary voltage

Vfb:回授電壓 Vfb: Feedback voltage

VOUT1:第一輸出電源 VOUT1: first output power

VOUT2:第二輸出電源 VOUT2: Second output power supply

VREC:整流電源 VREC: rectifier power supply