US20180205311A1 - Control of Series-Parallel Mode (SPM) Clamped Flyback Converter - Google Patents

Images

Classifications

• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/32—Means for protecting converters other than automatic disconnection
  • H02M1/34—Snubber circuits
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
  • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
  • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
  • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
  • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/32—Means for protecting converters other than automatic disconnection
  • H02M1/34—Snubber circuits
  • H02M1/342—Active non-dissipative snubbers
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M1/00—Details of apparatus for conversion
  • H02M1/32—Means for protecting converters other than automatic disconnection
  • H02M1/34—Snubber circuits
  • H02M1/346—Passive non-dissipative snubbers
• • H02M2001/342—
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/01—Resonant DC/DC converters
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
  • H02M3/00—Conversion of DC power input into DC power output
  • H02M3/22—Conversion of DC power input into DC power output with intermediate conversion into AC
  • H02M3/24—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
  • H02M3/28—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
  • H02M3/325—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
  • H02M3/335—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
  • H02M3/33569—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
  • H02M3/33576—Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
  • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
  • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

• This disclosure relates generally to the field of power converters and, in particular, to the control of flyback converters with series-parallel mode (“SPM”) active clamps.
• SPM series-parallel mode
• Flyback converters are commonly used as isolated power supplies for electronic devices.
• a flyback converter typically includes two coils that are electromagnetically coupled with each other, like primary and secondary windings of a transformer.
• the primary coil is coupled to an input circuit/power source, and the secondary coil is coupled to an output circuit/load, thus providing desired isolation between the input and output.
• a flyback converter may produce a regulated output voltage of a desired target value at the output.
• the primary and secondary coils may have parasitic leakage inductances that also capture energy (“leakage energy”).
• the leakage inductances may cause additional losses unless the energy stored therein is recovered.
• some form of leakage energy recovery circuitry may be included in a flyback converter.
• a drive toward miniaturization and portability in the consumer electronic industry pushes such power converters to be packaged in smaller and smaller volumes. Simply decreasing the size and/or component count, however, typically makes it harder to achieve a desired level of efficiency, because operations at high switching frequencies that can facilitate miniaturization may otherwise negatively affect efficiency.
• a flyback converter adapted to recover the leakage energy to improve efficiency that also provides flexibility to avoid operating at unnecessarily high frequencies.
• Described herein are various devices and methods for operating flyback converters with serial-parallel mode (“SPM”) active clamps, in which leakage energy is absorbed and retained by clamps and then returned to the input power source.
• the converters may transfer the leakage energy from the leakage inductance to snubber capacitors by charging the snubber capacitors in series. Further, the converter embodiments described herein may retain the leakage energy in the snubber capacitors, while the normal “working” energy is being delivered through the transformer to a load of the output circuitry.
• the converter embodiments described herein may then start a resonance between the primary coil (and leakage inductance) and a parasitic capacitance of the primary switch.
• the resonance may create a sinusoidal voltage across the primary switch, which may include a plurality of peak values.
• the clamp switch may reach a valley voltage.
• the converter embodiments described herein may turn on the clamp switch selectively near one of the primary switch's peak values, thus minimizing the clamp switch's turn-on losses.
• the clamp switch may be turned on at the first peak of the primary switch's voltage, or may be delayed to the subsequent peaks to extend the cycles and slow down the switching frequency.
• the converter embodiments described herein may then start a transfer of leakage energy from the snubber capacitors to the primary coil, by discharging the snubber capacitors in parallel and driving a primary winding current in an opposite direction. Still further, the converter embodiments described herein may turn off the clamp switch adaptively, and after a delay, at zero-voltage switching (ZVS) or a minimum non-zero voltage turn on the main primary switch, thus returning the leakage energy back to the input power source.
• ZVS zero-voltage switching
• references to “an”, “one” or “another” embodiment in this disclosure are not necessarily to the same or different embodiment, and they mean at least one.
• a given figure may be used to illustrate the features of more than one embodiment, or more than one species of the disclosure, and not all elements in the figure may be required for a given embodiment or species.
• FIG. 1 is schematic diagram illustrating exemplary SPM clamped flyback converter 100 in accordance with one embodiment.
• FIG. 2 shows the operation of exemplary flyback converter 100 in Operational Stage I in accordance with one embodiment.
• FIG. 3 shows the operation of exemplary flyback converter 100 in Operational Stage II in accordance with one embodiment.
• FIG. 4 shows the operation of exemplary flyback converter 100 in Operational Stage III in accordance with one embodiment.
• FIG. 5 shows the operation of exemplary flyback converter 100 in Operational Stage IV in accordance with one embodiment.
• FIG. 6 shows the operation of exemplary flyback converter 100 in Operational Stage V in accordance with one embodiment.
• FIG. 7 shows waveforms of exemplary flyback converter 100 in accordance with one embodiment.
• FIG. 8 shows the turn-on adjustments of a clamp switch of exemplary flyback converter 100 in accordance with one embodiment.
• FIG. 9 shows the turn-on adjustments of a clamp switch of exemplary flyback converter 100 in accordance with another embodiment.
• FIG. 1 is a schematic diagram illustrating exemplary clamped flyback converter 100 .
• converter 100 may include primary coil P 1 105 and secondary coil S 1 110 , which are electromagnetically coupled with each other.
• Primary coil P 1 105 may receive an input voltage V IN from power source 115
• secondary coil S 1 110 may supply an output voltage V OUT to load 120 (e.g., resistance R LOAD ) through secondary switch Q 3 130 .
• load 120 e.g., resistance R LOAD
• R LOAD resistance
• primary coil P 1 105 and secondary coil S 1 110 possess an ideal electromagnetic coupling, meaning that all of the energy stored in primary coil P 1 105 will be transferred to secondary coil S 1 110 without losses.
• leakage inductance L 1 135 may capture a leakage energy that is the energy not transferred from the real, non-ideal primary coil to the real, non-ideal secondary coil.
• Flyback converter 100 may further comprise primary switch Q 1 125 , e.g., a first metal-oxide semiconductor field-effect transistor (MOSFET), coupled in series with primary coil P 1 105 .
• primary switch Q 1 125 e.g., a first metal-oxide semiconductor field-effect transistor (MOSFET)
• MOSFET metal-oxide semiconductor field-effect transistor
• flyback converter 100 may include active clamp circuit (“clamp”) 170 , which may be coupled in parallel with primary coil P 1 105 (and leakage inductance L 1 135 ).
• clamp 170 may comprise clamp switch Q 2 140 , e.g., a second MOSFET (or other type of switching device), in series with snubber capacitors C 4 145 and C 5 150 and diode D 4 155 .
• Clamp 170 may further include diodes D 5 160 and D 6 165 , wherein diode D 5 160 may be coupled in parallel with snubber capacitor C 5 150 and diode D 4 155 , and diode D 6 165 may be coupled in parallel with snubber capacitor C 4 145 and diode D 4 155 .
• Secondary switch Q 3 130 may be controlled in coordination with primary switching Q 1 125 , providing synchronous rectification to load 120 . Note that switch Q 3 130 may also be implemented by a diode. Smoothing capacitor C 3 may be coupled between secondary output terminal and ground, as a filter for output voltage V OUT .
• Flyback converter 100 may include one or more controller(s) 175 , which may be coupled to and generate respective control signals for switches Q 1 125 , Q 2 140 , and/or Q 3 130 .
• FIG. 1 also depicts gate drive circuits for primary switch Q 1 125 (comprising voltage source V 1 and resistor R 1 ) and clamp switch Q 2 140 (comprising voltage source V 2 and resistor R 2 ), respectively.
• switches Q 1 125 and Q 2 140 may also comprise an intrinsic anti-parallel body diode (e.g., diodes D 1 and D 2 ) and a parallel parasitic capacitance (e.g., capacitor C 1 ) as shown in FIG. 1 .
• flyback converter 100 may use other types of semiconductor switching devices, for example, insulated gate bipolar transistors (IGBTs), junction gate field-effect transistors (JFETs), silicon carbine and/or gallium nitride devices.
• IGBTs insulated gate bipolar transistors
• JFETs junction gate field-effect transistors
• silicon carbine and/or gallium nitride devices.
• FIG. 2 illustrates the operation of flyback converter 100 in Operational Stage I.
• clamp switches Q 2 140 and secondary switch Q 3 130 remain open, and converter 100 may turn on primary switch Q 1 125 .
• power source 115 causes a primary winding current I P1 in primary coil P 1 105 , as illustrated by lines 205 - 230 .
• secondary switch Q 3 130 remains open, and primary winding current I P1 builds up in primary coil P 1 105 , energy is accumulated/stored in primary coil P 1 105 .
• a leakage energy may be captured by leakage inductance L 1 135 .
• FIG. 3 illustrates the operation of flyback converter 100 in Operational Stage II.
• flyback converter 100 may turn off primary switch Q 1 125 and turn on secondary switch Q 3 130 .
• primary winding current I P1 may start to decline because primary coil P 1 105 is disconnected from power source 115 . This may create an induced voltage across secondary coil S 1 110 that causes a current to flow through closed secondary switch Q 3 130 , thus transferring the stored energy from primary coil P 1 105 , through secondary coil S 1 110 , to load 120 .
• primary winding current I P1 may be forced to flow into snubber capacitors C 4 145 and C 5 150 through clamp switch Q 2 140 's body diode D 2 and diode D 4 155 , as shown by lines 305 - 330 , thus charging snubber capacitors C 4 145 and C 5 150 in series.
• only leakage energy may be delivered from leakage inductance L 1 135 into snubber capacitors C 4 145 and C 5 150 .
• Operational Stage II may continue until both of the currents through primary coil P 1 105 and secondary coil S 1 110 reduce to zero, which indicates that all the normal “working” energy is transferred through the transformer to load 120 .
• each snubber capacitor C 4 145 and C 5 150 may develop respective clamp voltages V C4 and V C5 by the charging current.
• the conduction of body diode D 2 brings the clamp switch Q 2 125 's voltage V Q2 to approximately zero (e.g., a forward voltage drop across diode D 2 ), thus the clamp voltages V C4 and V C5 and primary switch Q 1 125 's voltage V Q1 may be determined according to equations (1) and (2):
• V Q2 V IN +V C4 +V C5 (2)
• V OR is the reflected output voltage across primary coil P 1 105
• V L1 is an induced voltage of leakage inductance L 1 135
• V OUT is the output voltage of converter 100
• V Q3 is the voltage drop across secondary switch Q 3 130 (a small voltage when Q 3 130 conducts)
• Np/Ns represents the turns-ratio between primary coil P 1 105 and secondary coil S 1 110 .
• snubber capacitors C 4 145 and C 5 150 have equal capacitances. Thereby, each snubber capacitor C 4 145 and C 5 150 may be charged to a voltage equal to half of reflected voltage V OR plus half of induced leakage voltage V L1 .
• snubber capacitors C 4 145 and C 5 150 may be charged to different clamp voltages. This may slightly affect the discharging sequence of snubber capacitors C 4 145 and C 5 150 , which will be discussed in the following descriptions.
• diode D 4 155 that is in series with the snubber capacitors may block any reverse current. Since respective clamp voltages V C4 and V C5 are less than the total voltage (V OR +V L1 ) across primary coil P 1 105 and leakage inductance L 1 135 , diodes D 5 160 and D 6 165 may become reverse biased. Thus, snubber capacitors C 4 145 and C 5 150 may be disconnected from primary coil P 1 105 , which causes C 4 145 and C 5 150 to retain the leakage energy absorbed from leakage inductance L 1 135 . As the body diode D 2 stops conducting, a voltage V Q2 may be built up across clamp switch Q 2 140 . Voltage V Q2 may be determined according to equation (3):
• V Q2 V IN +V C4 +V C5 ⁇ V Q1 (3)
• clamp switch Q 2 140 's voltage V Q2 may be inversely proportional to the primary switch Q 1 125 's voltage V Q1 . In other words, voltage V Q2 may reach a valley value when voltage V Q1 approaches a peak value.
• Operational Stage II continues until all the stored energy is transferred from primary coil P 1 105 to secondary coil 110 and load 120 .
• Converter 100 may turn off secondary switch Q 3 130 and enter Operational Stage III.
• primary coil P 1 105 (and leakage inductance L 1 135 ) is placed in series with the parasitic capacitance C 1 of primary switch Q 1 125 forming an inductor-capacitor (LC) resonant circuit.
• this LC circuit may generate an oscillating primary winding current I P1 , as shown by lines 405 - 430 , and a sinusoidal voltage V Q1 over primary switch 125 .
• This sinusoidal voltage V Q1 may include a plurality of peak values. As described in FIG. 3 , each peak value may correspond to a valley voltage for V Q1 of clamp switch Q 2 140 . Because switching losses of a semiconductor switching devices heavily depend on its switching voltages, it may thus be desirable to turn on clamp switch Q 2 140 selectively near one of voltage V Q1 's peak values, i.e., near one of voltage V Q2 's valley values.
• FIG. 5 The operation of power converter 100 in Operational Stage IV is shown in FIG. 5 , after clamp switch Q 2 140 is turned on. With the falling of voltage V Q1 during the LC resonance, diodes D 5 160 and D 6 165 may become forward biased and start to conduct. This may discharge snubber capacitors C 4 145 and C 5 150 in parallel and generate a primary winding current I P1 in an opposite direction, as indicated by lines 505 - 530 . This may interrupt the resonance and transfer the absorbed leakage energy from C 4 145 and C 5 150 to primary coil P 1 105 .
• snubber capacitors C 4 145 and C 5 150 may be charged to different clamp voltages. Therefore, the snubber capacitor with the lower clamp voltage may be discharged first. Once the diode (e.g., diode D 5 160 or D 6 165 ) of the other snubber capacitor with the higher clamp voltage becomes forward biased, the other snubber capacitor may start to discharge, and then snubber capacitors C 4 145 and C 5 150 may be discharged in parallel together.
• the diode e.g., diode D 5 160 or D 6 165
• the respective clamp voltage V C4 and V C5 of snubber capacitors C 4 145 and C 5 150 may decline as the absorbed leakage energy is depleted.
• snubber capacitors C 4 145 and C 5 150 's clamp voltages e.g., 50V
• V OR reflected output voltage
• leakage energy of leakage inductance L 1 135 e.g., the additional 10V. Therefore, when snubber capacitors C 4 145 and C 5 150 's clamp voltages fall to, for example, 40V, all the leakage energy will have been delivered to primary coil P 1 105 .
• Power converter 100 may then turn off clamp switch Q 2 140 and enter Operational Stage V.
• the reverse primary winding current I P1 may continuously flow into primary coil P 1 105 through the body diode D 1 of primary switch Q 1 125 , as shown by lines 605 - 630 , thus further delivering the leakage energy from primary coil P 1 105 back to power source 115 .
• the conduction of the body diode D 1 may bring primary switch Q 1 125 's voltage V Q1 close to zero (e.g., a forward voltage drop of the body diode D 1 ).
• converter 100 may turn on primary switch Q 1 125 to achieve ZVS for minimal losses.
• power converter 100 may start the next cycle with Operational Stage I as described in FIG. 2 . It is also possible that the energy in the reverse primary winding current I P1 is insufficient to discharge the sum of the parasitic capacitances of switches Q 1 125 , Q 2 140 , transformer (including primary coil P 1 105 & secondary coil S 1 110 ), and the reflected capacitance of secondary switch Q 3 130 into the primary side completely to conduct the body diode D 1 . Therefore, alternatively primary switch Q 1 125 may be turned on at a minimum non-zero voltage (e.g., near ZVS). In either case (i.e., with or without the conduction of body diode D 1 ), primary switch Q 1 125 may be turned on at a minimum voltage point to reduce turn-on losses.
• a minimum non-zero voltage e.g., near ZVS
• FIG. 7 shows waveforms of exemplary power converter 100 during Operational Stages in accordance with one embodiment.
• the horizontal axis represents time
• the first vertical axis on the left represents voltage
• the second vertical axis on the right represents current.
• Waveform 705 depicts primary switch Q 1 125 's voltage V Q1
• waveform 710 depicts primary winding current I P1 .
• FIG. 7 includes four sections (A, B, C and D) associated with four transitions ( 1 , 2 , 3 , and 4 ).
• section A corresponds to Operational Stage I described in FIG. 1 , after power converter 100 turns on primary switch Q 1 125 .
• waveform 705 is close to zero to represent the small conduction voltage over primary switch Q 1 125
• waveform 710 increases because of the building-up of primary winding current I P1 through primary coil P 1 105 .
• Transition 2 occurs when converter 100 turns off primary switch Q 1 125 and turns on secondary switch Q 3 130 , corresponding to Operational Stage II described in FIG. 3 .
• Operational Stage II may start with some dynamic transients, as shown by waveform 705 during section B and transition 4 , to represent the transfer of leakage energy from leakage inductance L 1 135 to snubber capacitors C 4 145 and C 5 150 (by charging the snubber capacitors in series). Meanwhile, stored energy in primary coil P 1 105 may be also delivered to secondary coil S 1 110 . Thus, primary winding current I P1 declines as shown by waveform 710 .
• primary switch Q 1 125 's voltage V Q1 may settle down, as shown by waveform 705 , to 400V, for example, according to equation (2) in FIG. 3 .
• Snubber capacitors C 4 145 and C 5 150 may then be disconnected from primary coil P 1 105 , retaining the absorbed leakage energy and remaining at substantially constant clamp voltages, as shown by waveform 705 , during section C, while the storage energy of primary coil P 1 105 is being continuously transferred to secondary coil S 1 110 and load 120 .
• power converter 100 may turn off secondary switch Q 3 130 and enter Operational Stage III, as shown by transition 3 in FIG. 7 .
• primary coil P 1 105 and the parasitic capacitance C 1 of primary switch Q 1 125 may form a LC resonant circuit, which may result in a sinusoidal voltage V Q1 depicted by waveform 705 in FIG. 7 .
• waveform 705 shows only half of the first sine waveform.
• Converter 100 may turn on clamp switch Q 2 140 and enter Operational Stage IV.
• diodes D 5 160 and D 6 165 may become forward biased and start to conduct.
• Snubber capacitors C 4 145 and C 5 150 may start to discharge in parallel, generating a primary winding current I P1 in an opposite direction as shown by waveform 710 during section D.
• respective clamp voltages V C4 and V C5 of snubber capacitors C 4 145 and C 5 150 decrease. According to equation (2), voltage V Q1 declines accordingly, as shown by waveform 705 .
• Converter 100 may turn off clamp switch Q 2 140 and enter Operational Stage V, as shown by transition 1 in FIG. 7 .
• Operational Stage V may occupy only a short delay between turn-off of clamp switch Q 2 140 and turn-on of primary switch Q 1 125 .
• the delay is inserted to allow for the conduction of the body diode D 1 or to maximize the discharge of the parasitic capacitances as described in Operational Stage V. This may bring primary switch Q 1 125 's voltage V Q1 to approximately zero, as shown by waveform 705 , thus permitting primary switch Q 1 125 to be turned on to achieve ZVS or near ZVS.
• Converter 100 may start the next cycle with duration A.
• FIG. 8 shows the adjustments of turn-on point for clamp switch Q 2 140 in accordance with one embodiment. As shown herein, the adjustments will be explained in view of exemplary waveform 800 of voltage V Q1 and corresponding gating signals for switches Q 1 125 and Q 2 140 . Note that the horizontal axes represent time, and the numbers (0, 1) along the vertical axes represent (logic low, logic high) respectively, in FIG. 8 .
• converter 100 may enter a LC resonance between primary coil P 1 105 (and leakage inductance L 1 135 ) and the parasitic capacitance C 1 of primary switch Q 1 125 .
• the resonance may create a sinusoidal voltage V Q1 , as shown by waveform 800 , for primary switch Q 1 125 .
• Sinusoidal voltage V Q1 may include a plurality of peak values 805 , 820 and 835 , each of which may correspond to a valley voltage V Q2 over clamp switch Q 2 140 . To minimize switching losses, it is thus desirable to turn on clamp switch Q 2 140 selectively when voltage V Q1 approach one of its peak values.
• clamp switch Q 2 140 may be turned on at V Q1 's first peak value 805 by gating signal 850 . Subsequently, instead of continuing oscillation as shown by line 845 , converter 100 may enter Operational Stage IV (section D in FIG. 7 ) as shown by dashed line 815 . Snubber capacitors C 4 145 and C 5 150 may be discharged, and when their respective clamp voltage fall under a certain value, as indicated by corner 810 , all leakage energy is transferred to primary coil P 1 105 .
• Clamp switch Q 2 140 may be turned off by gating signal 850 , and after a predetermined delay, voltage V Q1 may decline to approximately zero due to the conduction of body diode D 1 of primary switch Q 1 125 .
• Primary switch Q 1 125 may be turned on by gating signal 855 to achieve ZVS.
• converter 100 may wait after the first full sinusoidal cycle of voltage V Q1 , and turn on clamp switch Q 2 140 at voltage V Q1 's second peak value 820 by gating signal 860 .
• converter 100 may enter Operational Stage IV (section D in FIG. 7 ) as shown by dashed line 830 .
• converter 100 may turn off clamp switch Q 2 140 by gating signal 860 .
• primary switch Q 1 125 may be turned on by gating signal 865 to achieve ZVS.
• clamp switch Q 2 140 may be further delayed to voltage V Q1 's third peak value 835 , as shown by gating signal 870 in FIG. 8 .
• primary switch Q 1 125 may experience two full sinusoidal cycles before it starts to decline, as shown by solid line 845 . Accordingly, clamp switch Q 2 140 may be turned off after the leakage energy is transferred to primary coil P 1 105 (as indicated by corner 840 ) by gating signal 870 . Subsequently, after the predetermined delay, converter 100 may turn on primary switch Q 1 125 by gating signal 875 to achieve ZVS.
• flyback converter 100 may turn on primary switch Q 1 125 at a minimum non-zero voltage (e.g., near ZVS) without the conduction of its body diode D 1 as described in Operational Stage V.
• FIG. 9 shows waveform 900 of voltage V Q1 of primary switch Q 1 125 , and gating signals for switches Q 1 125 and Q 2 140 corresponding to turning on clamp switch Q 2 140 at the first, second and third peak voltages of V Q1 , respectively.
• clamp switch Q 2 140 may be turned on at V Q1 's first peak value 905 by gating signal 950 .
• converter 100 may enter Operational Stage IV (section D in FIG. 7 ) as shown by dashed line 915 .
• switch Q 2 140 turns off by gating signal 950
• switch Q 1 125 may be turned on by gating signal 955 when its voltage V Q1 reaches a minimum non-zero voltage, as shown by sharp falling edge 917 .
• converter 100 may wait until voltage V Q1 's second peak value 920 and then turn on clamp switch Q 2 140 by gating signal 960 . Similarly, instead of continuing oscillation as shown by line 945 , converter 100 may enter Operational Stage IV (section D in FIG. 7 ) as shown by dashed line 930 . When voltage V Q1 reaches a minimum non-zero voltage, flyback converter 100 may turn on primary switch Q 1 125 near ZVS by gating signal 965 , as shown by sharp falling edge 932 .
• clamp switch Q 2 140 may be further delayed to voltage V Q1 's third peak value 935 , as shown by gating signal 970 in FIG. 9 .
• primary switch Q 1 125 may experience two full sinusoidal cycles before it starts to decline, as shown by solid line 945 . Accordingly, converter 100 may turn on primary switch Q 1 125 by gating signal 975 at a minimum non-zero voltage, as shown by sharp falling edge 947 .
• the peak values of voltage V Q1 may be detected by monitoring falling edges of voltage V Q1 .
• Controller(s) 175 may also receive detection signal(s) for transitions of voltage V Q1 from reflected output voltage (e.g., 80V) to half of the reflected output voltage (e.g., 40V), where each transition may be indicative of one sinusoidal cycle. Based on those feedback signals, controller(s) 175 may determine the corresponding peak values of voltage V Q1 and thus the point to turn on clamp switch Q 2 140 accordingly. Further, when the load of converter 100 reduces, converter 100 may enter a discontinuous conduction mode (DCM). In DCM, the switching of clamp switch Q 2 140 may become asynchronous with sinusoidal voltage V Q1 . For example, clamp switch Q 2 140 may be turned on at points other than at a peak value of voltage V Q1 .
• DCM discontinuous conduction mode

Landscapes

• Engineering & Computer Science (AREA)
• Power Engineering (AREA)
• Dc-Dc Converters (AREA)

Abstract

Description

Claims (24)

Priority Applications (2)

Applications Claiming Priority (2)

Related Parent Applications (1)

Related Child Applications (1)

Publications (1)

Family

ID=62841626

Family Applications (2)

Family Applications After (1)

Country Status (1)

Cited By (2)

Citations (8)

Family Cites Families (52)

• 2017
  • 2017-12-19 US US15/847,008 patent/US20180205311A1/en not_active Abandoned
• 2019
  • 2019-03-26 US US16/365,100 patent/US10770965B2/en active Active

Patent Citations (9)

Also Published As

Similar Documents

Legal Events