US3660683A - Multiple choice selector device - Google Patents
- ️Tue May 02 1972
United States Patent Wangard 1541 MULTIPLE CHOICE SELECTOR DEVICE [72] lnventor: William Wangard, Maywood, ll].
[73] Assignee: Walter E. Heller & Company, Chicago, Ill.
[22] Filed: May 11, 1970 211 Appl. No.2 36,258
52 US. Cl ..307 2s2 K, 307/241, 307 252 w 51 im. Cl. 58 Field of Search ..307/221, 223, 241, 252 K, 252 w,
[56] References Cited UNITED STATES PATENTS 3,488,515 1/1970 Hiyoshi ..307/241 1 51 May 2, 1972 3,351,769 11/1967 Davis ..307/252 K Primary Examiner.lohn Zazworsky Attorney-Ronald L. Engel, Daniel W. Vittum, Jr., Gomer W. Walters and John A. Waters [5 7] ABSTRACT Electronic gating circuits are provided to yield closed current paths upon actuation of associated momentary contact switches. An erasing circuit is also energized upon actuation of a momentary contact switch to cause electronic gating circuits previously placed in the closed current path condition to be returned to an open circuit condition. Continued actuation of more than one momentary contact switch during operation of the erasing circuit will prevent the gating circuits associated with the actuated switches from being placed in an open circuit condition.
11 Claims, 1 Drawing Figure ILZ 1 MULTIPLE CHOICE SELECTOR DEVICE BACKGROUND OF THE'INVENTION 1. Field of the Invention This invention relates to a device for providing an operator with the means to-make multiple choice selections to provide corresponding output signals in response to operator input choices, and for erasing previously selected output signals not presently selected-More particularly, this invention relates to a selector switch and interlock arrangement for selecting operator desiredtresponses both individually and in groups from a multiplicity of operational electronic circuits, such as rhythm accompaniment circuits for an electronic'organ,
2. Description of the Prior Art Prior art multiple choice switching devices heretofore known to-the art for use in electronic organs and =related devices are mechanical switches which inherently have had several disadvantages. For example, one such prior artmultiple choice switch heretofore utilized in conjunction with rhythm accompaniment devices for electronic organs has the undesirable feature of allowing the operator thechoice of only one rhythm accompaniment at a time. The operator makes a rhythm accompaniment selection by pressing the appropriate button marked for that selection and the action of pressing the selector button releases any previously selected button. Thus, prior art devices have provided a simplified erasing feature which permits the operator to erase the previous selection by actuation ofa new choice selection.
The mechanical configuration of another of the prior art switches does permit the operator to make more than one rhythm accompaniment selection provided the operator is capable of pressing the buttons exactly simultaneously so that the mechanical latching element of the switch will latch both buttons simultaneously. However, simultaneous selection is extremely vdifficult with this prior art devicebecause'of'the close mechanical tolerances of themechanical latching elements. Consequently, the organ operator often is required to make many numerous attempts to press the buttons simultaneously before a dual choice selection can be achieved. Often, regardless of how many attempts aremade, he operator is unsuccessful in his attempts to make a dualchoice selection with this prior art switch because he is unable to get both buttons to latch simultaneously. Further, three or more rhythm accompaniment choices are even more difficult since the operator is required to press the three or more buttons exactly simultaneously to achieve simultaneous latching of the buttons.
Moreover, with the prior art mechanical multiple choice switching devices, it is extremely difficult to retain that choice while making additional selections once a choice has been made since the erasing element of the switch releases all previously selected buttons upon the actuation of the new choice button. To retain the previously selected choice, it is necessary for the operator to attempt to hold the previously selected button in exactly the same position while pressing the new choice selection button so that simultaneous latching will occur. However, since the choice buttons are spring loaded it is extremely difficult for the operator to retain the button in exactly the same position after unlatching. Thus, retention of a previous selection while making an additional selection is very difficult in the prior art mechanical switches.
The present invention provides substantial improvements over the prior art mechanical multiple choice selector switches. The present invention allows the operator to make one or more rhythm accompaniment selections by pressing one or more buttons contemporaneously. With the present invention, it is not necessary for the operator to press the buttons exactly simultaneously. The operator can make on selection by pressing a button and as long as he holds down that button he can make as many additional choices as he wishes.
All previously selected rhythm accompaniments are erased in the present invention if the operator does not desire to retain them. Further, if the operator desires to retain a previously selected rhythm accompaniment, he may easily retain that choice by pressing that selector button while he makes additional selections. Further, if the operator wishes to erase all previous selections so that no rhythm accompaniment is provided, a cancelling switch is provided to cancel all selections. Thus, the present invention provides substantial improvement over the prior art mechanical multiple choice switching devices.
SUMMARY OF THE INVENTION A multiple choice selector device provides an operator with the opportunity to select one or more output signals for operating corresponding devices, to receive and respond to the output signals to provide operator desired responses. The selector generally comprises a multiplicity of gating means, which act as memory' means and erasing means in providing output signals to the individual responding devices upon individual choice excitation by an operator, in providing an erasing signal upon excitation by the operator. and in terminating existing output signals of those gating means for which no co-existant external operator excitation is present by receipt of a transitional input signal. Additionally, there is provided a transitional input signal generating means for providing a transitional input signal in response to an erasing signal to terminate existing output signals of those gating means for which co-existant operator choice excitation is not provided. The duration of the transitional input signal is controlled by a limiting means to restrict the duration of the signal sufficiently to prevent release of a switch button before application of the erasing means.
Therefore, a primary object of the present invention is to provide a new and improved multiple choice selector device that permits the operator to easily and quickly make one or more contemporaneous selections.
Another object of the present invention is to provide a multiple choice selector device which permits previously selected choices to be easily retained while additional selections are made.
A further object of the present invention is to provide a new and improved multiple choice selector device which erases all previously selected-choices no longer desired by the operator while allowing the operator to easily retain desired selections.
A further object of the present invention is to provide a relatively compact substantially maintenance free solid state electronic switching device for providing an operator the opportunity to easily make one or more multiple choice selections.
A further object of the present invention is to provide a new and improved multiple choice selector device which permits the operator to erase all previously selected choices without making a new choice and thereby eliminate all output signals.
BRIEF DESCRIPTION OF THE DRAWING The FIG. 1 is a circuit diagram of a preferred embodiment of the present invention.
DETAILED DESCRIPTION OF THE INVENTION With reference to the drawing, shown are two gating circuits 10 enclosed by rectangles of repeat lines. For space purposes, only two gating circuits are depicted in the drawing, however, it should be expressly understood that a multiplicity of gating circuits may be provided in parallel to gating circuits 10 to provide as many selections as desired.
Gating circuits 10 comprise complementary silicon controlled rectifiers 12 having
anode terminals14, cathode terminals l6 and
gate terminals18. Complementary silicon controlled rectifiers are normally conducting if the gate is at a lower potential than the anode. Conduction ceases if the current falls below a given level.
Connected from a
bias voltage line20 to the
gate terminals18 are
bias resistors22. Connected in parallel from the
cathode terminals16 to ground are
load resistor24 and indicating
lights26. Also connected to
cathode terminals16 are
output jacks28. The rhythm accompaniment devices (not shown) may be connected to
output jacks28 to receive voltage produced across the parallel combination of
load resistors24 and indicating
lights26 when current is flowing. Connected from
gate terminals18 to
common signal line30 are normally open
choice selector switches32, which are of the type known as momentary contact switches.
Also connected from
common signal line30 to ground is an
erasing voltage resistor34. In parallel with
erasing voltage resistor34 to ground are
foot switch terminals36, which provide a means of disabling the erasing means while making multiple choices. A foot pedal switch arrangement (shown substantially at 35) may be connected across
foot switch terminals36 to facilitate operation.
30 is connected to the base 37 ofa first NPN transistor 38. The
emitter39 of the first NPN transistor 38 is connected to ground, and the collector 41 of first NPN transistor 38 is connected to
resistors40 and 42.
Resistor40 is connected to
bias voltage line20, and
resistor42 is connected to the
base43 of second NPN transistor 44.
The
emitter45 of a second NPN transistor 44 is connected to ground and the collector 47 of second NPN transistor 44 is connected to
resistor46 and capacitor 48.
Resistor46 is connected to
bias voltage line20, and capacitor 48 is connected from the collector 47 of second NPN transistor 44 to
resistor50 and the
anode51 of diode 52.
Resistor50 is connected to ground and cathode 53 of diode 52 is connected to the
base55 ofa
third NPN transistor54.
The emitter 57 of
third NPN transistor54 is connected to ground and the
collector59 of
third NPN transistor54 is connected to
terminal56. Connected from terminal 56 to ground is cancelling
switch58. Also connected to
terminal56 is the
base61 of
fourth NPN transistor60. Also connected from terminal 56 to ground is the parallel combination of capacitor 62 and
zener diode64. The zener diode fixes the potential at terminal 56 at the breakdown voltage of the zener.
Connected from the
collector67 of
fourth NPN transistor60 to
terminal56 is a
resistor66.
Collector67 of
fourth NPN transistor60 is also connected to bias
voltage line20, and
emitter69 of
fourth NPN transistor60 is connected to main
current line68. Main
current line68 is connected to anode
terminals14 of the controlled rectifiers 12. Also connected between main
current line68 and ground is capacitor 70.
Voltage is provided on bias voltage line through
resistor72 by an electrical power source 74 (graphically represented by a battery symbol.) Also connected between
bias voltage line20 and ground is
surge eliminating capacitor76.
Control rectifiers 12 have the advantageous physical characteristics of shifting from a non-conducting state to a conducting state as a result of the reduction of voltage below a determinable level (gating voltage) applied at
gate terminal18. Once shifted from a non-conducting state to a conducting state, control rectifiers 12 continue to remain in a conducting state after the gate terminal voltage returns to the original level. The control rectifiers 12 can be shifted from a conducting to a non-conducting state when the
anode14 to
cathode16 input current falls below a determinable level. However if the voltage applied at the
gate terminal18 is below the gating voltage level necessary to shift the control rectifier 12 to a conducting state reduction of the
anode14 to
cathode16 current will not shift the control rectifier 12 back to a non-conducting state.
18 are normally biased to hold control rectifiers 12 in a non-conducting state. When choice selector switches 32 are open, the voltage of
gate terminals18 is the same as the voltage of
bias voltage line20, since no current is flowing through
bias resistors22. When one or more choice selector switches 32 are closed, current flows from
bias voltage line20 through
bias resistor22,
choice selector switch32 and erasing
voltage resistor34 to ground. Because of the current flow through
bias resistor22, the voltage at
gate terminal18 is reduced below the voltage of
bias voltage line20 by the voltage drop across
bias resistor22. By proper selection of the value of
bias resistor22, this voltage drop may be established at a level sufficient to shift control rectifier 12 from a non-conducting state to a conducting state. Current then flows from
power source74, through
resistor72, through
bias voltage line20, through normally conducting
fourth NPN transistor60, through main
current line68, through the conducting controlled rectifier 12 and through the parallel combination of
load resistor24 and indicating light 26 to ground. The flow of current through the parallel combination of
load resistor24 and indicating light 26
causes indicating light26 to illuminate and also produces an output voltage. This output voltage can be picked up at
output jack28 and utilized to actuate a corresponding rhythm accompaniment circuit (not shown).
Upon closing of one or more choice selector switches 32, an input voltage is applied to base 37 of first NPN transistor 38 equal to the current in amperes flowing through erasing
voltage resistor34 times the resistance in ohms of erasing
voltage resistor34. This erasing voltage is amplified by first NPN transistor 38 and the amplified signal from the collector 41 of first NPN transistor 38 is applied across
resistor42 to the
base43 of second NPN transistor 44. This erasing signal is in turn amplified by second NPN transistor 44 and a transitional surge of current is conducted across capacitor 48 until capacitor 48 becomes fully charged. Once charged, capacitor 48 blocks all further direct current and this limits the duration of the erasing signal. This transitional surge of current across capacitor 48 creates a transitional voltage signal across resistor to ground, and this transitional voltage signal is applied to base of
third NPN transistor54 through
diode51. Capacitor 48 and
resistor50 form a differentiator circuit. I
Because of the biasing of
third NPN transistor55, the transitional voltage signal applied to
base55 causes third
N PN transistor54 to momentarily saturate and thus momentarily shift from a non-conducting condition to afully conducting condition effectively grounding
terminal56. The effective grounding of
terminal56 also
grounds base61 of
fourth NPN transistor60, which momentarily shifts fourth NPN transistor from a highly conducting state to a relatively low conducting state. Thus, the flow of current through main
current line68 to
anodes14 of control rectifiers 12 is momentarily reduced.
Fourth NPN transistor60 is biased to shift to a current level below that necessary to sustain control rectifiers 12 in a conducting condition upon grounding of
base61. Thus, the closing of choice selector switches 32 generates a signal that is amplified to momentarily ground
base61 of
fourth NPN transistor60 and thereby momentarily reduce the current in main
current line68 and erase the flow of current in the non-selected gating circuits l0.
Diode 52 is provided to prevent a double surge of current to base 55 of
third NPN transistor54 upon the collapse of the current surge across capacitor 48.
Capacitors62, and 76 are provided to eliminate AC surges in the circuit and thereby provide a more stable direct current voltage and eliminate the possibility of accidental choice erasing by unwanted AC voltage fluctuations. i
It should be expressly understood that the reduction of current level in main
current line68 is a momentary reduction in current resulting from the momentary saturation of
third NPN transistor59 caused by the voltage surge applied to
base55 across
resistor50. Once capacitor 48 is fully charged, no further direct current will flow across capacitor 48 and through
resistor50. Thus, after initial closing, as long as a
choice selector switch32 remains closed, no additional surges will be generated across capacitor 48 since a constant direct current voltage is being applied across erasing
voltage resistor34 and amplified by transistors 38 and 44. Consequently, once one
choice selector switch32 is closed and remains closed, additional selection may be made individually without generating an erasing signal since unfluctuating direct current continues to be applied across erasing
voltage resistor34. Without a fluctuation in this current, no additional current surges will be transmitted across capacitor 48 and thus no erasing current drop will result in main
current line68. Thus, the reduction of current in main
current line68 in response to the closing of a
choice selector switch32 does not operate to shift a particular control rectifier 12 from a conducting to a non-conducting state if the corresponding
choice selector switch32 is closed at the time the current in main
current line68 is reduced.
Once all choice selector switches 32 have been opened and current stops flowing through erasing
voltage resistor34, any subsequent closing of a
choice selector switch32 produces a current surge across erasing
voltage resistor34 which is amplified to saturate
third NPN transistor54,
ground base61 of l
fourth NPN transistor60 and reduce current in main
current line68 below the level necessary to erase the previously conducting control rectifiers 12 for which corresponding choice selector switches 32 are not closed.
An additional feature provided by this embodiment is cancelling
switch58. If the operator wishes to terminate all rhythm accompaniments, cancelling
switch58 may be closed. This grounds base 61 to
fourth NPN transistor60 thereby reducing the current in main
current line68 and shifting all conducting control rectifiers 12 to a non-conducting state.
Iclaim:
l. A selector switch and interlock arrangement comprising:
a plurality of momentary contact switches, each of said momentary contact switches adapted to'initiate a sustained function; memory means responsive to actuation of a momentary contact switch to record that said one momentary contact switch has been actuated and thereby sustain the continu ing function after de-actuation of said one momentary contact switch; erasing means responsive to actuation of a momentary contact switch to erase any record in said memory means of any prior actuations of a momentary contact switch; and
limiting means rendering said erasing means ineffective with respect to momentary contact switch actuations that are coextensive for any period of time.
2. An arrangement as claimed in claim 1 wherein said memory means comprises a plurality of electronic gating devices.
3. An arrangement as claimed in claim 2 wherein:
said electronic gating devices are complementary silicon controlled rectifiers having anode, cathode and gate electrodes; and
each of said momentary contact switches is connected to the gate electrode of an associated complementary silicon controlled rectifier to trigger conduction thereof upon closure of the associated switch.
4. An arrangement as claimed in claim 3 wherein said erasing means comprises:
a power transistor conveying current to each of said complementary silicon controlled rectifiers; and
control means responsive to closure of a momentary contact switch to reduce conduction of said power transistor.
5. An arrangement as claimed in claim 4 wherein said limiting means comprises a differentiator adapted to limit reduction of conduction by said power transistor to a very short period oftime.
6. An arrangement as claimed in claim 1 wherein said erasing means may be rendered ineffective by a controlling pedal switch.
7. A selector switch and interlock arrangement comprising:
a plurality of momentary contact switches, each of said switches adapted to initiate a sustained function;
an electronic gate connected to each momentary contact switch, said gate being placed in a conducting state'upon closure of its associated momentary contact switch and adapted to remain in the conducting state until the current passing therethrough is decreased below a given level;
a power transistor supplying current to said electronic gates;
an erase control means adapted to decrease conduction of said power transistor in response to closure of a momentary contact switch; and
a limiting differentiator adapted to limit the decrease in conduction of said power transistor to a period of time long enough to cause any gates in a conducting state to be transferred to a non-conducting state and short enough to prevent release of the momentary contact switch while said power transistor is in a reduced conducting state.
8. A device for providing multiple choice output signals to a means for receiving, interpreting and responding to the signals in response to an operators choice comprising:
a multiplicity of gating means, each of said gating means for individually providing a concurrent sustainable output signal in response to momentary co-existant individual external operator excitation, for providing an erasing signal in response to initiation of external operator excitation, and for terminating any existing output signals in response to an input transitional signal of those gating means for which no co-existant corresponding external operator excitation is present; and
an input transitional signal means for providing an input transitional signal to said multiplicity of gating means in response to the erasing signal to deactivate said multiplicity of gating means;
whereby more than one output signal may be selected by co-existant operator excitation of the corresponding gating means and all existing output signals of non-excited gating means are thereby terminated.
9. A multiple choice selector device for providing operator desired output current signals in response to the operator choice comprising:
a multiplicity of electrical current gating means for individually shifting from a non-conducting state to a conducting state upon individual external excitation to provide a corresponding output current, for providing an erasing current upon external excitation; and for individually shifting back to a non-conducting state upon reduction of input current below a determinable level, when no corresponding external excitation is present;
a pulse amplifying means for amplifying the erasing current and providing an output current pulse in response to the erasing current; and
a normally conducting power switch means for providing input current to said gating means and for reducing the input current below the level necessary to shift said gating means form a conducting to non-conducting state in response to the input ofa current pulse from said amplify ing means,
whereby, one or more output currents may achieve by external excitation of the corresponding gating means and all previously conducting non-externally excited gating means may be shifted to a non-conducting state.
10. A multiple choice selector device for providing operator desired output voltage signals to means for receiving and responding to the output voltage signals comprising:
an electrical power source;
a multiplicity of gate controlled rectifying means, each having an anode, a cathode and a gate terminal and shiftable from a non-conducting state to a conducting state upon reduction of the gate terminal voltage below a predetermined level and remaining in a conducting state until the anode to cathode current is reduced below a predetermined level when the gate terminal voltage is above the level necessary to shift the gate rectifying means to a conducting state, said gate terminal normally biased by the power source to hold said controlled rectifier in a nonconducting state;
a multiplicity of load resistor means individually in series from ground to the cathode of the controlled rectifying means for providing output voltage signals when said controlled rectifying means are in a conducting state;
a multiplicity of normally open triggering switch means individually connected at one side with the gate terminals for reducing the gate terminal voltage and placing the rectifier means in a conducting state when closed;
a first resistor means commonly connected from the opposite side of the triggering switch means to ground for providing an erasing voltage upon closing of a triggering switch means;
a pulse amplifying means for amplifying the erasing voltage and providing an output pulse of electrical current;
a normally conducting power switch means having an input, output and control terminal for providing current from said power source to the anodes and for reducing the current below the level necessary to shift said controlled rectifiers to a non-conducting state when the control terminal is grounded;
a grounding switch means controlled by the output pulse from said pulse amplifying means for grounding the control terminal of power switch means in response to a pulse provided by said pulse amplifying means;
and further comprising:
a cancelling switch means for grounding the control terminal of said power switch means when closed to shift all conducting gate controlled rectifying means from a con ducting state to a non-conducting state.