Yao et al., 2014 - Google Patents
- ️Wed Jan 01 2014
Yao et al., 2014
View PDF @Full View-
Document ID
- 5940703867354847401 Author
- Zein-Sabatto M
- Shao G
- Bodruzzaman M
- Malkani M Publication year
- 2014 Publication venue
- Journal of Nanotechnology
External Links
Snippet
Quantum‐dot cellular automata (QCA) is an attractive nanotechnology with the potential alterative to CMOS technology. QCA provides an interesting paradigm for faster speed, smaller size, and lower power consumption in comparison to transistor‐based technology, in …
- 239000002096 quantum dot 0 title abstract description 8
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/50—Computer-aided design
- G06F17/5009—Computer-aided design using simulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F2217/00—Indexing scheme relating to computer aided design [CAD]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06F—ELECTRICAL DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING; COUNTING
- G06N—COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N99/00—Subject matter not provided for in other groups of this subclass
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Chabi et al. | 2014 | Efficient QCA exclusive‐or and multiplexer circuits based on a nanoelectronic‐compatible designing approach |
Mardiris et al. | 2010 | Design and simulation of modular 2n to 1 quantum‐dot cellular automata (QCA) multiplexers |
Sasamal et al. | 2018 | Efficient design of coplanar ripple carry adder in QCA |
Labrado et al. | 2016 | Design of adder and subtractor circuits in majority logic‐based field‐coupled QCA nanocomputing |
Walus et al. | 2006 | Design tools for an emerging SoC technology: Quantum-dot cellular automata |
Kianpour et al. | 2014 | A novel design of 8-bit adder/subtractor by quantum-dot cellular automata |
Lu et al. | 2011 | QCA systolic array design |
Rashidi et al. | 2017 | High‐performance full adder architecture in quantum‐dot cellular automata |
Sasamal et al. | 2016 | Design of non‐restoring binary array divider in majority logic‐based QCA |
Norouzi et al. | 2020 | A reversible ALU using HNG and Ferdkin gates in QCA nanotechnology |
Sharma | 2021 | Optimal design for digital comparator using QCA nanotechnology with energy estimation |
Gao et al. | 2021 | A new nano design for implementation of a digital comparator based on quantum-dot cellular automata |
Mohammadi et al. | 2017 | Design of non‐restoring divider in quantum‐dot cellular automata technology |
Yao et al. | 2014 | Nanosensor Data Processor in Quantum‐Dot Cellular Automata |
Berarzadeh et al. | 2017 | A novel low power Exclusive-OR via cell level-based design function in quantum cellular automata |
Gaillardon et al. | 2014 | Nanowire systems: Technology and design |
Gassoumi et al. | 2019 | An ultra‐low power parity generator circuit based on QCA technology |
Noorallahzadeh et al. | 2019 | Efficient designs of reversible latches with low quantum cost |
Sen et al. | 2013 | Reversible logic‐based fault‐tolerant nanocircuits in QCA |
Afrooz et al. | 2021 | An effective nano design of demultiplexer architecture based on coplanar quantum‐dot cellular automata |
Rashidi et al. | 2017 | Efficient and low‐complexity hardware architecture of Gaussian normal basis multiplication over GF (2m) for elliptic curve cryptosystems |
Yaqoob et al. | 2021 | Design of efficient N‐bit shift register using optimized D flip flop in quantum dot cellular automata technology |
Ahmed et al. | 2021 | Design of quantum‐dot cellular automata‐based communication system using modular N‐bit binary to gray and gray to binary converters |
Bhoi et al. | 2017 | Design and evaluation of an efficient parity-preserving reversible QCA gate with online testability |
Roohi et al. | 2015 | Wire crossing constrained QCA circuit design using bilayer logic decomposition |